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MC74AC08, MC74ACT08
Quad 2−Input AND Gate
• Outputs Source/Sink 24 mA
• ′ACT08 Has TTL Compatible Inputs
• Pb−Free Packages are Available
MAXIMUM RATINGS
Rating Symbol Value Unit
DC Supply Voltage (Referenced to GND) V
DC Input Voltage (Referenced to GND) V
DC Output Voltage (Referenced to GND) V
DC Input Current, per Pin I
DC Output Sink/Source Current, per Pin I
DC VCC or GND Current per Output Pin I
Storage Temperature T
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
CC
in
out
in
out
CC
stg
−0.5 to
+7.0
−0.5 to
VCC +0.5
−0.5 to
VCC +0.5
±20 mA
±50 mA
±50 mA
−65 to
+150
°C
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V
V
V
14
1
14
1
14
1
PDIP−14
N SUFFIX
CASE 646
SO−14
D SUFFIX
CASE 751A
TSSOP−14
DT SUFFIX
CASE 948G
V
CC
1314 12 11 10 9 8
21 34567
GND
Figure 1. Pinout: 14−Lead Packages Conductors
(Top View)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
SOEIAJ−14
14
1
M SUFFIX
CASE 965
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 5 of this data sheet.
Semiconductor Components Industries, LLC, 2004
June, 2004 − Rev. 6
1 Publication Order Number:
MC74AC08/D
MC74AC08, MC74ACT08
r,f
′AC Devi
itt I
In ut Rise and Fall Time (Note 2)
V
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Typ Max Unit
V
CC
Vin, V
tr, t
f
tr, t
f
T
J
T
A
I
OH
I
OL
out
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND) 0 − V
Input Rise and Fall Time (Note 1)
′
ces except Schm
p
p
nputs
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
Junction Temperature (PDIP) − − 140 °C
Operating Ambient Temperature Range −40 25 85 °C
Output Current − High − − −24 mA
Output Current − Low − − 24 mA
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
DC CHARACTERISTICS
Symbol Parameter Conditions
V
IH
V
IL
V
OH
V
OL
I
IN
I
OLD
I
OHD
I
CC
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
3. All outputs loaded; thresholds on input associated with output under test.
4. Maximum test duration 2.0 ms, one output loaded at a time.
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
Maximum Low Level
Output Voltage
Maximum Input
Leakage Current
Minimum Dynamic (Note 4)
Output Current
Maximum Quiescent
Supply Current
V
= 0.1 V
OUT
− 0.1 V
or V
CC
V
= 0.1 V
OUT
or V
− 0.1 V
CC
I
= −50 A 3.0
OUT
VIN = VIL or VIH (Note 3)
I
OH
VIN = VIL or VIH(Note 3)
I
OL
VI = VCC, GND 5.5 − ±0.1 ±1.0 A
V
= 1.65 V Max 5.5 − − 75 mA
OLD
V
= 3.85 V Min 5.5 − − −75 mA
OHD
VIN = VCC or GND 5.5 − 4.0 40 A
′AC 2.0 5.0 6.0
′ACT 4.5 5.0 5.5
VCC @ 3.0 V − 150 −
VCC @ 4.5 V − 40 −
VCC @ 5.5 V − 25 −
VCC @ 4.5 V − 10 −
VCC @ 5.5 V − 8.0 −
74AC 74AC
TA =
−40°C to
+85°C
3.15
3.85
1.35
1.65
2.46
3.76
4.76
0.44
0.44
0.44
−12 mA
−24 mA
−24 mA
12 mA
24 mA
24 mA
(V)
3.0
4.5
5.5
3.0
4.5
5.5
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
TA = +25°C
CC
Typ Guaranteed Limits
1.5
2.1
2.25
3.15
2.75
3.85
1.5
0.9
2.25
1.35
2.75
1.65
2.99
4.49
5.49
2.9
4.4
5.4
−
2.56
−
3.86
−
4.86
−
0.36
−
0.36
−
0.36
CC
2.1
0.9
2.9
4.4
5.4
V
V
ns/V
ns/V
Unit
V
V
V
V
V
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2
MC74AC08, MC74ACT08
V
(V)
Fig
P
P
V
IN
au u
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC 74AC
TA = −40°C
to +85°C
CL = 50 pF
Unit
ns 3−5
ns 3−5
TA =
−40°C to
+85°C
CC
Symbol Parameter
t
PLH
t
PHL
p
ropagation Delay
p
ropagation Delay
(Note5 )
3.3 1.5 7.5 9.5 1.0 10.0
5.0 1.5 5.5 7.5 1.0 8.5
3.3 1.5 7.0 8.5 1.0 9.0
5.0 1.5 5.5 7.0 1.0 7.5
5. Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
Symbol Parameter Conditions
V
IH
V
IL
V
OH
V
OL
I
IN
I
CCT
I
OLD
I
OHD
I
CC
6. All outputs loaded; thresholds on input associated with output under test.
7. Maximum test duration 2.0 ms, one output loaded at a time.
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
V
= 0.1 V 4.5 1.5 2.0 2.0
OUT
or VCC − 0.1 V 5.5 1.5 2.0 2.0
V
= 0.1 V 4.5 1.5 0.8 0.8
OUT
or VCC − 0.1 V 5.5 1.5 0.8 0.8
I
= −50 A 4.5 4.49 4.4 4.4
OUT
Output Voltage
VIN = VIL or VIH (Note 6)
−24 mA 4.5 − 3.86 3.76
−24 mA 5.5 − 4.86 4.76
Maximum Low Level
I
= 50 A 4.5 0.001 0.1 0.1
OUT
Output Voltage
VIN = VIL or VIH (Note 6)
24 mA 4.5 − 0.36 0.44
24 mA 5.5 − 0.36 0.44
Maximum Input
Leakage Current
VI = VCC, GND 5.5 − ±0.1 ±1.0 A
Additional Max. ICC/Input VI = VCC − 2.1 V 5.5 0.6 − 1.5 mA
Minimum Dynamic (Note 7)
Output Current
Maximum Quiescent
Supply Current
V
= 1.65 V Max 5.5 − − 75 mA
OLD
V
= 3.85 V Min 5.5 − − −75 mA
OHD
VIN = VCC or GND 5.5 − 4.0 40 A
TA = +25°C
C
= 50 pF
L
Min Typ Max Min Max
74ACT 74ACT
TA = +25°C
CC
(V)
Typ Guaranteed Limits
5.5 5.49 5.4 5.4
5.5 0.001 0.1 0.1
Unit
V
V
V
V
V
V
Fig.
No.
.
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3
MC74AC08, MC74ACT08
V
(V)
Fig
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT 74ACT
TA = −40°C
TA = +25°C
C
= 50 pF
L
Min Typ Max Min Max
Symbol Parameter
t
PLH
t
PHL
Propagation Delay 5.0 1.0 − 9.0 1.0 10.0 ns 3−5
Propagation Delay 5.0 1.0 − 9.0 1.0 10.0 ns 3−5
CC
(Note 8)
8. Voltage Range 5.0 V is 5.0 V ±0.5 V.
CAPACITANCE
Symbol Parameter Test Conditions
C
IN
C
PD
Input Capacitance VCC = 5.0 V 4.5 pF
Power Dissipation Capacitance VCC = 5.0 V 20 pF
to +85°C
CL = 50 pF
Unit
Value
Typ
Unit
Fig.
No.
.
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4
MC74AC08, MC74ACT08
MARKING DIAGRAMS
PDIP−14 SOIC−14 TSSOP−14
MC74AC08N
AWLYYWW
MC74ACT08N
AWLYYWW
AC08
AWLYWW
ACT08
AWLYWW
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
AC
ALYW
ACT
ALYW
08
08
SOEIAJ−14
74AC08
ALYW
74ACT08
ALYW
ORDERING INFORMATION
Device Package Shipping
MC74AC08N PDIP−14 500 Units / Rail
MC74AC08D SOIC−14 55 Units / Rail
MC74AC08DR2 TSSOP−14 2500 / Tape & Reel
MC74AC08DTR2 TSSOP−14
(Pb−Free)
MC74AC08MEL SOEIAJ−14
(Pb−Free)
MC74ACT08N PDIP−14 500 Units / Rail
MC74ACT08D SOIC−14 55 Units / Rail
MC74ACT08DR2 SOIC−14 2500 / Tape & Reel
MC74ACT08DTR2G SOIC−14
(Pb−Free)
MC74ACT08NG PDIP−14
(Pb−Free)
MC74ACT08MEL SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
2500 / Tape & Reel
2000 / Tape & Reel
2500 / Tape & Reel
500 Units / Rail
2000 / Tape & Reel
†
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5
−T−
SEATING
PLANE
14 8
17
N
HG
MC74AC08, MC74ACT08
PACKAGE DIMENSIONS
PDIP−14
N SUFFIX
CASE 646−06
ISSUE N
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
B
A
F
L
C
D
14 PL
0.13 (0.005)
K
J
M
M
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
DIM MIN MAX MIN MAX
A 0.715 0.770 18.16 18.80
B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
G 0.100 BSC 2.54 BSC
H 0.052 0.095 1.32 2.41
J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
L
0.290 0.310 7.37 7.87
M −−− 10 −−− 10
N 0.015 0.039 0.38 1.01
MILLIMETERSINCHES
−T−
SEATING
PLANE
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE G
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
−A−
14
1
G
D 14 PL
0.25 (0.010) A
8
−B−
P
7 PL
M
0.25 (0.010) B
7
X 45
C
R
K
M
S
B
T
S
M
M
J
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
F
DIM MIN MAX MIN MAX
A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019
INCHESMILLIMETERS
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6
0.10 (0.004)
ÉÉ
−T−
SEATING
PLANE
MC74AC08, MC74ACT08
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE O
14X REFK
S
U
T
S
N
0.25 (0.010)
U0.15 (0.006) T
S
2X L/2
0.10 (0.004) V
14
M
8
M
L
PIN 1
IDENT.
1
S
U0.15 (0.006) T
A
−V−
B
−U−
N
F
7
DETAIL E
K
K1
J1
J
SECTION N−N
C
D
G
H
DETAIL E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008
−W−
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
INCHESMILLIMETERS
14 8
1
Z
D
e
b
0.13 (0.005)
M
E
7
A
0.10 (0.004)
H
A
1
E
VIEW P
SOEIAJ−14
M SUFFIX
CASE 965−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
L
E
Q
1
M
L
DETAIL P
c
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
MILLIMETERS
DIM MIN MAX MIN MAX
−−− 2.05 −−− 0.081
A
A
0.05 0.20 0.002 0.008
1
0.35 0.50 0.014 0.020
b
0.18 0.27 0.007 0.011
c
9.90 10.50 0.390 0.413
D
5.10 5.45 0.201 0.215
E
1.27 BSC 0.050 BSC
e
H
7.40 8.20 0.291 0.323
E
0.50 0.85 0.020 0.033
0.50
L
1.10 1.50 0.043 0.059
E
0
M
Q
0.70 0.90 0.028 0.035
1
−−− 1.42 −−− 0.056
Z
INCHES
10
10
0
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7
MC74AC08, MC74ACT08
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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For additional information, please contact your
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MC74AC08/D
8
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