ON Semiconductor MC34163, MC33163 Technical data

MC34163, MC33163

3.4 A, Step-Up/Down/ Inverting Switching Regulators

The MC34163 series are monolithic power switching regulators that contain the primary functions required for dc–to–dc converters. This series is specifically designed to be incorporated in step–up, step–down, and voltage–inverting applications with a minimum number of external components.

These devices consist of two high gain voltage feedback comparators, temperature compensated reference, controlled duty cycle oscillator, driver with bootstrap capability for increased efficiency, and a high current output switch. Protective features consist of cycle–by–cycle current limiting, and internal thermal shutdown. Also included is a low voltage indicator output designed to interface with microprocessor based systems.

These devices are contained in a 16 pin dual–in–line heat tab plastic package for improved thermal conduction.

• Output Switch Current in Excess of 3.0 A

• Operation from 2.5 V to 40 V Input

• Low Standby Current

• Precision 2% Reference

• Controlled Duty Cycle Oscillator

• Driver with Bootstrap Capability for Increased Efficiency

• Cycle–by–Cycle Current Limiting

• Internal Thermal Shutdown Protection

• Low Voltage Indicator Output for Direct Microprocessor Interface

• Heat Tab Power Package

• Moisture Sensitivity Level (MSL) Equals 1

Ipk Sense

V

Timing

Capacitor

Gnd

Voltage

Feedback 1

Voltage

Feedback 2

LVI Output

8

7

CC

6

5

4

3

2

1

LVI

OSC

+ +

-

I

Limit

-

+

Control Logic

and Thermal

Shutdown

VFB

+ +

-

+

9

10

11

12

13

14

15

16

Driver Collector

Switch Collector

Gnd

Switch Emitter

Bootstrap Input

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MARKING

DIAGRAMS

16

PDIP–16

P SUFFIX

CASE 648C

1

SO–16W DW SUFFIX CASE 751G

1

x = 3 or 4 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week

MC3x163P

AWLYYWW

1

16

MC3x163DW

AWLYYWW

1

PIN CONNECTIONS

LVI Output

Voltage Feedback 2

Voltage Feedback 1

Gnd

Timing Capacitor

V

Ipk Sense

116

2

3

4

5

6

7

CC

8

(Top View)

Bootstrap Input

15

Switch Emitter

14

13

Gnd

12

11

Switch Collector

10

Driver Collector

9

ORDERING INFORMATION

Device Package Shipping

MC33163DW SO–16W 47 Units/Rail MC33163DWR2 SO–16W 1000 Tape & Reel MC33163P PDIP–16 MC34163DW SO–16W

25 Units/Rail 47 Units/Rail

This device contains 114 active transistors.

(Bottom View)

Figure 1. Representative Block Diagram

 Semiconductor Components Industries, LLC, 2002

January , 2002 – Rev. 4

MC34163DWR2 SO–16W 1000 Tape & Reel MC34163P PDIP–16 25 Units/Rail

1 Publication Order Number:

MC34163/D

MC34163, MC33163

MAXIMUM RATINGS (Note 1)

Rating

Power Supply Voltage V Switch Collector Voltage Range V Switch Emitter Voltage Range V Switch Collector to Emitter Voltage V Switch Current (Note 2) I Driver Collector Voltage V Driver Collector Current I Bootstrap Input Current Range (Note 2) I Current Sense Input Voltage Range V Feedback and Timing Capacitor Input Voltage Range V Low Voltage Indicator Output Voltage Range V Low Voltage Indicator Output Sink Current I

Thermal Characteristics

P Suffix, Dual–In–Line Case 648C

Thermal Resistance, Junction–to–Air Thermal Resistance, Junction–to–Case (Pins 4, 5, 12, 13)

DW Suffix, Surface Mount Case 751G

Thermal Resistance, Junction–to–Air

Thermal Resistance, Junction–to–Case (Pins 4, 5, 12, 13) Operating Junction Temperature T Operating Ambient Temperature (Note 4)

MC34163 MC33163

Storage Temperature Range T

Symbol Value Unit

CC C(switch) E(switch)

CE(switch)

SW

C(driver)

BS

Ipk (Sense)

in

C(LVI)

(VCC–7.0) to (VCC+1.0) V

40 V

–1.0 to + 40 V

– 2.0 to V

C(switch)

40 V

3.4 A

–1.0 to +40 V

150 mA

–100 to +100 mA

–1.0 to + 7.0 V

–1.0 to + 40 V

10 mA

V

°C/W

R

θ

JA

R

θ

JC

R

θ

JA

R

θ

JC

J

T

A

80 15

94 18

+150 °C

°C

0 to +70

– 40 to + 85

stg

– 65 to +150 °C

ELECTRICAL CHARACTERISTICS (V

= 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25°C, for min/max values T

CC

the operating ambient temperature range that applies (Note 4), unless otherwise noted.)

Characteristic

Symbol Min Typ Max Unit

OSCILLATOR

Frequency

= 25°C

T

A

Total Variation over V

= 2.5 V to 40 V, and Temperature

CC

Charge Current I Discharge Current I Charge to Discharge Current Ratio I Sawtooth Peak Voltage V Sawtooth Valley Voltage V

f

OSC

chg

dischg

chg/Idischg

OSC(P) OSC(V)

46 45

50

– – 225 – µA – 25 – µA

8.0 9.0 10 – – 1.25 – V – 0.55 – V

FEEDBACK COMPARATOR 1

Threshold Voltage

= 25°C

T

A

Line Regulation (V

= 2.5 V to 40 V, TA = 25°C)

CC

Total Variation over Line, and Temperature

Input Bias Current (V

= 5.05 V) I

FB1

V

th(FB1)

IB(FB1)

4.9 –

4.85

5.05

0.008 –

– 100 200 µA

1. This device series contains ESD protection and exceeds the following tests: Human Body Model 1500 V per MIL–STD–883, Method 3015. Machine Model Method 150 V.

2. Maximum package power dissipation limits must be observed.

3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.

=0°C for MC34163 T

4. T

low

=–40°C for MC33163 = + 85°C for MC33163

=+70°C for MC34163

high

54 55

5.2

0.03

5.25

kHz

V

%/V

V

is

A

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2

MC34163, MC33163

ELECTRICAL CHARACTERISTICS (continued) (V

values T

is the operating ambient temperature range that applies (Note 6), unless otherwise noted.)

A

Characteristic

= 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25°C, for min/max

CC

Symbol Min Typ Max Unit

FEEDBACK COMPARATOR 2

Threshold Voltage

T

= 25°C

A

Line Regulation (V

= 2.5 V to 40 V, TA = 25°C)

CC

Total Variation over Line, and Temperature

Input Bias Current (V

= 1.25 V) I

FB2

V

th(FB2)

IB(FB2)

1.225 –

1.213

1.25

0.008 –

– 0.4 0 0.4 µA

CURRENT LIMIT COMPARATOR

Threshold Voltage

= 25°C

T

A

Total Variation over V

Input Bias Current (V

= 2.5 V to 40 V, and Temperature

CC

Ipk (Sense)

= 15 V) I

V

th(Ipk Sense)

IB(sense)

–

230

250

–

– 1.0 20 µA

DRIVER AND OUTPUT SWITCH (Note 5)

Sink Saturation Voltage (I

Non–Darlington Connection (R

Darlington Connection (Pins 9, 10, 11 connected) Collector Off–State Leakage Current (VCE = 40 V) I Bootstrap Input Current Source (VBS = VCC + 5.0 V) I Bootstrap Input Zener Clamp Voltage (IZ = 25 mA) V

= 2.5 A, Pins 14, 15 grounded)

SW

= 110 Ω to VCC, ISW/I

Pin 9

DRV

≈ 20)

V

CE(sat)

C(off)

source(DRV)

Z

– –

0.6

1.0

– 0.02 100 µA

0.5 2.0 4.0 mA

VCC + 6.0 VCC + 7.0 VCC + 9.0 V

LOW VOLTAGE INDICATOR

Input Threshold (V Input Hysteresis (V Output Sink Saturation Voltage (I Output Off–State Leakage Current (VOH = 15 V) I

Increasing) V

FB2

Decreasing) V

FB2

= 2.0 mA) V

sink

th H

OL(LVI)

OH

1.07 1.125 1.18 V – 15 – mV – 0.15 0.4 V – 0.01 5.0 µA

TOTAL DEVICE

Standby Supply Current (V

= 2.5 V to 40 V, Pin 8 = VCC,

CC

I

CC

– 6.0 10 mA

Pins 6, 14, 15 = Gnd, remaining pins open)

5. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. =0°C for MC34163 T

6. T

low

=–40°C for MC33163 = + 85°C for MC33163

=+70°C for MC34163

high

1.275

0.03

1.287

–

270

1.0

1.4

V

%/V

V

mV

V

100

10

, OUTPUT SWITCH ON-OFF TIME ( s)t

off

-t µ

1.0

on

0.1

V

= 15 V

CC

T

= 25°C

A

1)ton, R

2)ton, RDT = 20 k

3)ton, t

4)t

5)t

= ∞

DT

, RDT = 10 k

off

, RDT = 20 k

off

, R

= ∞

off

DT

1

2

3 4 5

1.0 10

C

, OSCILLATOR TIMING CAPACITOR (nF)

T

Figure 2. Output Switch On–Off Time

versus Oscillator Timing Capacitor

2.0

0

-2.0

-4.0

, OSCILLATOR FREQUENCY CHANGE (%)∆

-6.0

-55

OSC

f

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3

VCC = 15 V CT = 620 pF

-25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 3. Oscillator Frequency Change

versus Temperature

MC34163, MC33163

5

)

140

1300 VCC = 15 V V

120

FB1

= 5.05 V

1280

1260

VCC = 15 V

Vth Max = 1275 mV

Vth Typ = 1250 mV

100

1240

80

, INPUT BIAS CURRENT (A)µ

IB

I

60

-55

-25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 4. Feedback Comparator 1 Input Bias

Current versus Temperature

2.8

VCC = 15 V

2.4

2.0

Pin 16 = VCC + 5.0 V

1220

1200

, COMPARATOR 2 THRESHOLD VOLTAGE (mV

-55

th(FB2)

V

-25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 5. Feedback Comparator 2 Threshold

Voltage versus Temperature

7.6

IZ = 25 mA

7.4

7.2

Vth Min = 1225 mV

1.6

, BOOTSTRAP INPUT CURRENT SOURCE (mA)

1.2

-55 -25 0 25 50 75 100 125 T

, AMBIENT TEMPERATURE (°C)

source (DRV)

I

A

Figure 6. Bootstrap Input Current

Source versus T emperature

0

V

CC

-0.4

-0.8

Bootstrapped, Pin 16 = VCC + 5.0 V

-1.2

, SOURCE SATURATION (V)

-1.6

CE (sat)

V

-2.0

Non-Bootstrapped, Pin 16 = V

0 0.8 2.4 3.2

, EMITTER CURRENT (A)

I

E

Darlington Configuration Emitter Sourcing Current to Gnd Pins 7, 8, 10, 11 = V Pins 4, 5, 12, 13 = Gnd T

= 25°C, (Note 2)

A

CC

1.6

Figure 8. Output Switch Source Saturation

versus Emitter Current

7.0

6.8

-55 -25 0 25 50 75 100 12

, BOOTSTRAP INPUT ZENER CLAMP VOLTAGE (V)

Z

V

T

, AMBIENT TEMPERATURE (°C)

A

Figure 7. Bootstrap Input Zener Clamp

Voltage versus Temperature

1.2

Darlington, Pins 9, 10, 11 Connected

1.0

0.8

Grounded Emitter Configuration Collector Sinking Current From V

0.6 Pins 7, 8 = VCC = 15 V

, SINK SATURATION (V)

CE (sat)

V

Pins 4, 5, 12, 13, 14, 15 = Gnd

0.4 T

= 25°C, (Note 2)

A

0.2

0

0 0.8 2.4 3.21.6

CC

Saturated Switch, R

Gnd

I

, COLLECTOR CURRENT (A)

C

= 110 Ω to V

Pin9

Figure 9. Output Switch Sink Saturation

versus Collector Current

CC

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4

MC34163, MC33163

0

Gnd

-0.4

I

= 10 µA

C

-0.8

-1.2

, EMITTER VOLTAGE (V)

E

V

-1.6

IC = 10 mA

VCC = 15 V Pins 7, 8, 9, 10, 16 = V Pins 4, 6 = Gnd Pin 14 Driven Negative

-2.0

-55 -25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 10. Output Switch Negative Emitter

Voltage versus Temperature

254

VCC = 15 V

252

250

, THRESHOLD VOLTAGE (mV)

248

th (Ipk Sense)

V

246

-55 -25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 12. Current Limit Comparator Threshold

Voltage versus Temperature

0.5

VCC=5 V T

=25°C

A

0.4

0.3

0.2

CC

0.1

, OUTPUT SATURATION VOLTAGE (V)

0

OL (LVI)

0 2.0 4.0 6.0 8.0

V

I

, OUTPUT SINK CURRENT (mA)

sink

Figure 11. Low Voltage Indicator Output Sink

Saturation Voltage versus Sink Current

1.6

µ

1.4

VCC = 15 V V

Ipk (Sense)

= 15 V

1.2

1.0

INPUT BIAS CURRENT ( A) ,

0.8

IB (Sense)

I

0.6

-55 -25 0 25 50 75 100 125 T

, AMBIENT TEMPERATURE (°C)

A

Figure 13. Current Limit Comparator Input Bias

Current versus Temperature

8.0

6.0

4.0

, SUPPLY CURRENT (mA)

2.0

CC

I

0

0 10203040

, SUPPLY VOLTAGE (V)

V

CC

Pins 7, 8, 16 = V Pins 4, 6, 14 = Gnd Remaining Pins Open T

= 25°C

A

CC

Figure 14. Standby Supply Current

versus Supply V oltage

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7.2 VCC = 15 V

6.4

Pins 7, 8, 16 = V Pins 4, 6, 14 = Gnd Remaining Pins Open

CC

5.6

, SUPPLY CURRENT (mA)

4.8

CC

I

4.0

-55 -25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

A

Figure 15. Standby Supply Current

versus Temperature

5

MC34163, MC33163

ÎÎ

ÎÎÎ

ÎÎ

3.0

2.6

2.2

1.8

Pin 16 Open

Pin 16 = V

CC

CT = 620 pF Pins 7,8 = V Pins 4, 14 = Gnd

CC

Pin 9 = 1.0 kΩ to 15 V Pin 10 = 100 Ω to 15 V

1.4

, MINIMUM OPERATING SUPPLY VOLTAGE (V)

1.0

-55 -25 0 25 50 75 100 125

, AMBIENT TEMPERATURE (°C)

T

CC(min)

V

Figure 16. Minimum Operating Supply

A

Voltage versus Temperature

100

90

80

70

60

50

JAθ

JUNCTION-TO-AIR ( C/W)°

R , THERMAL RESISTANCE

40

30

02030504010

100

80

60

40

JAθ

20

JUNCTION-TO-AIR ( C/W)°

R , THERMAL RESISTANCE

0

Figure 17. P Suffix (DIP–16) Thermal Resistance

P

for T

2.0 oz.

Copper

= 50°C

A

D(max)

Graph represents symmetrical layout

L

R

θ

JA

L, LENGTH OF COPPER (mm)

Printed circuit board heatsink example

2.0 oz

L

Copper

R

P

D(max)

θ

JA

for T

= 70°C

A

L

Graphs represent symmetrical layout

3.0 mm

10 20 30 40 50

L, LENGTH OF COPPER (mm)

and Maximum Power Dissipation

versus P.C.B. Copper Length

2.8

2.4

2.0

1.6

1.2

3.0 mmL

0.8

0.4

0

, MAXIMUM POWER DISSIPATION (W)

D

P

5.0

4.0

3.0

2.0

1.0

0

, MAXIMUM POWER DISSIPATION (W)

D

P

Figure 18. DW Suffix (SOP–16L) Thermal Resistance and

Maximum Power Dissipation versus P.C.B. Copper Length

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6

MC34163, MC33163

V

Timing Capacitor

Shutdown

Voltage Feedback 1

Voltage Feedback 2

Comparator Output

1.25 V

Timing Capacitor C

0.55 V

Oscillator Output

Output Switch

Nominal Output

Voltage Level

CC

T

On

Off

I

pk Sense

R

SC

C

T

R

DT

Gnd

LVI Output

1

0

1

0

+

Thermal

+

+ +

-

+

45 k

+ +

-

+

1.125 V

Current

Limit

R

Q

S

Latch

+

Feedback Comparator

15 k1.25 V

+

Q

60

2.0 mA

7.0 V

9

Driver Collector

10

Switch Collector

11

1

Q

2

12

Gnd

13

14

Switch Emitter

15

16

Bootstrap Input

8

7

6

5

4

3

2

1

0.25 V

+

Oscillator

LVI

(Bottom View)

Figure 19. Representative Block Diagram

t

9t

+

-

Sink Only

=

Positive True Logic

Output Voltage

Startup Quiescent Operation

Figure 20. Typical Operating Waveforms

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MC34163, MC33163

INTRODUCTION

The MC34163 series are monolithic power switching regulators optimized for dc–to–dc converter applications. The combination of features in this series enables the system designer to directly implement step–up, step–down, and voltage–inverting converters with a minimum number of external components. Potential applications include cost sensitive consumer products as well as equipment for the automotive, computer, and industrial markets. A Representative Block Diagram is shown in Figure 19.

OPERATING DESCRIPTION

The MC34163 operates as a fixed on–time, variable off–time voltage mode ripple regulator. In general, this mode of operation is somewhat analogous to a capacitor charge pump and does not require dominant pole loop compensation for converter stability. The Typical Operating Waveforms are shown in Figure 20. The output voltage waveform shown is for a step–down converter with the ripple and phasing exaggerated for clarity. During initial converter startup, the feedback comparator senses that the output voltage level is below nominal. This causes the output switch to turn on and off at a frequency and duty cycle controlled by the oscillator , thus pumping up the output filter capacitor. When the output voltage level reaches nominal, the feedback comparator sets the latch, immediately terminating switch conduction. The feedback comparator will inhibit the switch until the load current causes the output voltage to fall below nominal. Under these conditions, output switch conduction can be inhibited for a partial oscillator cycle, a partial cycle plus a complete cycle, multiple cycles, or a partial cycle plus multiple cycles.

Oscillator

The oscillator frequency and on–time of the output switch are programmed by the value selected for timing capacitor CT. Capacitor CT is charged and discharged by a 9 to 1 ratio internal current source and sink, generating a negative going sawtooth waveform at Pin 6. As CT charges, an internal pulse is generated at the oscillator output. This pulse is connected to the NOR gate center input, preventing output switch conduction, and to the AND gate upper input, allowing the l a t c h to be re s e t i f the comparator output is low. Thus, the output switch is always disabled during ramp–up and can be enabled by the comparator output only at the start of ramp–down. The oscillator peak and valley thresholds are

1.25 V and 0.55 V, respectively, with a charge current of 225 µA and a discharge current of 25 µA, yielding a maximum on–time duty cycle of 90%. A reduction of the maximum duty cycle may be required for specific converter configurations. This can be accomplished with the addition

of an external deadtime resistor (R

) placed across CT. The

DT

resistor increases the discharge current which reduces the on–time of the output switch. A graph of the Output Switch On–Off Time versus Oscillator Timing Capacitance for various values of RDT is shown in Figure 2. Note that the maximum output duty cycle, t

on/ton

+ t

, remains constant

off

for values of CT greater than 0.2 nF. The converter output can be inhibited by clamping CT to ground with an external NPN small–signal transistor.

Feedback and Low Voltage Indicator Comparators

Output voltage control is established by the Feedback comparator. T he i nverting i nput i s i nternally b iased a t 1 .25 V and is not pinned out. The converter output voltage is typically divided down with two external resistors and monitored by t he h igh im pedance n oninverting i nput a t Pin 2. The maximum i nput b ias c urrent i s ±0.4 µA, which can c ause an output v oltage e rror t hat i s e qual t o t he p roduct o f t he i nput bias current and the upper divider resistance value. For applications that require 5.0 V, the converter output can be directly connected t o t he n oninverting i nput a t P in 3 . T he h igh impedance input, Pin 2, must be grounded to prevent noise pickup. The internal resistor divider is set for a nominal voltage of 5.05 V. The additional 50 mV compensates for a

1.0% voltage drop in the cable and connector from the converter output to the load. The Feedback comparator’s output state is controlled by the highest voltage applied to either of the two noninverting inputs.

The Low Voltage Indicator (LVI) comparator is designed for use as a reset controller in microprocessor–based systems. The inverting input is internally biased at 1.125 V, which sets the noninverting input thresholds to 90% of nominal. The LVI comparator has 15 mV of hysteresis to prevent erratic reset operation. The Open Collector output is capable of sinking in excess of 6.0 mA (see Figure 11). An external resistor (R program a reset delay time (t below, where V

) and capacitor (C

LVI

DLY

is the microprocessor reset input

th(MPU)

DLY

) by the formula shown

) can be used to

threshold. Refer to Figure 21.

1

V

t

= R

DLY

Current Limit Comparator, Latch and Thermal Shutdown

LVI CDLY

In

1 –

th(MPU)



V

out

With a voltage mode ripple converter operating under normal conditions, output switch conduction is initiated by the oscillator and terminated by the Voltage Feedback comparator. Abnormal operating conditions occur when the converter output is overloaded or when feedback voltage sensing is lost. Under these conditions, the Current Limit comparator will protect the Output Switch.

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8

MC34163, MC33163

The switch current is converted to a voltage by inserting a fractional ohm resistor, RSC, in series with VCC and output switch transistor Q2. The voltage drop across RSC is monitored by the Current Sense comparator. If the voltage drop exceeds 250 mV with respect to VCC, the comparator will set the latch and terminate output switch conduction on a cycle–by–cycle basis. This Comparator/Latch configuration ensures that the Output Switch has only a single on–time during a given oscillator cycle. The calculation for a value of R

R

SC

is:

SC

0.25 V



Ipk(Switch)

Figures 12 and 13 show that the Current Sense comparator threshold is tightly controlled over temperature and has a typical input bias current of 1.0 µA. The propagation delay from the comparator input to the Output Switch is typically 200 ns. The parasitic inductance associated with R

and the

SC

circuit layout should be minimized. This will prevent unwanted voltage spikes that may falsely trip the Current Limit comparator.

Internal thermal shutdown circuitry is provided to protect the IC in the event that the maximum junction temperature is exceeded. When activated, typically at 170°C, the Latch is forced into the “Set” state, disabling the Output Switch. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended to be used as a replacement for proper heatsinking.

Driver and Output Switch

To aid in system design flexibility and conversion efficiency, the driver current source and collector, and output switch collector and emitter are pinned out separately. This allows the designer the option of driving the output switch into saturation with a selected force gain or driving it near saturation when connected as a Darlington. The output switch has a typical current gain of 70 at 2.5 A and is designed to switch a maximum of 40 V collector to emitter, with up to 3.4 A peak collector current. The minimum value for R

R

SC(min)

SC

is:



0.25 V

3.4 A

 0.0735 

When configured for step–down or voltage–inverting applications, as in Figures 21 and 25, the inductor will forward bias the output rectifier when the switch turns off. Rectifiers with a high forward voltage drop or long turn–on delay time should not be used. If the emitter is allowed to go sufficiently negative, collector current will flow, causing

additional device heating and reduced conversion efficiency.

Figure 10 shows that by clamping the emitter to 0.5 V, the

collector current will be in the range 10 µA over temperature. A 1N5822 or equivalent Schottky barrier rectifier is recommended to fulfill these requirements.

A bootstrap input is provided to reduce the output switch saturation voltage in step–down and voltage–inverting converter applications. This input is connected through a series resistor and capacitor to the switch emitter and is used to raise the internal 2.0 mA bias current source above V An internal zener limits the bootstrap input voltage to V

CC

+7.0 V. The capacitor’s equivalent series resistance must limit the zener current to less than 100 mA. An additional series resistor may be required when using tantalum or other low ESR capacitors. The equation below is used to calculate a minimum value bootstrap capacitor based on a minimum zener voltage and an upper limit current source.

C

B(min)

 I

t

 4.0 mA

V

t

on

4.0 V

 0.001 t

on

Parametric operation of the MC34163 is guaranteed over a supply voltage range of 2.5 V to 40 V. When operating below 3.0 V, the Bootstrap Input should be connected to V

. Figure 16 shows that functional operation down to

CC

1.7 V at room temperature is possible.

Package

The MC34163 is contained in a heatsinkable 16–lead plastic dual–in–line package in which the die is mounted on a special heat tab copper alloy lead frame. This tab consists of the four center ground pins that are specifically designed to improve thermal conduction from the die to the circuit board. Figures 17 and 18 show a simple and effective method of utilizing the printed circuit board medium as a heat dissipater by soldering these pins to an adequate area of copper foil. This permits the use of standard layout and mounting practices while having the ability to halve the junction–to–air thermal resistance. These examples are for a symmetrical layout on a single–sided board with two ounce per square foot of copper.

APPLICATIONS

The following converter applications show the simplicity and flexibility of this circuit architecture. Three main converter topologies are demonstrated with actual test data shown below each of the circuit diagrams.

.

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9

MC34163, MC33163

p

(

)

-

+

Thermal

Current

Limit

9

10

11

Q

1

Q

R

Q

S

Latch

+

2

12

60

13

14

V

12 V

0.25 V

R

0.075

in

330

680 pF

8

SC

7

+

6

+

Oscillator

C

in

C

T

5

4

3

45 k

+

Low Voltage

Indicator Output

R 10 k

C

LVI

DLY

2

1

LVI

+

+ +

-

+

-

+

1.125 V

Feedback Comparator

15 k1.25 V

+

2.0 mA

7.0 V

1N5822

15

0.02

16

R

C

B

(Bottom View)

Test Condition Results

Line Regulation Vin = 8.0 V to 24 V, IO = 3.0 A 6.0 mV = ±0.06% Load Regulation Vin = 12 V, IO = 0.6 A to 3.0 A 2.0 mV = ±0.02% Output Ripple V Short Circuit Current V Efficiency, Without Bootstrap V Efficiency, With Bootstrap V

= 12 V, IO = 3.0 A 36 mVpp

in

= 12 V, RL = 0.1 Ω 3.3 A

in

= 12 V, IO = 3.0 A 76.7%

in

= 12 V, IO = 3.0 A 81.2%

in

2200

180 µH

L

Coilcraft LO451-A

+

C

O

V

out

5.05 V/3.0 A

Figure 21. Step–Down Converter

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

Q

3

15

16

(Bottom View)

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

15

16

(Bottom View)

Figure 22A. External NPN Switch Figure 22B. External PNP Saturated Switch

Figure 22. External Current Boost Connections for I

k

Greater Than 3.4 A

Switch

Q

3

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10

MC34163, MC33163

p

(

)

180 µH

V

12 V

-

+

Thermal

Current

Limit

9

10

11

Q

1

Q

R

Q

S

Latch

+

2

12

60

13

0.25 V

C

330

8

SC

7

+

6

+

Oscillator

in

C

T

R

0.075

in

680 pF

5

4

Coilcraft

L

LO451-A

1N5822

3

14

45 k

+ +

-

+

1.125 V

(Bottom View)

Feedback Comparator

15 k1.25 V

+

2.0 mA

7.0 V

15

16

V

+

C

O

330

out

28 V/600 mA

Low Voltage

Indicator

Output

2.2 k

2

1

R

LVI

1.0 k

R

1

R

47 k

2

LVI

+

+ +

-

Test Condition Results

Line Regulation Vin = 9.0 V to 16 V, IO = 0.6 A 30 mV = ±0.05% Load Regulation Vin = 12 V, IO = 0.1 A to 0.6 A 50 mV = ±0.09% Output Ripple V Efficiency V

= 12 V, IO = 0.6 A 140 mVpp

in

= 12 V, IO = 0.6 A 88.1%

in

Figure 23. Step–Up Converter

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

Q

3

15

16

(Bottom View)

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

Q3

15

16

(Bottom View)

Figure 24A. External NPN Switch Figure 24B. External PNP Saturated Switch

Figure 24. External Current Boost Connections for I

k

Greater Than 3.4 A

Switch

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11

MC34163, MC33163

p

(

)

+

Thermal

45 k

+

+ +

-

Current

Limit

+

+ +

-

+

1.125 V

(Bottom View)

R

Q

S

Latch

+

Feedback Comparator

15 k1.25 V

+

Q

1

60

2.0 mA

7.0 V

9

10

11

Q

2

12

13

Coilcraft LO451-A

14

L

180 µH

15

0.02

16

R

B

C

B

1N5822

V

out

2200

C

O

+

-12 V/1.0 A

V

in

12 V

C

470 pF

0.25 V

R

0.075

330

T

8

SC

7

+

6

+

Oscillator

C

in

5

4

3

2

1

LVI

R

2

R

953

1

8.2 k

Test Condition Results

Line Regulation Vin = 9.0 V to 16 V, IO = 1.0 A 5.0 mV = ±0.02% Load Regulation Vin = 12 V, IO = 0.6 A to 1.0 A 2.0 mV = ±0.01% Output Ripple V Short Circuit Current V Efficiency, Without Bootstrap V Efficiency, With Bootstrap V

= 12 V, IO = 1.0 A 130 mVpp

in

= 12 V, RL = 0.1 Ω 3.2 A

in

= 12 V, IO = 1.0 A 73.1%

in

= 12 V, I

in

= 1.0 A 77.5%

O

Figure 25. Voltage–Inverting Converter

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

15

Q

3

16

(Bottom View)

8

7

+

6

5

4

+

3

2

1

+

9

10

11

Q

1

Q

2

12

13

14

15

16

(Bottom View)

Figure 26A. External NPN Switch Figure 26B. External PNP Saturated Switch

Figure 26. External Current Boost Connections for I

k

Greater Than 3.4 A

Switch

Q

3

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12

MC34163, MC33163

+

MC34163 Step–Down

++

+

V

in

+-

in

C

+

V

+

2

LVI

R

1

R

T

C

R

SC

Bottom View Top View

++

MC34163 Step–Up

++

+

V

in

+

-

in

C

+

V

+

2

LVI

R

1

R

T

C

R

SC

O

-

B

C

B

R

L

O

-

O

C

+

O

C

+

L

+

MC34163 Voltage–Inverting

+

Bottom View Top View

++

+

V

in

+

-

in

C

+

V

O

+

2

R

T

C

R

B

1

C

R

SC

Bottom View Top View

All printed circuit boards are 2.58" in width by 1.9" in height.

Figure 27. Printed Circuit Board and Component Layout

(Circuits of Figures 21, 23, 25)

+

-

O

C

B

R

+

L

+

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13

MC34163, MC33163

Calculation Step–Down Step–Up Voltage–Inverting

|V

t

on

t

(Notes 1, 2, 3)

off

V

out

Vin V

sat

 V

F

 V

out

V

out

 VF–V

Vin–V

in

sat

|  V

out

Vin V

F

sat

t

on

t

on

C

T

I

L(avg)

I

pk (Switch)

R

SC

Vin V

L

V

ripple(pp)

V

out

The following Converter Characteristics must be chosen:



I

L

t

on



ƒ

t

off

32.143 · 10

I

L(avg)

I

pk (Switch)

sat

I

1



ƒ

8C

O



V

ref

off

 1

ƒ

I

out

0.25

L

2



R R



2 1



–6

I

L

2

 V

out

 (ESR)



 1

t

on

2

t



ƒ

t

32.143 · 10



I

out

I

L(avg)

I

pk (Switch)

Vin V



I





V

ref

t

on

t

off

on off

ƒ

t

on

t

off

0.25

L

tonI

C

R

2

R

1

 1



sat

out

O

 1

–6

I

2

t

t

on

t

off

t

on



L

on





ƒ

32.143 · 10



I

out

I

L(avg)

I

pk (Switch)

Vin V



I





V

ref

t

off

t t

ƒ

on off

0.25

L

tonI

C

R

2

R

1

 1



sat

out

O

 1

–6

I

t



L

2

on



Nominal operating input voltage.

Vin –

Desired output voltage.

V

–

out

Desired output current.

–

I

out

Desired peak–to–peak inductor ripple current. For maximum output current it is suggested that

∆I

–

L

than 10% of the average inductor current I threshold set by R reduce converter output current capability. Maximum output switch frequency.

 –

V

ripple(pp)

NOTES: 1. V

NOTES: 2. V NOTES: 3. The calculated t NOTES: 3. operating input voltage.

Desired peak–to–peak output ripple voltage. For best performance the ripple voltage should be kept to a low value

–

since it will directly affect line and load regulation. Capacitor C electrolytic designed for switching regulator applications.

– Saturation voltage of the output switch, refer to Figures 8 and 9.

sat

– Output rectifier forward voltage drop. Typical value for 1N5822 Schottky barrier rectifier is 0.5 V.

F

on/toff

∆I

be chosen to be less

. This will help prevent I

. If the design goal is to use a minimum inductance value, let ∆IL = 2(I

SC

must not exceed the minimum guaranteed oscillator charge to discharge ratio of 8, at the minimum

L(avg)

O

Figure 28. Design Equations

pk (Switch)

should be a low equivalent series resistance (ESR)

from reaching the current limit

L

). This will proportionally

L(avg)

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14

MC34163, MC33163

PACKAGE DIMENSIONS

PDIP–16

P SUFFIX

CASE 648C–04

ISSUE D

A

16 9

A

B

18

F

N

K

E

G

D

16X

0.005 (0.13) T

M

B

M

J

L

16X

0.005 (0.13) T

C

SEATING

T

PLANE

M

A

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

DIM MIN MAX MIN MAX

A 0.744 0.783 18.90 19.90 B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 E 0.050 BSC 1.27 BSC F 0.040 0.70 1.02 1.78

G 0.100 BSC 2.54 BSC

J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 L 0.300 BSC 7.62 BSC

M 0 10 0 10

N 0.015 0.040 0.39 1.01

MILLIMETERSINCHES



SO–16W

DW SUFFIX

CASE 751G–03

ISSUE B

16 9

M

B

H8X

M

0.25

0.25 B

14X

D

B16X

M

S

A

T

e

A



NOTES:

1. DIMENSIONS ARE IN MILLIMETERS.

2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994.

E



h X 45

81

B

S

A

L

A1

T

SEATING PLANE

C

3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION.

MILLIMETERS

DIM MIN MAX

A 2.35 2.65

A1 0.10 0.25

B 0.35 0.49 C 0.23 0.32 D 10.15 10.45

E 7.40 7.60 e 1.27 BSC

H 10.05 10.55

h 0.25 0.75 L 0.50 0.90

 0 7



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15

MC34163, MC33163

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

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For additional information, please contact your local Sales Representative.

MC34163/D

16

ON Semiconductor MC34163, MC33163 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual