ON Semiconductor MC14543B Technical data

MC14543B
BCD-to-Seven Segment Latch/Decoder/Driver for Liquid Crystals
Applications include instrument (e.g., counter, DVM etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses.
Latch Storage of Code
Blanking Input
Readout Blanking on All Illegal Input Combinations
Direct LED (Common Anode or Cathode) Driving Capability
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving 2 Low–power TTL Loads, 1 Low–power Schottky
TTL Load or 2 HTL Loads Over the Rated Temperature Range
Pin–for–Pin Replacement for CD4056A (with Pin 7 Tied to V
Chip Complexity: 207 FETs or 52 Equivalent Gates
MAXIMUM RATINGS (Voltages Referenced to V
Symbol
V
DD
V
I
in
P
T
T
stg
I
OHmax
I
OLmax
P
OHmax
P
OLmax
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/C From 65C To 125C
4. P
OHmax
DC Supply Voltage Range –0.5 to +18.0 V Input Voltage Range, All Inputs –0.5 to VDD + 0.5 V
in
DC Input Current per Pin ±10 mA Power Dissipation,
D
Operating Temperature Range –55 to +125 °C
A
Storage Temperature Range –65 to +150 °C Maximum Continuous Output
Drive Current (Source or Sink) Maximum Continuous Output
= IOH (VOH – VDD) and P
Parameter Value Unit
per Package (Note 3.)
Power (Source or Sink)
(4.)
= IOL (VOL – VSS)
OLmax
) (Note 2.)
SS
500 mW
10
(per Output)
70
(per Output)
SS
mA
mW
).
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MARKING
DIAGRAMS
16
PDIP–16
P SUFFIX
CASE 648
SOIC–16
D SUFFIX
CASE 751B
SOEIAJ–16
F SUFFIX
CASE 966
A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week
MC14543BCP
AWLYYWW
1
16
14543B
AWLYWW
1
16
MC14543B
ALYW
1
ORDERING INFORMATION
Device Package Shipping
MC14543BCP PDIP–16 2000/Box MC14543BD SOIC–16 48/Rail MC14543BDR2 SOIC–16 2500/Tape & Reel MC14543BF SOEIAJ–16 See Note 1. MC14543BFEL SOEIAJ–16 See Note 1.
1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid ap­plications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V range V
logic voltage level (e.g., either V puts must be left open.
(Vin or V
SS
Unused inputs must always be tied to an appropriate
should be constrained to the
out
) VDD.
out
or VDD). Unused out-
SS
Semiconductor Components Industries, LLC, 2000
August, 2000 – Rev. 4
1 Publication Order Number:
MC14543B/D
MC14543B
PIN ASSIGNMENT
1
LD
2
C
3
B
D
4
A
PH
6
7
BI
8
V
SS
V
16
DD
15
f
g
14
e
13
d
125
11
c
10
b
9
a
TRUTH TABLE
Inputs Outputs
LD BI Ph* D C B A a b c d e f g Display
X 1 0 X X X X 0 0 0 0 0 0 0 Blank 1 0 0 00 001111110 0
1 0 0 00 010110000 1 1 0 0 00 101101101 2 1 0 0 00 111111001 3
1 0 0 01 000110011 4 1 0 0 01 011011011 5 1 0 0 01 101011111 6 1 0 0 01 111110000 7
1 0 0 10 001111111 8 1 0 0 10 011111011 9 1 0 0 1 0 1 0 0 0 0 0 0 0 0 Blank 1 0 0 1 0 1 1 0 0 0 0 0 0 0 Blank
1 0 0 1 1 0 0 0 0 0 0 0 0 0 Blank 1 0 0 1 1 0 1 0 0 0 0 0 0 0 Blank 1 0 0 1 1 1 0 0 0 0 0 0 0 0 Blank 1 0 0 1 1 1 1 0 0 0 0 0 0 0 Blank
000XXXX ** ** † Inverse of Output Display
X = Don’t care † = Above Combinations * = For liquid crystal readouts, apply a square wave to Ph
For common cathode LED readouts, select Ph = 0 For common anode LED readouts, select Ph = 1
** = Depends upon the BCD code previously applied when LD = 1
Combinations as above
Above
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MC14543B
V
DD
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
V
DD
Characteristic Symbol
Output Voltage “0” Level
V
= VDD or 0
in
V
OL
Vdc
5.0 10 15
V
= 0 or V
in
“1” Level
DD
V
OH
5.0 10 15
Input Voltage “0” Level
(V
= 4.5 or 0.5 Vdc)
O
= 9.0 or 1.0 Vdc)
(V
O
(V
= 13.5 or 1.5 Vdc)
O
“1” Level
(V
= 0.5 or 4.5 Vdc)
O
(V
= 1.0 or 9.0 Vdc)
O
(V
= 1.5 or 13.5 Vdc)
O
Output Drive Current
(V
= 2.5 Vdc) Source
OH
= 4.6 Vdc)
(V
OH
(V
= 0.5 Vdc)
OH
(V
= 9.5 Vdc)
OH
(V
= 13.5 Vdc)
OH
(VOL = 0.4 Vdc) Sink (V
= 0.5 Vdc)
OL
= 9.5 Vdc)
(V
OL
(V
= 1.5 Vdc)
OL
Input Current I Input Capacitance C Quiescent Current
(Per Package) V
= 0 µA
I
out
Total Supply Current
= 0 or VDD,
in
(6.) (7.)
(Dynamic plus Quiescent, Per Package)
= 50 pF on all outputs, all
(C
L
V
IL
5.0 10 15
V
IH
5.0 10 15
I
OH
5.0
5.0 10 10 15
I
OL
5.0 10 10 15
in
in
I
DD
15 ±0.1 ±0.00001 ±0.1 ±1.0 µAdc — 5.0 7.5 pF
5.0 10 15
I
T
5.0 10 15
buffers switching)
5. Noise immunity specified for worst–case input combination. Noise Margin for both “1” and “0” level = 1.0 V min @ V
= 2.0 V min @ V = 2.5 V min @ V
6. To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + 3.5 x 10–3 (CL – 50) VDDf
where: I
is in µA (per package), CL in pF, VDD in V, and f in kHz is input frequency.
T
7. The formulas given are for the typical characteristics only at 25C.
– 55C 25C 125C
Min Max Min Typ
— — —
4.95
9.95
14.95
— — —
3.5
7.0 11
– 3.0
– 0.64
– 1.6 – 4.2
0.64
1.6 —
4.2
— — —
= 5.0 V
DD
= 10 V
DD
= 15 V
DD
SS
)
0.05
0.05
0.05 —
— —
1.5
3.0
4.0
— — —
— — — — —
— — — —
5.0 10 20
(5.)
— — —
4.95
9.95
14.95
— — —
3.5
7.0 11
– 2.4
– 0.51
– 1.3 – 3.4
0.51
1.3 —
3.4
— — —
0 0 0
5.0 10 15
2.25
4.50
6.75
2.75
5.50
8.25
– 4.2 – 0.88 – 10.1 – 2.25
– 8.8
0.88
2.25
10.1
8.8
0.005
0.010
0.015
IT = (1.6 µA/kHz) f + I IT = (3.1 µA/kHz) f + I IT = (4.7 µA/kHz) f + I
Max Min Max
0.05
0.05
0.05 —
— —
1.5
3.0
4.0
— — —
— — — — —
— — — —
5.0 10 20
DD DD DD
— — —
4.95
9.95
14.95
— — —
3.5
7.0 11
– 1.7
– 0.36
– 0.9 – 2.4
0.36
0.9 —
2.4
— — —
0.05
0.05
0.05 —
— —
1.5
3.0
4.0
— — —
— — — —
— — —
150 300 600
Unit
Vdc
Vdc
Vdc
Vdc
mAdc
mAdc
µAdc
µAdc
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