EMI9408
PRAETORIAN) L-C LCD and
Camera EMI Array with ESD
Protection
Functional Description
The EMI9408 is an inductor−based (L−C) EMI filter array with
ESD protection, which integrates eight filters in a uDFN package with
0.40 mm pitch. Each EMI filter channel of the EMI9408 is
implemented with the component value of
1.8 pF−35 nH–4.7 pF−35 nH–6 pF. The cut−off frequency at 3dB
attenuation is 300MHz and can be used in applications where the data
rates are as high as 160 Mbps, while providing greater than −35 dB
attenuation over the 800 MHz to 2.7 GHz frequency range. The parts
include ESD diodes on every I/O pin and provide a high level of
protection against electrostatic discharge (ESD). The ESD protection
diodes connected to the external filter ports are designed and
characterized to safely dissipate ESD strikes of ±14 kV, which is
beyond the maximum requirement of the IEC61000−4−2 international
standard.
This device is particularly well suited for wireless handsets, mobile
LCD modules and PDAs because of its small package format and
easy−to−use pin assignments. In particular, the EMI9408 is ideal for
EMI filtering and protecting data and control lines for the LCD display
and camera interface in mobile handsets.
The EMI9408 is housed in space saving, low profile, 0.40 mm pitch
uDFN packages in a RoHS compliant, Pb−Free format.
Features
• Eight Channels of EMI Filtering with Integrated ESD Protection
• Pi−Style EMI Filters in a Capacitor−Inductor Capacitor (C−L−C)
Network
• ±14 kV ESD Protection (IEC 61000−4−2 Level 4, Contact
Discharge) at External Pin
• Greater than −35 dB Attenuation (Typical) at 1 GHz
• uDFN Pb−Free Package with 0.40 mm Lead Pitch:
8−ch. = 16−lead uDFN
• uDFN Package Size:
16−Lead: 3.30 mm x 1.35 mm
• Increased Robustness Against Vertical Impacts During
Manufacturing Process
• These Devices are Pb−Free and are RoHS Compliant
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MARKING
DIAGRAMS
UDFN16
16
1
(*Note: Microdot may be in either location)
1
16 15 14 13 12 11 10 9
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
CASE 517BE
LE = Specific Device Code
M = Month Code
G = Pb−Free Package
PINOUTS
Internal Pins
(Lower ESD Event)
2345678
GND
External Pins
(Higher ESD Event)
(Bottom View)
ORDERING INFORMATION
LE MG
G
1
Applications
• LCD and Camera Data Lines in Mobile Nandsets
• I/O Port Protection for Mobile Handsets, Notebook
Computers, PDAs, etc.
• EMI Filtering for Data Ports in Cell Phones, PDAs or
Notebook Computer
© Semiconductor Components Industries, LLC, 2012
November, 2012 − Rev. 1
• Wireless Handsets
• Handheld PCs/PDAs
• LCD and Camera Modules
1 Publication Order Number:
EMI9408/D
EMI9408
Figure 1. Electrical Schematic
Table 1. PIN DESCRIPTIONS
Pin # Name Description
1 FILTER1 Filter + ESD Channel 1 (Internal)
2 FILTER2 Filter + ESD Channel 2 (Internal)
3 FILTER3 Filter + ESD Channel 3 (Internal)
4 FILTER4 Filter + ESD Channel 4 (Internal)
5 FILTER5 Filter + ESD Channel 5 (Internal)
6 FILTER6 Filter + ESD Channel 6 (Internal)
7 FILTER7 Filter + ESD Channel 7 (Internal)
8 FILTER8 Filter + ESD Channel 8 (Internal)
9 FILTER8 Filter + ESD Channel 8 (External)
10 FILTER7 Filter + ESD Channel 7 (External)
11 FILTER6 Filter + ESD Channel 6 (External)
12 FILTER5 Filter + ESD Channel 5 (External)
13 FILTER4 Filter + ESD Channel 4 (External)
14 FILTER3 Filter + ESD Channel 3 (External)
15 FILTER2 Filter + ESD Channel 2 (External)
16 FILTER1 Filter + ESD Channel 1 (External)
GND PAD GND Device Ground
SPECIFICATIONS
MAXIMUM RATINGS
Parameter Value Unit
Storage Temperature Range –65 to +150 °C
Current per Inductor 15 mA
DC Package Power Rating 500 mW
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
STANDARD OPERATING CONDITIONS
Parameter Rating Unit
Operating Temperature Range –40 to +85 °C
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2
EMI9408
ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol Parameter Conditions Min Typ Max Unit
L
TOT
R
TOT
CTOT_0V Total Channel Capacitance, 0 V bias 0 V dc; 1 MHz, 30 mV
CTOT_2.5V Total Channel Capacitance, 2.5 V bias 2.5 V dc; 1 MHz, 30 mV
VST Stand−off Voltage
ILEAK Diode Leakage Current VIN = +3.3 V 0.1 0.5
VSIG Signal Clamp Voltage Positive Clamp
VESD In−system ESD Withstand Voltage
V
C
fC
1. TA = 25°C unless otherwise specified.
2. ESD applied to input and output pins with respect to GND, one at a time.
3. Unused pins are left open.
4. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
Total Channel Inductance 70 nH
Total Channel DC Resistance 45
17.5 24 pF
11.5 pF
6.8
−0.8
13.7
20
−4.4
−7.6
345 MHz
9.0
−0.4
Negative Clamp
a) Contact discharge per IEC 61000−4−2
standard, Level 4 (External Pins)
b) Contact discharge per IEC 61000−4−2
standard, Level 4 (Internal Pins)
c) Air Discharge per IEC61000−4−2
standard, Level 4 (External Pins)
Clamping Voltage
TLP (Note 4)
See Figures 4 through 7
Cut−off frequency ZSOURCE = 50 W,
LOAD = 50 W
Z
I = 10 mA
ILOAD = 10 mA
I
LOAD = −10 mA
Notes 2 and 3
IPP = 8 A
I
= 16 A
PP
IPP = −8 A
IPP = −16 A
rms
rms
5.5 V
5.6
−1.5
±14
±2
±16
W
mA
V
kV
V
PERFORMANCE INFORMATION
TYPICAL FILTER PERFORMANCE
(TA = 25°C, DC Bias = 0 V, 50 W Environment)
Figure 2. Typical Filter Insertion Loss
ORDERING
EMI9408MUTAG 16 LE UDFN16
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
INFORMATION
Device Pins Marking Package Shipping
(Pb−Free)
TYPICAL DIODE CAPACITANCE VS. INPUT
VOLTAGE
Figure 3. Filter Capacitance vs. Input Voltage
(Normalized to Capacitance at 0 VDC and 25°C)
†
3000 / Tape & Reel
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3
EMI9408
CURRENT (A)
VOLTAGE (V)
Figure 4. Positive TLP I−V Curve Figure 5. Negative TLP I−V Curve
Transmission Line Pulse (TLP) Measurement
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 6. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 7 where an 8 kV IEC 61000−4−2
current waveform into a short is compared with TLP current
pulses at 8 A and 16 A, also into a short. A TLP I−V curve
shows the voltage at which the device turns on, as well as
how well the device clamps voltage over a range of current
levels. Typical TLP I−V curves for the EMI9404 are shown
in Figures 4 and 5 for positive and negative stress
respectively. Application note AND9007/D gives more
CURRENT (A)
VOLTAGE (V)
detail on TLP datasheet parameters, while application note
AND9006/D provides a more complete explanation of the
use of TLP for understanding protection product
characteristics.
L
Attenuator
S
50 W Coax
Cable
÷
50 W Coax
Cable
Figure 6. Simplified Schematic of a Typical TLP
10 MW
V
C
System
I
M
V
M
Oscilloscope
DUT
Figure 7. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
PRAETORIAN is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
16
1
SCALE 4:1
UDFN16, 3.3x1.35, 0.4P
CASE 517BE−01
ISSUE O
DATE 18 NOV 2009
2X
0.10 C
PIN ONE
REFERENCE
2X
0.05 C
16X
0.05 C
NOTE 4
16X
PACKAGE
OUTLINE
0.10 C
L
K
D
A
B
E
TOP VIEW
DETAIL A
8
916
16X
A
A1
E2
b
0.10 B
0.05ACC
DETAIL B
SIDE VIEW
D2
1
e
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
3.00
(A3)
C
16X
0.40
SEATING
PLANE
NOTE 3
L1
EXPOSED Cu
A1
L
DETAIL A
OPTIONAL
CONSTRUCTIONS
DETAIL B
OPTIONAL
CONSTRUCTION
NOTES:
L
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.25 mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MILLIMETERS
MOLD CMPD
A3
DIM MIN MAX
A 0.45 0.55
A1 0.00 0.05
A3 0.13 REF
b 0.15 0.25
D 3.30 BSC
D2 2.70 2.90
E 1.35 BSC
E2 0.30 0.50
e 0.40 BSC
K 0.15 −−−
L 0.20 0.30
L1 −−− 0.05
GENERIC
MARKING DIAGRAM*
XX MG
G
1
XX = Specific Device Code
M = Month Code
G = Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
1.55
0.50
16X
0.40
PITCH
DIMENSIONS: MILLIMETERS
0.25
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
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the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
98AON47062E
UDFN16, 3.3X1.35, 0.4P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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