NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base−emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT−553 package which is designed for low power surface mount
applications.
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
= 25°C unless otherwise noted)
A
CBO
CEO
100mAdc
230 (Note 1)
338 (Note 2)
1.8 (Note 1)
2.7 (Note 2)
540 (Note 1)
370 (Note 2)
264 (Note 1)
287 (Note 2)
− 55 to +150°C
P
R
R
TJ, T
C
D
q
JA
q
JL
stg
50Vdc
50Vdc
mW
°C/W
°C/W
°C/W
http://onsemi.com
NPN SILICON
BIAS RESISTOR
TRANSISTORS
(3)(1)(2)
R1
R2
DT
r2
(4)
5
1
CASE 463B
MARKING
DIAGRAM
5
XX M G
G
1
xx = Device Code
xx= UF (EMG5)
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
UP (EMG2)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
4000 / Tape & Reel
8000 / Tape & Reel
4000 / Tape & Reel
8000 / Tape & Reel
†
http://onsemi.com
6
SOT−553
D
−X−
45
12 3
e
EMG2DXV5T1, EMG5DXV5T1
E
−Y−
b 5 PL
0.08 (0.003)X
M
PACKAGE DIMENSIONS
XV5 SUFFIX
5−LEAD PACKAGE
CASE 463B−01
ISSUE B
A
Y
L
H
E
c
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
DIMAMINNOMMAXMIN
b0.170.220.270.007
c
D1.501.601.700.059
E1.101.201.300.043
e0.50 BSC
L0.100.200.300.004
H
E
MILLIMETERS
0.500.550.600.020
0.080.130.18
1.501.601.700.0590.0630.067
0.0030.0050.007
INCHES
NOMMAX
0.0220.024
0.0090.011
0.0630.067
0.0470.051
0.020 BSC
0.0080.012
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
1.35
0.0531
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
0.0394
0.5
0.0197
0.5
0.0197
SCALE 20:1
ǒ
inches
mm
Ǔ
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
7
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
EMG5DXV5/D
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