ON Semiconductor EMC2DXV5T1-D, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1 Service Manual

EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
Preferred Devices
Dual Common Base−Collector Bias Resistor Transistors
NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
The BR T (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the EMC2DXV5T1 series, two complementary BRT devices are housed in the SOT−553 package which is ideal for low power surface mount applications where board space is at a premium.
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R1
Q1
45
5
CASE 463B
R2
R1
SOT−553
R2
Q2
1
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These are Pb−Free Devices
MAXIMUM RATINGS (T
and Q2, − minus sign for Q1 (PNP) omitted)
Rating Symbol Value Unit
Collector-Base Voltage V Collector-Emitter Voltage V Collector Current I
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
= 25°C unless otherwise noted, common for Q
A
CBO CEO
C
50 Vdc 50 Vdc
100 mAdc
1
MARKING DIAGRAM
Ux M G
G
Ux = Specific Device Code
x = C, 3, E, or 5 M = Date Code G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use and best overall value.
© Semiconductor Components Industries, LLC, 2007
April, 2007 − Rev. 5
1 Publication Order Number:
EMC2DXV5T1/D
EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
ONE JUNCTION HEATED
Total Device Dissipation
TA = 25°C Derate above 25°C
Thermal Resistance, Junction-to-Ambient
BOTH JUNCTIONS HEATED
Total Device Dissipation
TA = 25°C
Derate above 25°C Thermal Resistance, Junction-to-Ambient Junction and Storage Temperature TJ, T
1. FR−4 @ Minimum Pad
DEVICE ORDERING INFORMATION, MARKING AND RESISTOR VALUES
Transistor 1 − PNP Transistor 2 − NPN
Device Marking R1 (K) R2 (K) R1 (K) R2 (K) Package Shipping
EMC2DXV5T1 EMC2DXV5T1G SOT−553* EMC2DXV5T5 SOT−553* EMC2DXV5T5G SOT−553* EMC3DXV5T1 EMC3DXV5T1G SOT−553* EMC3DXV5T5 SOT−553* EMC3DXV5T5G SOT−553* EMC4DXV5T1 EMC4DXV5T1G SOT−553* EMC4DXV5T5 SOT−553* EMC4DXV5T5G SOT−553* EMC5DXV5T1 EMC5DXV5T1G SOT−553* EMC5DXV5T5 SOT−553* EMC5DXV5T5G SOT−553*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
UC 22 22 22 22
U3 10 10 10 10
UE 10 47 47 47
U5 4.7 10 47 47
P
R
P
R
D
q
JA
D
q
JA
stg
SOT−553*
SOT−553*
SOT−553*
SOT−553*
357 (Note 1)
2.9 (Note 1)
mW
mW/°C
350 (Note 1) °C/W
500 (Note 1)
4.0 (Note 1)
mW
mW/°C
250 (Note 1) °C/W
− 55 to +150 °C
4000 / Tape & Reel
8000 / Tape & Reel
4000 / Tape & Reel
8000 / Tape & Reel
4000 / Tape & Reel
8000 / Tape & Reel
4000 / Tape & Reel
8000 / Tape & Reel
250
200
150
100
R
= 833°C/W
q
50
, POWER DISSIPATION (MILLIWATTS)
D
P
0
−50 0 50 100 150
JA
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
A
Characteristic Symbol Min Typ Max Unit
Q1 TRANSISTOR: PNP OFF CHARACTERISTICS
Collector-Base Cutoff Current (V
= 50 V, IE = 0) I
CB
Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0) I Emitter-Base Cutoff Current EMC2DXV5T1
(VEB = 6.0, IC = 5.0 mA) EMC3DXV5T1
EMC4DXV5T1 EMC5DXV5T1
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0) Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0) V DC Current Gain EMC2DXV5T1
(VCE = 10 V, IC = 5.0 mA) EMC3DXV5T1
EMC4DXV5T1
EMC5DXV5T1 Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) V Output Voltage (on) (VCC = 5.0 V, V Output Voltage (off) (VCC = 5.0 V, V
= 2.5 V, RL = 1.0 kW)
B
= 0.5 V, RL = 1.0 kW)
B
Input Resistor EMC2DXV5T1
EMC3DXV5T1, EMC4DXV5T1
EMC5DXV5T1 Resistor Ratio EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1
EMC5DXV5T1
Q2 TRANSISTOR: NPN OFF CHARACTERISTICS
Collector-Base Cutoff Current (VCB = 50 V, IE = 0) I Collector-Emitter Cutoff Current (VCB = 50 V, IB = 0) I Emitter-Base Cutoff Current EMC2DXV5T1
(VEB = 6.0, IC = 5.0 mA) EMC3DXV5T1
EMC4DXV5T1, EMC5DXV5T1
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0) Collector-Emitter Breakdown Voltage (IC = 2.0 mA, IB = 0) V DC Current Gain EMC2DXV5T1
(VCE = 10 V, IC = 5.0 mA) EMC3DXV5T1
EMC4DXV5T1, EMC5DXV5T1 Collector−Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) V Output Voltage (on) (VCC = 5.0 V, V Output Voltage (off) (VCC = 5.0 V, V
= 2.5 V, RL = 1.0 kW)
B
= 0.5 V, RL = 1.0 kW)
B
Input Resistor EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1, EMC5DXV5T1 Resistor Ratio EMC2DXV5T1
EMC3DXV5T1
EMC4DXV5T1, EMC5DXV5T1
CBO CEO
I
EBO
V
(BR)CBO (BR)CEO
h
FE
CE(SAT)
V
OL
V
OH
R1 15.4
R1/R2 0.8
CBO CEO
I
EBO
V
(BR)CBO (BR)CEO
h
FE
CE(SAT)
V
OL
V
OH
R1 15.4
R1/R2 0.8
100 nAdc
500 nAdc
0.2
0.5
0.2
1.0
mAdc
50 Vdc 50 Vdc 60
35 80 20
100
60
140
35
0.25 Vdc
0.2 Vdc
4.9 Vdc
7.0
3.3
0.8
0.17
0.38
22 10
4.7
1.0
1.0
0.21
0.47
28.6 13
6.1
1.2
1.2
0.25
0.56
100 nAdc
500 nAdc
0.2
0.5
0.1
mAdc
50 Vdc 50 Vdc 60
35 80
100
60
140
0.25 Vdc
0.2 Vdc
4.9 Vdc
7.0 33
0.8
0.8
22 10 47
1.0
1.0
1.0
28.6 13 61
1.2
1.2
1.2
kW
kW
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EMC2DXV5T1, EMC3DXV5T1, EMC4DXV5T1, EMC5DXV5T1
TYPICAL ELECTRICAL CHARACTERISTICS − EMC2DXV5T1 PNP TRANSISTOR
10
IC/IB = 10
1
TA=−25°C
0.1
0.01
, COLLECTOR EMITTER SATURATION VOLTAGE (V)
0 20 50
CE(sat)
V
4
3
2
IC, COLLECTOR CURRENT (mA)
Figure 2. V
CE(sat)
versus I
C
25°C
75°C
40
f = 1 MHz lE = 0 mA TA = 25°C
1000
100
, DC CURRENT GAIN
FE
10
100
VCE = 10 V
TA=75°C
25°C
−25°C
1
IC, COLLECTOR CURRENT (mA)
10
100
Figure 3. DC Current Gain
25°C
75°C
10
1
TA=−25°C
, CAPACITANCE (pF)
ob
C
0.1
1
0
VR, REVERSE BIAS VOLTAGE (V)
Figure 4. Output Capacitance
, INPUT VOLTAGE (VOLTS)
in
V
100
10
0.1
VO = 0.2 V
TA=−25°C
1
0 10 20 30
IC, COLLECTOR CURRENT (mA)
50010 203040
75°C
, COLLECTOR CURRENT (mA) h
C
I
0.01
0.001
0 1 2 3 4
Vin, INPUT VOLTAGE (V)
5 6 7 8 9 10
Figure 5. Output Current versus Input Voltage
25°C
40 50
VO = 5 V
Figure 6. Input Voltage versus Output Current
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