ON Semiconductor CS5151H Technical data

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CS5151H
CPU 4-Bit Nonsynchronous Buck Controller
The CS5151H is specifically designed to power Pentium processors with MMXTechnology and other high performance core logic. It includes the following features: on board, 4–bit DAC, short circuit protection, 1.0% output tolerance, V programmable Soft Start capability. The CS5151H is upwards compatible with the 5–bit CS5156H, allowing the mother board designer the capability of using either the CS5151H or the CS5156H with no change in layout. The CS5151H is available in 16 pin surface mount package.
Features
N–Channel Design
Excess of 1.0 MHz Operation
100 ns Transient Response
4–Bit DAC
Upward Compatible with 5–Bit CS5155H/CS5156H
30 ns Gate Rise/Fall Times
1.0% DAC Accuracy
5.0 V & 12 V Operation
Remote Sense
Programmable Soft Start
Lossless Short Circuit Protection
V
Monitor
CC
Adaptive Voltage Positioning
2
V
Control Topology
Current Sharing
Overvoltage Protection
) using 12 V to power the IC and 5.0 V or
CC
monitor, and
CC
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16
1
SOIC–16
D SUFFIX
CASE 751B
A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week
PIN CONNECTIONS
1
V
ID0 ID1 ID2
V
ID3
C
OFF
V
FFB
ORDERING INFORMATION
Device Package Shipping
CS5151HGD16 SO–16 CS5151HGDR16
16
1
16
SO–16
MARKING DIAGRAM
CS5151H AWLYWW
V
FB
COMPV LGNDV V
CC1
NCSS PGNDNC
V
GATE
V
CC2
48 Units/Rail
2500 Tape & Reel
Semiconductor Components Industries, LLC, 2001
January , 2001 – Rev. 3
1 Publication Order Number:
CS5151H/D
CS5151H
12 V
5.0 V
0.1 µF 1200 µF/16 V × 3
AIEI
2.1 V to 3.5 V @ 13 A
V
ID0
V
ID1
V
ID2
V
ID3
330 pF
CC1
V
CC2
CS5151H
V
GATE
MBR735
IRL3103
2.0 µH
3
1,2
V
V
ID0
V
ID1
V
ID2
V
ID3
C
OFF
PGND
SS
0.1 µF
0.33 µF
COMP
LGND
V
FB
3.3 k
V
FFB
1200 µF/16 V × 5
AIEI
100 pF
Figure 1. Application Diagram, Switching Power Supply for Core Logic – Pentium Processor with
MMX Technology
ABSOLUTE MAXIMUM RATINGS*
Rating Value Unit
Operating Junction Temperature, T
J
0 to 150 °C Lead Temperature Soldering: Reflow: (SMD styles only) (Note 1.) 230 peak °C Storage Temperature Range, T
S
–65 to +150 °C
ESD Susceptibility (Human Body Model) 2.0 kV
1. 60 second maximum above 183°C. *The maximum package power dissipation must be observed.
ABSOLUTE MAXIMUM RATINGS
Pin Name Max Operating Voltage Max Current
V
CC1
V
CC2
SS 6.0 V/–0.3 V –100 µA
COMP 6.0 V/–0.3 V 200 µA
V
FB
C
OFF
V
FFB
V
– V
ID0
ID3
V
GATE
LGND 0 V 25 mA
PGND 0 V 100 mA DC/1.5 A peak
16 V/–0.3 V 25 mA DC/1.5 A peak 20 V/–0.3 V 20 mA DC/1.5 A peak
6.0 V/–0.3 V –0.2 µA
6.0 V/–0.3 V –0.2 µA
6.0 V/–0.3 V –0.2 µA
6.0 V/–0.3 V –50 µA 20 V/–0.3 V 100 mA DC/1.5 A peak
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CS5151H
ELECTRICAL CHARACTERISTICS (0°C < T
DAC Code: V
Characteristic
ID2
= V
ID1
= V
ID0
= 1; V
ID3
= 0
CV
;
GATE
< +70°C; 0°C < TJ < +125°C; 8.0 V < V
A
= 1.0 nF; C
= 330 pF; CSS = 0.1 µF, unless otherwise specified.)
OFF
< 14 V; 5.0 V < V
CC1
Test Conditions Min Typ Max Unit
CC2
< 20 V;
Error Amplifier
Bias Current VFB = 0 V 0.3 1.0 µA
V
FB
Open Loop Gain 1.25 V < V
< 4.0 V; Note 2. 50 60 dB
COMP
Unity Gain Bandwidth Note 2. 500 3000 kHz COMP SINK Current V COMP SOURCE Current V COMP CLAMP Current V
= 1.5 V; VFB = 3.0 V; VSS > 2.0 V 0.4 2.5 8.0 mA
COMP
= 1.2 V; VFB = 2.7 V; VSS = 5.0 V 30 50 80 µA
COMP
= 0 V; VFB = 2.7 V 0.4 1.0 1.6 mA
COMP
COMP High Voltage VFB = 2.7 V; VSS = 5.0 V 4.0 4.3 5.0 V COMP Low Voltage VFB = 3.0 V 160 600 mV PSRR 8.0 V < V
V
Monitor
CC1
< 14 V @ 1.0 kHz; Note 2. 60 85 dB
CC1
Start Threshold Output switching 3.75 3.90 4.05 V Stop Threshold Output not switching 3.70 3.85 4.00 V Hysteresis Start–Stop 50 mV
DAC
Input Threshold V Input Pull Up Resistance V
ID0,
ID0,
V
, V
, V
ID1
ID2
ID3
V
, V
, V
ID1
ID2
ID3
1.00 1.25 2.40 V 25 50 100 k
Pull Up Voltage 4.85 5.00 5.15 V Accuracy (all codes except 1111) Measure VFB = V V
ID3
V
ID2
V
ID1
V
ID0
, 25°C ≤ TJ 125°C 1.0 %
COMP
1 1 1 1 1.2191 1.2440 1.2689 V 1 1 1 0 2.1186 2.1400 2.1614 V 1 1 0 1 2.2176 2.2400 2.2624 V 1 1 0 0 2.3166 2.3400 2.3634 V 1 0 1 1 2.4156 2.4400 2.4644 V 1 0 1 0 2.5146 2.5400 2.5654 V 1 0 0 1 2.6136 2.6400 2.6664 V 1 0 0 0 2.7126 2.7400 2.7674 V 0 1 1 1 2.8116 2.8400 2.8684 V 0 1 1 0 2.9106 2.9400 2.9694 V 0 1 0 1 3.0096 3.0400 3.0704 V 0 1 0 0 3.1086 3.1400 3.1714 V 0 0 1 1 3.2076 3.2400 3.2724 V 0 0 1 0 3.3066 3.3400 3.3734 V 0 0 0 1 3.4056 3.4400 3.4744 V 0 0 0 0 3.5046 3.5400 3.5754 V
2. Guaranteed by design, not 100% tested in production.
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CS5151H
ELECTRICAL CHARACTERISTICS (continued) (0°C < T
5.0
V < V
< 20 V; DAC Code: V
CC2
ID2
= V
ID1
= V
ID0
=1; V
ID3
< +70°C; 0°C < TJ < +125°C; 8.0 V < V
A
=
CV
0;
GATE(L)
and CV
GATE(H)
= 1.0 nF; C
< 14 V;
CC1
= 330 pF; CSS = 0.1 µF, unless
OFF
otherwise specified.)
Characteristic
V
GATE
Out SOURCE Sat at 100 mA Measure V Out SINK Sat at 100 mA Measure V Out Rise Time 1.0 V < V Out Fall Time 9.0 V > V
Test Conditions Min Typ Max Unit
CC2
GATE
GATE
GATE
– V
GATE
– V
PGND
< 9.0 V; V > 1.0 V; V
CC1
CC1
= V
= 12 V 30 50 ns
CC2
= V
= 12 V 30 50 ns
CC2
1.2 2.0 V – 1.0 1.5 V
Shoot–Through Current Note 3. 50 mA V
Resistance Resistor to LGND. Note 3. 20 50 100 k
GATE
V
Schottky LGND to V
GATE
@ 10 mA 600 800 mV
GATE
Soft Start (SS)
Charge Time 1.6 3.3 5.0 ms Pulse Period 25 100 200 ms Duty Cycle (Charge Time /Pulse Period) × 100 1.0 3.3 6.0 % COMP Clamp Voltage VFB = 0 V; VSS = 0 0.50 0.95 1.10 V V
SS Fault Disable V
FFB
= Low 0.9 1.0 1.1 V
GATE
High Threshold 2.5 3.0 V
PWM Comparator
Transient Response
V
Bias Current V
FFB
V
= 0 to 5.0 V to V
FFB
V
= V
CC2
= 12 V
CC1
= 0 V 0.3 µA
FFB
= 9.0 V to 1.0 V;
GATE
100 125 ns
Supply Current
I
CC1
I
CC2
Operating I Operating I
C
OFF
CC1
CC2
Normal Charge Time V Extension Charge Time VSS = V Discharge Current C
No Switching 8.5 13.5 mA No Switching 1.6 3.0 mA VFB = COMP = V VFB = COMP = V
= 1.5 V; VSS = 5.0 V 1.0 1.6 2.2 µs
FFB
FFB
to 5.0 V; VFB > 1.0 V 5.0 mA
OFF
FFB
FFB
= 0 5.0 8.0 11.0 µs
8.0 13 mA – 2.0 5.0 mA
Time Out Timer
Time Out Time
Fault Mode Duty Cycle V
VFB = V
Record V
FFB
; V
COMP
= 2.0 V;
FFB
Pulse High Duration
GATE
10 30 65 µs
= 0V 35 50 70 %
3. Guaranteed by design, not 100% tested in production.
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CS5151H
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
16 Lead SO Narrow
1, 2, 3, 4 V
5 SS Soft Start Pin. A capacitor from this pin to LGND in conjunc-
6, 12 NC No Connection.
7 C
PIN SYMBOL FUNCTION
ID0–VID3
OFF
Voltage ID DAC input pins. These pins are internally pulled up to 5.0 V providing logic ones if left open. The DAC range is 2.14 V to 3.54 V with 100 mV increments. V select the desired DAC output voltage. Leaving all 4 DAC
ID0
– V
ID3
input pins open results in a DAC output voltage of 1.244 V, allowing for adjustable output voltage, using a traditional resistor divider .
tion with internal 60 µA current source provides Soft Start function for the controller. This pin disables fault detect func­tion during Soft Start. When a fault is detected, the Soft Start capacitor is slowly discharged by internal 2.0 µA current source setting the time out before trying to restart the IC. Charge/discharge current ratio of 30 sets the duty cycle for the IC when the regulator output is shorted.
A capacitor from this pin to ground sets the time duration for the on board one shot, which is used for the constant off time architecture.
8 V
FFB
Fast feedback connection to the PWM comparator. This pin is connected to the regulator output. The inner feedback loop terminates on time.
9 V
10 V
CC2
GATE
Boosted power for the gate driver. MOSFET driver pin capable of 1.5 A peak switching current.
11 PGND High current ground for the IC. The MOSFET driver is refer-
enced to this pin. Input capacitor ground and the anode of the Schottky diode should be tied to this pin.
13 V
CC1
Input power for the IC.
14 LGND Signal ground for the IC. All control circuits are referenced to
this pin.
15 COMP Error amplifier compensation pin. A capacitor to ground
should be provided externally to compensate the amplifier.
16 V
FB
Error amplifier DC feedback input. This is the master voltage feedback which sets the output voltage. This pin can be con­nected directly to the output or a remote sense trace.
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