OKI MSM9841GS-2K Datasheet

FEDL9841-04
FEDL9841-04
¡ Semiconductor
This version: Jul. 2000
Previous version: Jun. 1999
MSM9841¡ Semiconductor
MSM9841
Recording and Playback LSI with Built-in FIFO
This document contains minimum specifications. For full specifications, please contact your nearest Oki office or representative.
GENERAL DESCRIPTION
The MSM9841 is a mono/stereo record and playback LSI with a built-in 1K bit FIFO for easy interface with external systems or non-semiconductor memory. It utilizes multiple record and playback modes, including the new ADPCM2 algorithm, which allows for even higher quality sound reproduction. The record and playback functions of the MSM9841 is controlled by an MCU via 8/16-bit bus interface.
• 16/8-bit bus interface support
• FIFO capacity: User-definable (256/512/1024 bits) (buffering time of 32 ms when using 8 kHz sampling frequency, 4-bit ADPCM2/ADPCM, and in monaural playback)
• Supports four compression algorithms for record and playback: 4, 5, 6, 7, 8-bit ADPCM2; 4-bit ADPCM; 8; 16-bit PCM; and 8-bit Nonlinear PCM
• Sampling frequency: 4.0 kHz, 6.4 kHz, 8.0 kHz, 12.8 kHz, 16.0 kHz, 32.0 kHz* (fosc=4.096 MHz)
• Sampling frequency: 22.05 kHz*, 44.1 kHz* (fosc=5.6448 MHz)
• For the built-in ADC, set the sampling frequency at 16 kHz or less.
• DMA interface support
• Volume control (8 steps: 0 dB to –21 dB)
• Built-in 14-bit A/D converter
• Built-in 14-bit D/A converter
• Built-in low pass filter (LPF) : (input side: analog LPF)
: (output side: digital LPF)
• Power supply voltage: 2.7 V to 5.5 V
• Package: 56-pin plastic QFP (QFP56-P-910-0.65-2K) (Product name: MSM9841GS-2K)
*note 32 kHz, 22.05 kHz and 44.1 kHz are available only for playback.
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BLOCK DIAGRAM
MOUT LOUT AOUTL AOUTR
FEDL9841-04
MSM9841¡ Semiconductor
MIN
LIN
EMP
MID
FUL/DREQR
CH/DACKR
D15 to D0
WR
RD
CS
D/C
BUSY
FIFO
MCU
I/F
input side
LPF
Analyzer
Synthesizer
DMA I/F
output side
LPF
DAC DAC
Volume Controller
ADC
ADPCM2/ADPCM/PCM
ADPCM2/ADPCM/PCM/Non-linear PCM
DREQL DACKL IOW IOR
output side
LPF
Timing Controller
VCK XT XT RESET
External
DAC/ADC I/F
SG AV
DD
AGND DV
DD
DGND
ADSD
DASD
SIOCK
TEST0 TEST1
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PIN CONFIGURATION (TOP VIEW)
FEDL9841-04
MSM9841¡ Semiconductor
D0
D1
D2
D3
NC
D4
D5
D6
D7
NC
D8
D9
D10
D11
XTXTIOR
56NC55545352515049484746454443
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15NC16171819202122232425262728
D12
D13
D14
IOW
D15
DREQL
DACKL
NC
DGND
DGND
AGND
TEST1
TEST0
MIN
MOUT
VCK
LIN
ADSD
LOUT
DASD
SG
SIOCK
42
41
40
39
38
37
36
35
34
33
32
31
30
29
OUTL
BUSY D/C CS RD WR
FUL/DREQR
MID
EMP
CH/DACKR
RESET
NC
DV
DD
AV
DD
AOUTR
NC : No Connection
56-pin plastic QFP
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