OKI MSM51V17805BSL-60JS, MSM51V17805B-70JS, MSM51V17805B-60JS, MSM51V17805BSL-70TS-K, MSM51V17805BSL-60TS-K Datasheet
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377
¡ Semiconductor MSM51V17805B/BSL
DESCRIPTION
The MSM51V17805B/BSL is a 2,097,152-word ¥ 8-bit dynamic RAM fabricated in Oki's silicon-gate
CMOS technology. The MSM51V17805B/BSL achieves high integration, high-speed operation, and
low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/
double-layer metal CMOS process. The MSM51V17805B/BSL is available in a 28-pin plastic SOJ or
28-pin plastic TSOP. The MSM51V17805BSL (the self-refresh version) is specially designed for
lower-power applications.
FEATURES
• 2,097,152-word ¥ 8-bit configuration
• Single 3.3 V power supply, ±0.3 V tolerance
• Input : LVTTL compatible, low input capacitance
• Output : LVTTL compatible, 3-state
• Refresh : 2048 cycles/32 ms, 2048 cycles/128 ms (SL version)
• Fast page mode with EDO, read modify write capability
• CAS before RAS refresh, hidden refresh, RAS-only refresh capability
• CAS before RAS self-refresh capability (SL version)
• Multi-bit test mode capability
• Package options:
28-pin 400 mil plastic SOJ (SOJ28-P-400-1.27)
(Product : MSM51V17805B/BSL-xxJS)
28-pin 400 mil plastic TSOP (TSOPII28-P-400-1.27-K)
(Product : MSM51V17805B/BSL-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
¡ Semiconductor
MSM51V17805B/BSL
2,097,152-Word ¥ 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
MSM51V17805B/BSL-70
70 ns
124 ns
84 ns
396 mW
540 mW
Family
Access Time (Max.)
Cycle Time
(Min.)
Standby (Max.)
Power Dissipation
MSM51V17805B/BSL-50
t
RAC
50 ns
35 ns
t
AA
25 ns
20 ns
t
CAC
13 ns
20 ns
t
OEA
13 ns
MSM51V17805B/BSL-60
60 ns
104 ns 468 mW
30 ns 15 ns 15 ns
Operating (Max.)
1.8 mW/
0.72 mW (SL version)
E2G0079-17-41
378
MSM51V17805B/BSL ¡ Semiconductor
PIN CONFIGURATION (TOP VIEW)
3
4
5
9
10
11
12
13
DQ2
DQ3
DQ4
A10R
A0
A1
A2
A3
26
25
24
20
19
18
17
16
DQ7
DQ6
DQ5
A8
A7
A6
A5
A4
2
DQ1 27 DQ8
1
V
CC
28 V
SS
28-Pin Plastic SOJ
3
4
5
9
10
11
12
13
26
25
24
20
19
18
17
16
2
27
1
28
28-Pin Plastic TSOP
(K Type)
6WE 23 CAS 23
8NC 21 A9 21
6
8
7RAS 22 OE 227
14V
CC
15 V
SS
14 15
DQ2
DQ3
DQ4
A10R
A0
A1
A2
A3
DQ1
V
CC
WE
NC
RAS
V
CC
DQ7
DQ6
DQ5
A8
A7
A6
A5
A4
DQ8
V
SS
CAS
A9
OE
V
SS
Pin Name Function
A0 - A9, A10R
Address Input
RAS Row Address Strobe
CAS Column Address Strobe
DQ1 - DQ8 Data Input/Data Output
OE Output Enable
WE Write Enable
V
CC
Power Supply (3.3 V)
V
SS
Ground (0 V)
Note : The same power supply voltage must be provided to every VCC pin, and the same GND
voltage level must be provided to every VSS pin.
379
¡ Semiconductor MSM51V17805B/BSL
BLOCK DIAGRAM
Timing
Generator
Refresh
Control Clock
Column
Address
Buffers
Internal
Address
Counter
Row
Address
Buffers
Row
Decoders
Word
Drivers
Memory
Cells
Sense Amplifiers
Column Decoders
I/O
Controller
I/O
Selector
Output
Buffers
Input
Buffers
On Chip
V
BB
Generator
V
CC
DQ1 - DQ8
CAS
WE
A0 - A9
10 10
8
8
8
8
88
11
10
OE
RAS
V
SS
1
A10R
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