
263
¡ Semiconductor MSM5117805B
DESCRIPTION
The MSM5117805B is a 2,097,152-word ¥ 8-bit dynamic RAM fabricated in Oki's silicon-gate CMOS
technology. The MSM5117805B achieves high integration, high-speed operation, and low-power
consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer
metal CMOS process. The MSM5117805B is available in a 28-pin plastic SOJ or 28-pin plastic TSOP.
FEATURES
• 2,097,152-word ¥ 8-bit configuration
• Single 5 V power supply, ±10% tolerance
• Input : TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 2048 cycles/32 ms
• Fast page mode with EDO, read modify write capability
• CAS before RAS refresh, hidden refresh, RAS-only refresh capability
• Multi-bit test mode capability
• Package options:
28-pin 400 mil plastic SOJ (SOJ28-P-400-1.27) (Product : MSM5117805B-xxJS)
28-pin 400 mil plastic TSOP (TSOPII28-P-400-1.27-K) (Product : MSM5117805B-xxTS-K)
(TSOPII28-P-400-1.27-L) (Product : MSM5117805B-xxTS-L)
xx indicates speed rank.
PRODUCT FAMILY
¡ Semiconductor
MSM5117805B
2,097,152-Word ¥ 8-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
MSM5117805B-70
70 ns
130 ns
90 ns
605 mW
825 mW
Family
Access Time (Max.)
Cycle Time
(Min.)
Standby (Max.)
Power Dissipation
MSM5117805B-50
t
RAC
50 ns
35 ns
t
AA
25 ns
20 ns
t
CAC
13 ns
20 ns
t
OEA
13 ns
MSM5117805B-60
60 ns
110 ns 715 mW
30 ns 15 ns 15 ns
Operating (Max.)
5.5 mW
E2G0047-17-41

264
MSM5117805B ¡ Semiconductor
PIN CONFIGURATION (TOP VIEW)
3
4
5
9
10
11
12
13
DQ2
DQ3
DQ4
A10R
A0
A1
A2
A3
26
25
24
20
19
18
17
16
DQ7
DQ6
DQ5
A8
A7
A6
A5
A4
2
DQ1 27 DQ8
1
V
CC
28 V
SS
28-Pin Plastic SOJ
3
4
5
9
10
11
12
13
26
25
24
20
19
18
17
16
2
27
1
28
26
25
24
20
19
18
17
16
3
4
5
9
10
11
12
13
27
2
28
1
28-Pin Plastic TSOP
(K Type)
28-Pin Plastic TSOP
(L Type)
6WE 23 CAS 23 23 6
8NC 21 A9 21 21 8
6
8
7RAS 22 OE 22 22 77
14V
CC
15 V
SS
14 15 15 14
DQ2
DQ3
DQ4
A10R
A0
A1
A2
A3
DQ1
V
CC
WE
NC
RAS
V
CC
DQ7
DQ6
DQ5
A8
A7
A6
A5
A4
DQ8
V
SS
CAS
A9
OE
V
SS
DQ2
DQ3
DQ4
A10R
A0
A1
A2
A3
DQ1
V
CC
WE
NC
RAS
V
CC
DQ7
DQ6
DQ5
A8
A7
A6
A5
A4
DQ8
V
SS
CAS
A9
OE
V
SS
Pin Name Function
A0 - A9, A10R
Address Input
RAS Row Address Strobe
CAS Column Address Strobe
DQ1 - DQ8 Data Input/Data Output
OE Output Enable
WE Write Enable
V
CC
Power Supply (5 V)
V
SS
Ground (0 V)
NC No Connection
Note : The same power supply voltage must be provided to every VCC pin, and the same GND
voltage level must be provided to every VSS pin.

265
¡ Semiconductor MSM5117805B
BLOCK DIAGRAM
Timing
Generator
Refresh
Control Clock
Column
Address
Buffers
Internal
Address
Counter
Row
Address
Buffers
Row
Decoders
Word
Drivers
Memory
Cells
Sense Amplifiers
Column Decoders
I/O
Controller
I/O
Selector
Output
Buffers
Input
Buffers
On Chip
V
BB
Generator
V
CC
DQ1 - DQ8
CAS
WE
A0 - A9
10 10
8
8
8
8
88
11
10
OE
RAS
On Chip
IV
CC
Generator
V
SS
1
A10R