OKI MR27V3255D Technical data

查询MR27V3255D供应商
¡
Semiconductor
MR27V3255D
1,048,576-Double Word x 32-Bit or 2,097,152-Word x 16-Bit 8-Double Word x 32-Bit or 16-Word x 16-Bit Page Mode One Time PROM
DESCRIPTION
The MR27V3255D is a 32Mbit electrically Programmable Read-Only Memory with page mode. Its configuration can be electrically switched between 1,048,576 double word x 32bit and 2,097,152 word x 16bit. The MR27V3255D operates on a single +3.3V power supply and is TTL compatible. The MR27V3255D provides Page mode which can greatly reduce the read access time. Since the MR27V3255D operates asynchronously , external clocks are not required , making this device easy­to-use. The MR27V3255D is suitable as large-capacity fixed memory for microcomputers and data terminals. It is manufactured using a CMOS double silicon gate technology and is offered in 70-pin SSOP or 70-pin TSOP packages.
FEATURES
• 1,048,576 double word x 32bit / 2,097,152 word x 16bit electrically switchable configuration
• Single +3.3V power supply
• Access time 80ns Page mode access time 25ns
• Input / Output TTL compatible
• Three-state output
• Packages 70-pin plastic SSOP (SSOP70-P-500-0.80-K) (Product name : MR27V3255DMB) 70-pin plastic TSOP (TSOP II 70-P-400-0.65-K) (Product name : MR27V3255DTA)
1A
November 1999
1/10
PIN CONFIGURATION (TOP VIEW)
V
A0 A1 A2 A3 A4 A5
V
CC
D0
D16
D1
D17
V
SS
V
CC
D2
D18
D3
D19
D4
D20
D5
D21
V
SS
V
CC
D6
D22
D7
D23
V
SS
A6 A7 A8
A9 A10 A11 A12
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36
PP
NC NC WORD OE CE
V
SS
D31/A-1 D15 D30 D14 V
SS
V
CC
D29 D13 D28 D12 D27 D11 D26 D10 V
SS
V
CC
D25 D9 D24 D8
V
CC
A19 A18 A17 A16 A15 A14 A13
MR27V3255D
PIN NAMES
FUNCTIONS
D31/A-1 Data output / Address input A0 - A19 Address input D0 - D30 Data output
CE OE
V
CC
V
SS
WORD
V
PP
NC
Chip enable Output enable Power supply voltage
GND
Mode switch Program power supply voltage Non connection
70-pin SSOP , TSOP (II)
2/10
BLOCK DIAGRAM
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
Address Buffer
A-1
X16/X32 Switch
CE WORDOE
CE PGMOE
Row Decoder
Column Decoder
MR27V3255D
Memory Matrix
1,048,576X32-Bit or 2,097,152X16-Bit
Multiplexer & Page Data Latch
Output Buffer
FUNCTION TABLE
MODE READ (32-Bit) READ (16-Bit)
OUTPUT DISABLE
STAND-BY PROGRAM
PROGRAM INHIBIT PROGRAM VERIFY
* : Don't Care (H or L or Open)
D0
D2
D4
D6
D8
D10
D12
D14
D16
D18
D20
D22
D24
D1
D3
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
In 16-bit output mode, these pins are three-stated and pin D31 functions as the A-1 address pin.
CE OE
LL L
L
LH
H
*
WORD
H
L
H
L
H
L
V
PP
LH H H Hi-Z
L
9.75V
HL
V
CC
D16 - D30D0 - D15
D
D
OUT
3.3V
*
Hi-Z Hi-Z
Hi-Z
D
IN
Hi-Z
4.0V D
OUT
Hi-Z
D25
OUT
D26
D27
D28
D29
D30
D31
D31/A-1
L/H
*
*
L/H
L/H
3/10
Loading...
+ 7 hidden pages