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PEDR27V3202E-01-01
1
MR27V3202E
2,097,152–Word ×××× 16–Bit or 4,194,304–Word ×××× 8–Bit One Time PROM
GENERAL DESCRIPTION
The MR27V3202E is a 32 Mbit electrically Programmable Read-Only Memory that can be electrically switched
between 2,097,152-word × 16-bit and 4,194,304-word × 8-bit configurations. This device operates on a single
+3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it
requires no external clocks, making this device easy-to-use.
The MR27V3202E is suitable as large-capacity fixed memory for microcomputers and data terminals. It is
manufactured using a CMOS double silicon gate technology and is offered in 44-pin SOP or 44-pin TSOP(II)
packages.
FEATURES
∙ 2097,152-word × 16-bit/4,194,304-word × 8-bit electrically switchable configuration
∙ +3.3 V power supply
∙ Access time 90 ns MAX
∙ Operating current 50 mA MAX
∙ Standby current 50 µA MAX
∙ Input/Output TTL compatible
∙ Three-state output
∙ Packages:
44-pin plastic SOP (SOP44-P-600-1.27-K) (Product Name : MR27V3202EMA)
44-pin plastic TSOP (TSOP II 44-P-400-0.80-K) (Product Name : MR27V3202ETP)
Semiconductor
Preliminary
This version : Dec. 1999
Previous version: ----------
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)
Semiconductor
PIN CONFIGURATION (TOP VIEW)
PEDR27V3202E-01-01
MR27V3202E
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
V
OE
D0
D8
D1
D9
D2
D10
D3
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
SS
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A20
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE/V
V
SS
D15/A–1
D7
D14
D6
D13
D5
D12
D4
V
CC
PP
44-pin SOP, TSOP(II
Pin name Functions
D15/A–1 Data output/Address input
A0 to A20 Address input
D0 to D14 Data output
CE Chip enable
OE Output enable
BYTE/V
V
CC
V
SS
PP
Mode switch/Program power supply voltage
Power supply voltage
GND
NC Non connection
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A0
Semiconductor
BLOCK DIAGRAM
PEDR27V3202E-01-01
MR27V3202E
A–1
× 8/× 16 Switch
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
Address Buffer
CE BYTE/V
OE
CE PGMOE
Memory Cell Matrix
2,097,152 × 16-Bit or 4,194,304 × 8-Bit
Row Decoder
Multiplexer
Output Buffer
Column Decoder
D0 D2 D4 D6 D8 D10 D12 D14
D1 D3 D5 D7 D9 D11 D13 D15
PP
In 8-bit output mode, these pins
are three-stated and pin D15
functions as the A-1 address pin.
FUNCTION TABLE
Mode CE OE BYTE/V
PP
Read (16-Bit) L L H D
Read (8-Bit) L L L D
Output disable L H
Standby H ∗
H
L
H
L
Program L H D
Program inhibit H H Hi–Z
9.75 V 4.0 V
Program verify H L
∗
: Don’t Care (H or L)
V
CC
3.3 V
D0 to D7 D8 to D14 D15/A–1
OUT
Hi–Z L/H
Hi–Z
Hi–Z
D
OUT
∗
∗
IN
OUT
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