OKI ML64P168-xxxGP, ML64P168-NGA, ML64P168-NGP, ML64P168-xxxGA Datasheet

FEDL64P168-01

This version: Sep. 27,1999

Semiconductor

Previous version: Jun.

22,1999

ML64P168

4-Bit Microcontroller with Built-in RC Oscillation Type A/D Converter and LCD Driver

GENERAL DESCRIPTION

The ML64P168 is a one-time-programmable ROM-version product, which has one-time PROM (OTP) as internal program memory. On the other hand, the ML64168 is a mask ROM-version product, which has mask ROM as internal program memory. Unlike the mask ROM-version product (ML64168), the ML64P168 cannot be supplied in the form of a chip. The ML64P168 has two operation modes, microcontroller operation mode and PROM mode. The microcontroller operation mode is used to operate the ML64P168 like a ML64168 and the PROM mode is used to program or read the PROM.

The ML64P168 is a low power 4-bit microcontroller incorporating the Oki’s original CPU core nX4/30. The ML64P168 provides a minimum instruction execution time of 4.3µs (@700kHz). The ML64P168 contains 8160-byte program memory, 512-nibble data memory, three 4-bit input-output ports, 4-bit input port, 4-bit output port, 2-channel RC oscillation type A/D converter, LCD driver for up to 120 segments, and buzzer output port.

APPLICATION

The ML64P168 is best suited for low power, high precision thermometers and hygrometers.

FEATURES

∙ Processing speed

Minimum instruction execution time : 4.3 µs @700 kHz

91.6 µs @32.768 kHz

∙ Clock generation circuit

Low-speed clock : 32.768 kHz crystal oscillator High-speed clock : 700 kHz RC oscillator ( with an external resistor ) CPU clock is selectable as Low-speed clock / High-speed clock by software.

∙ Operating voltage : 1.5 V spec. / 3.0 V spec. ( selectable by mask option )

1.45 to 1.70 V (1.5V spec.)

2.7 to 3.5 V (3.0V spec.)

∙ Operating temperature : 0 to +65°C

The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date.

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∙ Memory space

Internal program memory : 8160 bytes Internal data memory : 512 nibbles

∙ RC oscillation type A/D converter : 2 channels

Time division 2-channel method Counter A : 1 / ( 10 Counter B : 1 / 2

4

× 8 ) × 1

14

× 1

∙ I/O port

Input-output port : 3 ports× 4 bits Input port : 1 port× 4 bits Output port : 1 port× 4 bits

( 8 out of the 34 LCD driver outputs can be used as

output-only ports by mask option. )

∙ LCD driver : 34 outputs

(1) At 1/4 duty and 1/3 bias : 120 segments (max.) (2) At 1/3 duty and 1/3 bias : 93 segments (max.) (3) At 1/2 duty and 1/2 bias : 64 segments (max.) Voltage Regulator for LCD Driver (selectable by mask option)

The LCD panel display is stable regardless of temporary supply voltage drop, because the voltage generated by the voltage regulator for LCD driver is supplied to the bias voltage generator as a reference voltage.

LCD Operating Voltage

When the voltage regulator for LCD driver is used

: 3.6 V ( Duty cycle = 1/4 or 1/3 ) : 2.4 V ( Duty cycle = 1/2 )

When the voltage regulator for LCD driver is not used

: 4.5 V ( Duty cycle = 1/4 or 1/3 ) : 3.0 V ( Duty cycle = 1/2 )

∙ Buzzer driver : 1 output ( 4 output modes selectable ) ∙ Serial port : Synchronous 8-bit transfer

Selectable as external clock / internal clock

Selectable as MSB first / LSB first

∙ Capture circuit : 2 channels ( 32Hz, 64Hz, 128Hz, 256Hz ) ∙ Battery check circuit : 1 ( incorporated into the input-only port ) ∙ Watchdog timer ∙ Interrupt

External interrupt : 2 sources Internal interrupt : 8 sources

∙ Package:

80-pin plastic QFP ( QFP80-P-1420-0.80-BK )

Product name : ML64P168 - xxxGP ( written PROM )

ML64P168 - NGP ( blanked PROM ) 80-pin plastic QFP ( QFP80-P-1414-0.65-K )

Product name : ML64P168 - xxxGA ( written PROM )

ML64P168 - NGA ( blanked PROM )

xxx indicates a code number.

ML64P168

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PROGRAM DEVELOPMENT ENVIRONMENT

∙ Structured Assembler : SASM64K ∙ In Circuit Emulator : EASE64168 ∙ Debugger : DT64K

ML64P168

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BLOCK DIAGRAM

BSR

MIEF

HALT

TIMING

CONTROLLER

C

B A

SP

CPU CORE: nX-4/30

DATA BUS ( 8 )

TR0

ALU

DATA BUS ( 8 )

TR1TR2

PCH

PCM PCL

X YH L

IR

DECORDER

IR

ROMR

ML64P168

V

PP

PROM

8160

Bytes

OSC1 OSC2

XT XT

RST

TST1

TST2

2CLK

RSTC

TST

INT

TBC

BC

RAM

512

Nibbles

5

INT

SIOP

ADDRESS BUS

BIAS

V V V

C1

DD1

DD2

DD3

C2

BD

BD

LCD

L0 L1

to

L33

IN0

CS0 RS0

CRT0

RT0

IN1 CS1 RS1

RT1

INT

INT

CAPR

INTC

WDT

ADC

INT

INT

V

DDI

P2 P3 P4

V

DDI

P2.0 P2.1

to

P4.3

P1.0

P1

P1.1 P1.2

P1.3

V

DDI

P0.0

P0

P0.1 P0.2

P0.3

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PIN CONFIGURATION (TOP VIEW)

L0

L1

L2

L3

L4

L5

L6

L7

L8

L9

L10

L11

L12

L13

L14

L15

L16

P2.0

P2.1

P2.2

P2.3

P3.0

P3.1

P3.2

P0.3

80

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

P0.2

79

P0.1

78

P0.0

77

P1.3

76

P1.2

75

P1.1

74

P1.0

73

TST2

72

TST1

71

RESET

XT

70

69

XT

68

DD

V

67

OSC1

OSC2

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

ML64P168

L33 / P6.3

L32 / P6.2

L31 / P6.1

L30 / P6.0

L29 / P5.3

L28 / P5.2

L27 / P5.1

L26 / P5.0

L25

L24

L23

L22

L21

L20

L19

L18

L17

C2

C1

DD3

V

DD2

V

DDI

V

DD1

V

RT1

25

P3.3

26

P4.0

27

28

29

30

31

32

33

34

PPVSS

BD

P4.1

P4.2

P4.3

V

RT0

CRT0

( GP : QFP80-P-1420-0.80-BK )

80-Pin Plastic QFP

35

RS0

36

CS0

37

IN0

38

IN1

39

CS1

40

RS1

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PIN CONFIGURATION (TOP VIEW) ( continued )

L1

L0

L2

L3

L4

L5

L6

L7

L8

L9

L10

L11

L12

L13

L14

L15

L16

P2.0

P2.1

P2.2

P2.3

P3.0

10

11

12

13

14

15

16

17

18

19

20

P0.3

80

79

78

1

2

3

4

5

6

7

8

9

P0.2

77

P0.1

76

P0.0

75

P1.3

74

P1.2

73

P1.1

72

P1.0

71

TST2

70

TST1

69

RESET

XT

68

67

XT

66

DD

V

65

OSC1

64

OSC2

63

L33 / P6.3

L32 / P6.2

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

ML64P168

L31 / P6.1

L30 / P6.0

L29 / P5.3

L28 / P5.2

L27 / P5.1

L26 / P5.0

L25

L24

L23

L22

L21

L20

L19

L18

L17

C2

C1

V

DD3

V

DD2

V

DDI

21

P3.1

22

P3.2

23

P3.3

24

P4.0

25

26

27

28

29

30

31

32

PPVSS

BD

P4.1

P4.2

P4.3

V

RT0

CRT0

( GA : QFP80-P-1414-0.65-K )

80-Pin Plastic QFP

33

RS0

34

CS0

35

IN0

36

IN1

37

CS1

38

RS1

39

RT1

40

DD1

V

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ML64P168

PIN DESCRIPTIONS

The basic functions of each pin of the ML64P168 is described in Table 1. A symbol with a slash ( / ) denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For Type, “ - ” denotes a power supply pin, “ I ” an input pin, “O” an output pin, and “I/O” an inputoutput pin.

Table 1 Pin Descriptions ( Basic Functions )

Function Symbol

SS

V

DD

V

DD1

V

DD2

V

Power

Supply

DD3

V

DDI

V

Pin No.

GP GA

Type Description

32 30 - 0V power supply

67 65 - Positive power supply

42 40 -

44 42 -

45 43 -

Bias output for driving LCD (+1.5 V, +1.2 V* )

Bias output for driving LCD (+3.0 V, +2.4 V* )

Bias output for driving LCD (+4.5 V, +3.6 V* )

43 41 - Positive power supply for I/O port interface

PP

V

C1 46 44 -

C2 47 45 -

XT

XT 68 66 O

31 29 - Power supply (+12.5 V) for PROM writing

Pins for connecting a capacitor for generating LCD driving bias

69 67 I

Low-speed clock oscillation input and output pins. Connect to a crystal ( 32.768 kHz ).

Oscillation

Test

OSC1 66 64 I

OSC2 65 63 O

TST1

TST2

71 69 I

72 70 I

High-speed clock oscillation input and output pins. Connect to an external resistor for oscillation ( R

Input pins for testing. A pull-up resistor is internally connected to these pins.

System reset input pin.

Reset

RESET

70 68 I

Setting this pin to ″ L ″ level puts this device into a reset state. Then, setting this pin to ″ H ″ level starts executing an instruction from address 0000H.

*When the voltage regulator for LCD driver is used.

OS

).

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Table 1 Pin Descriptions ( Basic Functions ) ( continued )

Function Symbol

P0.0/

INT1/

CAPIN0

P0.1/

INT1/

CAPIN1

P0.2/

INT1

P0.3/

INT1/

CMP

P1.0 73 71

P1.1 74 72

P1.2 75 73

Pin No.

GP GA

77 75

78 76

79 77

80 78

Type Description

4-bit input port ( Port 0 ) Selectable as pull-up resistor input, pull-down resistor input, or high impedance input by the port 01 control register ( P01CON ).

I

4-bit output port ( Port 1 ) Selectable as NMOS open drain output or CMOS output by

O

the port 01 control register ( P01CON ). P1.0 is a high current drive output port.

ML64P168

Ports

P1.3 76 74

P2.0/

INT0

P2.1/

INT0

P2.2/

INT0

P2.3/

INT0

P3.0/

INT0

P3.1/

INT0

P3.2/

INT0

18 16

19 17

20 18

21 19

22 20

23 21

24 22

P3.3/

INT0/

25 23

SIN

P4.0/

INT0/

26 24

SOUT

P4.1/

INT0/

27 25

SPR

P4.2/

INT0/

28 26

SCLK

P4.3/

INT0/

29 27

MON

I/O

I/O

I/O

4-bit input-output port ( Port 2 ) Fllowing can be specified for each bit by the port 2 control registers 0 to 3 ( P20CON to P23CON ). (1) input or output (2) pull-up/pull-down resistor input or high impedance input (3) NMOS open drain output or CMOS output

4-bit input-output port ( Port 3 ) Following can be specified for each bit by the port 3 control registers 0 to 3 ( P30CON to P33CON ). (1) input or output (2) pull-up/pull-down resistor input or high impedance input (3) NMOS open drain output or CMOS output

4-bit input-output port ( Port 4 ) Following can be specified for each bit by the port 4 control registers 0 to 3 ( P40CON to P43CON ). (1) input or output (2) pull-up/pull-down resistor input or high impedance input (3) NMOS open drain output or CMOS output

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Table 1 Pin Descriptions ( Basic Functions ) ( continued )

Function Symbol

Buzzer BD 30 28 O Output pin for the buzzer driver.

RT03331O

CRT0 34 32 O

RS0 35 33 O

CS0 36 34 O

A/D

Converter

IN0 37 35 I

RT14139O

RS1 40 38 O

CS1 39 37 O

IN1 38 36 I

Pin No.

GP GA

Type Description

Resistance temperature sensor connection pin ( for channel 0 ) Resistance/capacitance temperature sensor connection pin ( for channel 0 ) Reference resistor connection pin ( for channel 0 ) Reference capacitor connection pin ( for channel 0 ) Input pin for RC oscillator circuit ( for channel 0 ) Resistance temperature sensor connection pin ( for channel 1 ) Reference resistor connection pin ( for channel 1 ) Reference capacitor connection pin ( for channel 1 ) Input pin for RC oscillator circuit ( for channel 1 )

ML64P168

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Table 1 Pin Descriptions ( Basic Functions ) ( continued )

Function Symbol

L0 1 79 O

L1 2 80 O

L2 3 1 O

L3 4 2 O

L4 5 3 O

L5 6 4 O

L6 7 5 O

L7 8 6 O

L8 9 7 O

L9 10 8 O

L10 11 9 O

Pin No.

GP GA

ML64P168

Type Description

LCD segment and common signals output pins.

LCD

Driver

L11 12 10 O

L12 13 11 O

L13 14 12 O

L14 15 13 O

L15 16 14 O

L16 17 15 O

L17 48 46 O

L18 49 47 O

L19 50 48 O

L20 51 49 O

L21 52 50 O

L22 53 51 O

L23 54 52 O

L24 55 53 O

L25 56 54 O

L26 / P5.0 57 55 O

L27 / P5.1 58 56 O

L28 / P5.2 59 57 O

LCD segment and common signals output pins. These pins can be configured to be output ports by a mask option.

L29 / P5.3 60 58 O

L30 / P6.0 61 59 O

L31 / P6.1 62 60 O

L32 / P6.2 63 61 O

L33 / P6.3 64 62 O

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Function Symbol

P2.0/

INT0

P2.1/

INT0

P2.2/

INT0

P2.3/

INT0

P3.0/

INT0

P3.1/

INT0

P3.2/

INT0

P3.3/

External

Interrupt

INT0

P4.0/

INT0

P4.1/

INT0

P4.2/

INT0

P4.3/

INT0

P0.0/

INT1

P0.1/

INT1

P0.2/

INT1

P0.3/

INT1

P0.0/

Capture

trigger

CAPIN0

P0.1/

CAPIN1

P3.3/

SIN

P4.0/

Serial

port

SOUT

P4.1/

SPR

P4.2/

SCLK

Table 2 Pin Descriptions ( Secondary Functions )

Pin No.

GP GA

18 16

19 17

20 18

21 19

22 20

23 21

24 22

25 23

26 24

27 25

28 26

29 27

77 75

78 76

79 77

80 78

77 75

78 76

25 23 I

26 24 O

27 25 O

28 26 I/O

Type Description

Secondary functions of P2.0 to P2.3, P3.0 to P3.3, and P4.0 to P4.3: Level-triggered external 0 interrupt input pins. The change of input signal level causes an interrupt to occur.

I

I

I

Secondary functions of P0.0 to P0.3: Level-triggered external 1 interrupt input pins. The change of input signal level causes an interrupt to occur.

I

Secondary functions of P0.0: This pin is assigned the capture circuit trigger input pin of CAPR0 function .

I

Secondary functions of P0.1: This pin is assigned the capture circuit trigger input pin of CAPR1 function . Secondary functions of P3.3: This pin is assigned the data input of a serial port. Secondary functions of P4.0: This pin is assigned the data output of a serial port. Secondary functions of P4.1: This pin is assigned the ready output of a serial port. Secondary functions of P4.2: This pin is assigned the clock input-output of a serial port.

ML64P168

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Table 2 Pin Descriptions ( Secondary Functions ) ( continued )

Function Symbol

RC

Oscillation

Monitor

Battery

Check

P4.3/

MON

P0.3/

CMP

Pin No.

GP GA

Type Description

29 27 O

80 78 I

ML64P168

Secondary functions of P4.3: This pin is a monitor output of the RC oscillation clock for an A/D converter and a 700kHz RC oscillation clock for a system clock. Secondary functions of P0.3: This pin is an analog comparator input pin for battery check circuit.

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MEMORY MAPS

Program Memory ( PROM )

1FFFH

1FE0H

003EH

Interrupt area

0020H

Test program area

8160 bytes

ML64P168

32 bytes

Contents of interrupt area

003BH Watchdog interrupt

0038H External 0 interrupt

0035H Serial port interrupt

0032H External 1 interrupt

002FH A/D converter interrupt

002CH 256Hz interrupt

0029H 32Hz interrupt

0026H 16Hz interrupt

0023H 1Hz interrupt

0020H 0.1Hz interrupt

CZP area

0010H

0000H

Start address

8 bits

Program Memory Map

Address 0000H is the instruction execution start address by the system reset. The CZP area from address 0010H to address 001FH is the start address for the CZP subroutine of 1byte call instruction. The start address of interrupt subroutine is assigned to the interrupt address from address 0020H to 003DH. The user area has 8160 bytes of address 0000H to 1FDFH. No program can be stored in the test program area.

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ML64P168

Data Memory

The data memory area consists of 8 banks and each bank has 256 nibbles ( 256 × 4 bits ). The data RAM is assigned to BANK 6, BANK 7 and peripheral ports are assigned to BANK 0.

7FFH

780H

700H

6FFH

600H

BANK7

Data RAM area

( 256 nibbles )

512 nibbles

BANK6

Data RAM area

( 256 nibbles )

Data / Stack area ( 128 nibbles )

Contents of 000H to 07FH

07FH

Inaccessible area

SFR area

100H

0FFH

080H

07FH

000H

Unused area

BANK0

000H

4 bits

Data Memory Map

Half the BANK 7 of Data RAM area ( 128 nibbles ) is shared by the stack area. The stack is a memory starting from address 7FFH toward the low-order addresses where 4 nibbles are used by Subroutine Call Instruction and 8 nibbles are used by an interrupt. The addresses 080H to 0FFH of BANK 0 are not assigned as the data memory, so access to these addresses has no effect. Moreover, it is impossible to access BANK 1 to BANK 5.

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ABSOLUTE MAXIMUM RATINGS ( 1.5

Parameter Symbol Condition Rating Unit

Power supply voltage 1 V

Power supply voltage 2 V

Power supply voltage 3 V

Power supply voltage 4 V

Power supply voltage 5 V

Input voltage 1 V

Input voltage 2 V

Output voltage 1 V

Output voltage 2 V

Output voltage 3 V

Output voltage 4 V

Output voltage 5 V

Power Dissipation PD

Storage temperature T

DD1

DD2

DD3

DDI

DD

IN1

IN2

OUT1

OUT2

OUT3

OUT4

OUT5

STG

VDD input, Ta = 25°C

DDI

V

DD1

V

DD2

V

DD3

V

VDD output, Ta = 25°C

DDI

V

QFP80-P-1420-0.80-BK

QFP80-P-1414-0.65-K

V Spec. )

(VSS = 0V)

Ta = 25°C -0.3 to + 2.0 V

Ta = 25°C -0.3 to + 4.0 V

Ta = 25°C

Ta = 25°C

Ta = 25°C

-0.3 to + 5.5 V

-0.3 to + 5.5 V

-0.3 to + 2.0 V

-0.3 to VDD+ 0.3 V

input, Ta = 25°C

output, Ta = 25°C

output, Ta = 25°C

output, Ta = 25°C

-0.3 to V

-0.3 to V

-0.3 to V

-0.3 to V

DDI

+ 0.3 V

DD1

+ 0.3 V

DD2

+ 0.3 V

DD3

+ 0.3 V

-0.3 to VDD+ 0.3 V

output, Ta = 25°C

Ta = 0 to + 65°C

Ta = 0 to + 65°C

-0.3 to VDD+ 0.3 V

381 mW

334 mW

- -55 to + 150

ML64P168

°

C

RECOMMENDED OPERATING CONDITIONS ( 1.5V Spec. )

Parameter Symbol Condition Rating Unit

VDD,V

DDI

V

R

XT

op

OS

DD1

-0 to + 65

- 1.45 to 1.70 V

- 2.70 to 5.25 V

- 60 to 200

- 30 to 35 kHz

Operating Temperature* T

Operating Voltage*

External 700kHz RC Oscillator Resistance*

Crystal oscillation frequency* f

* : At Non-regulated LCD driver.

In case of select a voltage regulated LCD driver, see P.37/51.

(VSS = 0V)

°

C

Ω

k

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ELECTRICAL CHARACTERISTICS ( 1.5

DC Characteristics ( 1.5 V Spec. )

(VSS=0V, V

Parameter Symbol Condition Min. Typ. Max. Unit

DD2

V

Vo l t a ge * V

DD3

V

Vo l t a ge * V

Crystal Oscillation Start Voltage Crystal Oscillation Hold Voltage Crystal Oscillation Stop Detection Time Internal Crystal Oscillator Capacitance External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance Internal 700kHz RC Oscillator Capacitance

700kHz RC Oscillation Frequency

POR Generation Vo l t a g e POR Non-generation Vo l t a g e Battery Check Reference Voltage VRB Temperature Va r ia t i o n

V

V

T

C

V

V

∆

DD2

DD3

STA

HOLD

STOP

C

GEX

C

OS

C

OSC

f

POR1

POR2

RB

V

V

Ca, Cb, C12=0.1µF

Ca, Cb, C12=0.1µF

Oscillation start time: within 5 seconds

G

When external CG used 10 - 30 pF

D

External resistor ROS=160k VDD = 1.45 to 1.70V When VDD is between

POR1

V

and 1.5V No POR when VDD is between V

Ta = 25°C

RB

DD1=VDD

-

-

-

-101520pF

- 8 12 16 pF

POR2

and 1.5V

-

V Spec. )

=1.5V, V

+100%

-50%

+100%

-50%

Ω

ML64P168

DDI

=2.7V, Ta=0 to +65°C unless otherwise specified )

Measuring

Circuit

2.8 3.0 3.2 V

4.3 4.5 4.7 V

1.47 - - V

1.40 - - V

0.1 - 1000 ms

10 15 20 pF

80 280 350 kHz

0-0.4V

1.4 - 1.5 V

0.50 0.60 0.70 V

--2-

mV/°C

1

2

Notes: 1.”POR” denotes Power On Reset.

STOP

2.”T

” indicates that if the crystal oscillator stops over the value of T

* : At Non-regulated LCD driver.

In case of select a voltage regulated LCD driver, see P.37/51.

STOP

, the system reset occurs.

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