OKI ML63514A-TB, ML63514A-TP, ML63512A-TB, ML63512A-TP Datasheet

E2E0057-29-71

¡ Semiconductor ML63512A/63514A

¡ Semiconductor

This version: Jul. 1999

Previous version: Jun. 1999

ML63512A/63514A

4-Bit Microcontroller with Built-in Level Detector, Melody Circuit, and Comparator, Operating at 0.9 V (Min.)

GENERAL DESCRIPTION

The ML63512A/63514A is a CMOS 4-bit microcontroller with built-in level detector and operates at 0.9 V (min.). The ML63512A/63514A is an M6351x series mask ROM-version product of OLMS-63K family, which employs Oki's original CPU core nX-4/250. The program memory capacity and data memory capacity of the ML63512A differ from those of the ML63514A. 48-pin TQFP and 64-pin TQFP packages are available for the ML63512A and ML63514A.

FEATURES

• Extensive instruction set 407 instructions

Transfer, rotate, increment/decrement, arithmetic operations, comparison, logic operations, mask operations, bit operations, ROM table reference, stack operations, flag operations, jump, conditional branch, call/return, control.

• Wide variety selection of addressing modes Indirect addressing of four data memory types, with current bank register, extra bank register, HL register and XY register. Data memory bank internal direct addressing mode.

• Processing speed Two clocks per machine cycle, with most instructions executed in one machine cycle. Minimum instruction execution time : 61 ms (@ 32.768 kHz system clock)

1 ms (@ 2 MHz system clock)

• Clock generation circuit Low-speed clock : Crystal oscillation or RC oscillation selectable by

mask option (30 to 80 kHz)

High-speed clock : Ceramic oscillation or RC oscillation selectable by

mask option (2 MHz max.)

• Program memory space ML63512A: 4K words ML63514A: 8K words Basic instruction length is 16 bits/1 word

• Data memory space ML63512A: 128 nibbles ML63514A: 256 nibbles

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¡ Semiconductor ML63512A/63514A

• Stack level Call stack level : 16 levels Register stack level : 16 levels

• I/O ports Input ports: Selectable as input with pull-up resistor/high-impedance input Output ports: N-channel open drain output (can directly drive LEDs) Input-output ports: Selectable as input with pull-up resistor/high-impedance input

Selectable as N-channel open drain output/CMOS output Can be interfaced with external peripherals that use a different power supply than this device uses. (Power to the output port is supplied from V

(separate power suply))

DDI

Number of ports:

(For 48-pin packages)

Input port : 1 port ¥ 4 bits Output port : 1 port ¥ 4 bits Input-output port : 6 ports ¥ 4 bits

(For 64-pin packages)

Input port : 1 port ¥ 4 bits Output port : 1 port ¥ 4 bits Input-output port : 9 ports ¥ 4 bits

• Melody output function Melody sound frequency : 529 to 2979 Hz (@ 32.768 kHz) Tone length : 63 varieties Tempo : 15 varieties Melody data : Stored in the program memory Number of ports : 1 (dedicated pin) Buzzer driver signal output : 4 kHz (@ 32.768 kHz)

• Level detector

Conversion time : Approx. 183 ms (@ 32.768 kHz) Dedicated input pins : 2 pins (switched by software; for the secondary

functions of the input ports)

Detection level : 12 levels

• Comparator

Offset voltage : 50 mV max. (VDD = 1.5 V) Comparison time : Approx. 183 ms (@ 32.768 kHz) Number of channels : 1 (for the secondary functions of the input ports)

• Reset function Reset through RESETB pin (RESETB pin can be pulled up by mask option)

• Power supply backup Backup circuit (voltage multiplier) enables operation at 0.9 V minimum

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¡ Semiconductor ML63512A/63514A

• Timers and counter 8-bit timer ¥ 2

Selectable as auto-reload mode/capture mode/clock frequency measurement mode

15-bit time base counter ¥ 1

1 Hz, 2 Hz, 4 Hz, 8 Hz, 16 Hz, 32 Hz, 64 Hz, 128 Hz, 256 Hz, 512 Hz, 1 kHz, and 2 kHz signals can be read (@ 32.768 kHz)

• Serial port Mode : Selectable as UART mode/synchronous

mode

UART communication speed : 2TBCCLK, TBCCLK, 1/2TBCCLK, Timers 0

& 1 overflow 24 kbps Max. (when 2TBCCLK @ 80 kHz selected)

Clock frequency in synchronous mode : 30 to 80 kHz (internal clock mode), external

clock frequency

Data length : 5 to 8 bits

• Interrupt sources External interrupt (4 sources) : Selectable as rising edge/falling edge/both

rising and falling edges

Internal interrupt (10 sources) : Time base interrupt ¥ 4 (2, 4, 16, and 32 Hz

@ 32.768 kHz) Timer interrupt ¥ 2 Level detector interrupt ¥ 1 Serial port reception interrupt ¥ 1 Serial port transmission interrupt ¥ 1 Melody end interrupt ¥ 1

• Operating Temperature –20 to +70°C

• Supply voltage When backup used : 0.9 to 1.8 V

(Maximum operating frequency 1 MHz)

When backup not used : 1.8 to 3.5 V

(When Level detector or Comparator is

used, maximum operating frequency 2 MHz)

1.8 to 5.5 V (When Level detector and Comparator are

not used, maximum operating frequency 2 MHz)

• Package options: 48-pin plastic TQFP (TQFP48-P-0707-0.50-K) : (Product name: ML63512A-xxxTB,

ML63514A-xxxTB)

64-pin plastic TQFP (TQFP64-P-1010-0.50-K) : (Product name: ML63512A-xxxTP,

ML63514A-xxxTP)

xxx indicates a code number.

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¡ Semiconductor ML63512A/63514A

BLOCK DIAGRAM

An asterisk (*) indicates the port secondary function. The power to the circuits corresponding to the signal names inside is supplied from V

nX-4/250

L

TIMING CONTROL

CBR

EBR

H

YX

RA

A

(power supply for interface).

DDI

PC

ROM ML63512A: 4KW ML63514A: 8KW

RESETB

TST1B TST2B

XT0 XT1

OSC0 OSC1

TBCCLK*

HSCLK*

LDIN0* LDIN1*

CMPIN*

CMPREF*

V

DDH

V

DD

CB1 CB2

SP

RSP

STACK CAL: 16-level REG: 16-level

Detector

RST

TST

OSC

Level

CMP

BACK-

UP

INT

1

ALU

INSTRUCTION DECODER

INT

4

C G

MIE

IR

RAM ML63512A: 128N ML63514A: 256N

INT

TBC

Z

BUS CONTROL

INT

2

TIMER

8bit ¥ 2

INT

2

SIO

INT

1

MELODY

DATA BUS

I/O PORT

INT

4

TM0CAP/TM1CAP* TM0OVF/TM1OVF* T0CK* T1CK*

RXC* TXC* RXD* TXD*

MD

P0.0-P0.3

P1.0-P1.3

P2.0-P2.3

P3.0-P3.3

P4.0-P4.3

P5.0-P5.3

=

P6.0-P6.3

=

P9.0-P9.3

PA.0-PA.3

=

V

DDL

=

Port 6 (P6.0 to P6.3), Port 9 (P9.0 to P9.3) and Port A (PA.0 to PA.3) are only provided for the 64-

VR

INPUT

PORT

OUTPUT

PORT

P7.0-P7.3

P8.0-P8.3

V

DDI

V

SS

pin packages.

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¡ Semiconductor ML63512A/63514A

PIN CONFIGURATION (TOP VIEW)

P0.0/INT0

P0.1/INT1

P0.2/INT2

P0.3/INT3

P1.0/TM0CAP/TM0OVF

P1.1/TM1CAP/TM1OVF

P1.2/T0CK

P1.3/T1CK

P2.0/TBCCLK

P2.1/HSCLK

P2.2

P2.3

37

38

39

40

41

42

43

44

45

46

47

48

P3.0/RXD

P3.1/TXC

P3.2/RXC

P3.3/TXD

P4.0 P4.1

P4.2 P4.3

P5.0 P5.1 P5.2 P5.3

10 11 12

1 2 3 4 5 6 7 8 9

24

23

22

21

20

19

18

17

16

15

14

13

SS

DD

V

DDH

V

P7.0/CMPIN

P7.2/LDIN0

P7.1/CMPREF

P8.1

P8.0

P7.3/LDIN1

P8.2

P8.3

DDI

V

36 35 34 33 32 31 30 29 28 27 26 25

MD RESETB OSC1 OSC0 V

SS

TST2B TST1B XT1 XT0 V

DDL

CB2 CB1

48-Pin Plastic TQFP

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¡ Semiconductor ML63512A/63514A

PIN CONFIGURATION (TOP VIEW) (continued)

P0.0/INT0

P0.1/INT1

P0.2/INT2

P0.3/INT3

P1.0/TM0CAP/TM0OVF

P1.1/TM1CAP/TM1OVF

P1.2/T0CK

P1.3/T1CK

P2.0/TBCCLK

P2.1/HSCLK

P2.2

P2.3

PA.0

PA.1 64

63

62

61

60

59

58

57

56

55

54

53

52

51

P9.3 50

P9.2

49

PA.2 PA.3

P3.0/RXD

P3.1/TXC

P3.2/RXC

P3.3/TXD

P4.0

P4.1 P4.2 P4.3 P5.0 P5.1 P5.2 P5.3 P6.0 P6.1

10 11 12 13 14 15 16

1 2 3 4 5 6 7 8 9

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

P9.1 P9.0 MD RESETB OSC1 OSC0 V

SS

TST2B TST1B XT1 XT0 V

DDL

CB2 CB1 (NC) (NC)

17

P6.2

P6.3

P7.0/CMPIN

P8.0

P7.3/LDIN1

P7.2/LDIN0

P7.1/CMPREF

P8.1

P8.2

P8.3

DDI

V

SS

DD

V

DDH

V

31

(NC)

30

29

28

27

26

25

24

23

22

21

20

19

18

64-Pin Plastic TQFP

Note: Pins marked as (NC) are no-connection pins which are left open.

32

(NC)

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¡ Semiconductor ML63512A/63514A

PIN DESCRIPTIONS

The basic functions of each pin of the ML63512A/63514A are described in Table 1. A symbol with a slash (/) denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For type, "—" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an inputoutput pin. For pin, "TB" denotes a 48-pin flat package (48TQFP), and "TP" a 64-pin flat package (64TQFP).

Table 1 Pin Descriptions (Basic Functions)

Function Symbol

Power

V

V V

V

DD

SS

DDI

DDL

TB

23 —

22, 32 —

21 —

27 —

TP

29

28, 42

27

37

Supply

V

DDH

24 —

CB1 25 — CB2 26 —

XT0 28 I

XT1 29 O

30

35 36

38

39

Oscillation

OSC0 33 I

OSC1 34 O

TST1B 30 I

43

44

40

Test

TST2B 31 I

Reset RESETB 35 I

41

45

Type

Description

Positive power supply Negative power supply Positive power supply pin for external interface (PORT8 supply) Positive power supply pin for internal logic (internally generated). A capacitor C

(0.1 mF) should be connected between this pin and VSS.

l

Voltage multiplier pin for power supply backup (internally generated). A capacitor C

(1.0 mF) should be connected between this pin and VSS.

h

Pins to connect a capacitor for voltage multiplier. A capacitor (1.0 mF) should be connected between CB1 and CB2. Low-speed clock oscillation pins. Crystal oscillation or RC oscillation is selected by the mask option. If crystal oscillation is selected, connect a crystal between XT0 and XT1, and connect capacitor (C

) between XT0 and VSS.

G

If RC oscillation is selected, connect external oscillation resistor

) between XT0 and XT1.

(R

CRL

High-speed clock oscillation pins. Ceramic oscillation or RC oscillation is selected by the mask option. If ceramic oscillation is selected, connect a ceramic resonator between OSC0 and OSC1, and connect capacitor (C OSC0 and V

, OSC1 and VSS.

SS

, CL1) between

L0

If RC oscillation is selected, connect external oscillation resistor

) between OSC0 and OSC1.

(R

CRH

Input pins for testing. A pull-up resistor is internally connected to these pins. Reset input pin. Setting this pin to "L" level puts this device into a reset state. Then, setting this pin to "H" level starts executing an instruction from address 0000H. An internal or external pull-up resistor is selected by mask option.

Melody MD 36 O

46

Melody output pin (non-inverted output)

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¡ Semiconductor ML63512A/63514A

Table 1 Pin Descriptions (Basic Functions) (continued)

Function Symbol

P0.0/INT0 37 P0.1/INT1 38 52 P0.2/INT2 39 53 P0.3/INT3 40 54

P1.0/

TM0CAP/

TM0OVF

P1.1/

TM1CAP/

TM1OVF P1.2/T0CK 43 57 P1.3/T1CK 44 58

P2.0/TBCCLK 45 59

P2.1/HSCLK 46 60

P2.2 47 61 P2.3 48 62

P3.0/RXD 1 3

P3.1/TXC 2 4 P3.2/RXC 3 5 P3.3/TXD 4 6

P4.0 5 7 P4.1 6 8 P4.2 7 9 P4.3 8 10 P5.0 9 11 P5.1 10 12 P5.2 11 13 P5.3 12 14

TB

41 55

42 56

TP

51

Type

I/O

I/OPort

I/O

Description

4-bit input-output ports. In input mode, pull-up resistor input or high-impedance input is selectable for each bit. In output mode, N-channel open drain output or CMOS output is selectable for each bit.

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¡ Semiconductor ML63512A/63514A

Table 1 Pin Descriptions (Basic Functions) (continued)

Function Symbol

P6.0 —

P6.1 — 16

P6.2 — 17

P6.3 — 18

P7.0/CMPIN 13 19

P7.1/CMPREF 14 20

P7.2/LDIN0 15 21 P7.3/LDIN1 16 22

Port

P8.0 17 23 P8.1 18 24 P8.2 19 25 P8.3 20 26 P9.0 — 47 P9.1 — 48 P9.2 — 49

P9.3 — 50 PA.0 — 63 PA.1 — 64 PA.2 — 1 PA.3 — 2

TB

TP

15

Type

I/O

I

O

I/O

Description

4-bit input-output port. In input mode, pull-up resistor input or high-impedance input is selectable for each bit. In output mode, N-channel open drain output or CMOS output is selectable for each bit. Note that these pins are available for only a 64-pin package.

4-bit input port. Pull-up resistor input or high-impedance input is selectable for each bit.

4-bit output port. N-channel open drain output.

4-bit input-output ports. In input mode, pull-up resistor input or high-impedance input is selectable for each bit. In output mode, N-channel open drain output or CMOS output is selectable for each bit. Note that these pins are available for only a 64-pin package.

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