Fig 1. Structure of the NXP Reader Library Export Controlled
1. Introduction
1.1 NXP libraries comparison
NXP Reader Library
This document describes the NXP Reader Library (Public), which is the software written
in C language enabling the customers to create their own software stack for their
contactless reader. The NXP Reader Library is available at [1].
There are another two NXP Reader Libraries giving to the developer advanced
possibilities. Particular libraries are restricted for usage on LPC microcontroller models.
For example the NXP Reader Library that is intended to run on NXP LPC1227 board.
NXP Reader Library Export Controlled: comprehensive software API enabling the
customers to create their own software stack for their contactless reader. The library
includes software representing cards, which may be export controlled or common criteria
certified. Therefore the whole software is export controlled and subject to NDA with NXP.
Library enables usage of SAM module which enables encrypted communication between
the host and reader chip (PCD). There must be hardware support from SAM unit, of
course.
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Fig 2. Structure of the NXP Reader Library NFC P2P
NXP Reader Library NFC P2P: is intended to run on NXP LPC1227 board which is
either connected to PNEV512 v1.4 blue board or CLRC663 Blue board v2.1. It is the
software support for Near Field Communication (NFC) including Data Exchange Format.
1.1.1 Layer Structure of the NXP Reader Library
The MCU implementing the Library is able to utilize several types of reader chips to
access any MIFARE card. To satisfy such versatile feature, architecture of the Library
was designed with multi layered structure – see Fig 3. Each layer is indep end ent from
the other layers.
Vertical structure of the NXP Reader Librar y is classified into following layers:
• Application layer (AL)
• Protocol abstraction layer (PAL)
• Hardware abstraction la yer (HAL)
• Bus abstraction layer (BAL)
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Although this document describes the NXP Reader Library from Fig 3, in this section
there is slightly introduced most of the cards (components) from (green) AL in Fig 1. The
Application Layer of the NXP Reader Library implements commands for onl y MIFARE
Classic and MIFARE Ultralight among contactless cards listed below. The Application
Layer enables developer to access particular card by using its command set – it means
reading, writing, modifying and other operations with data on the card.
MIFARE Classic[2]: the leading industry standard for contactless and dual interface
smart card schemes, with an immense worldwide installed base. The platform offers a
full range of compatible contactless smartcard and reader ICs, as well as dual-interfaces
ICs. The MIFARE Classic family covers contactless smart cards used in applications like
public transport, access management, loyalty cards and many more. MIFARE Classic is
fully compliant with ISO/IEC 14443 Type A, available with 1k and 4k memory and 7 Byte
as well as 4 Byte identifiers. The Application Layer of the MIFARE Classic is closer
described in Section 2.4.
MIFARE Ultralight EV1[3]:It is intended for use with single trip tickets in public
transportation networks, loyalty cards or day passes for events as a replacement for
conventional ticketing solutions such as paper tickets, magnetic stripe tickets or coins.
The mechanical and electrical specifications of MIFARE Ultralight are tailored to meet the
requirements of paper ticket manufacturers. It can be easily integrated into existing
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contactless system without need for serious changes of the system. MIFARE Ultralight is
fully compliant with ISO/IEC 14443 Type A.
The Application Layer of the MIFARE Ultralight is closer described in Section 2.5.
MIFARE Plus [4]: Migrate classic contactless smart card systems to the next security
level. After the security upgrade, MIFARE Plus uses AES-128 (Advanced Encryption
Standard) for authentication, data integrity and encryption. MIFARE Plus is based on
open global standards for both air interface and cryptographic methods at the highest
security leve l.
MIFARE DESFire[5]: fully compliant with ISO/IEC14443A(part 1 - 4) and uses optional
ISO/IEC7816-4 commands. The selectable cryptographic methods include 2KTDES,
3KTDES and AES128. The highly secure microcontroller based IC is certified with
Common Criteria EAL4+. MIFARE DESFire is multi-application smart card used in public
transport schemes, access management or closed-loop e-payment applications. It fulfills
the requirements for fast and highly secure data transmission, flexible memory
organization and interoper a bility with existing infrastructure.
ISO/IEC15693[6]: contactless vicinity card defined by ISO/IEC Standard.
ICODE SLI[7]: the first member of a product family of smart label ICs based on
ISO/IEC15693. This IC is dedicated for intelligent label applications like supply chain
management as well as baggage and parcel identification in airline business and mail
service.
Felica[11][12]: contactless smart card developed by the Son y com pan y with usag e
spread in Japan.
ICODE ILT[8]: dedicated chip for passive, intelligent tags and labels supporting the
ISO18000-3 mode 3 RFID standard. It is especially suited for applications where reliable
identification and high anti-collision rates are required. The ICODE ILT supports
ISO/IEC18000-3mode3 RFID standard.
1.1.1.2 Protocol Abstraction Layer
The Protocol Abstraction Layer implements the activation and exchange operations
regarding the protocol of the contactless communication. Each protocol has its own
folder in the library structure NxpRdbLib_PublicRelease/comps/phpal<protocolName>.
The NXP Reader Library supports following ISO standard protocols:
ISO/IEC14443-3A[9]: air interface communication at 13.56MHz for the cards of type A
ISO/IEC14443-3B[9]: air interface communication at 13.56MHz for the cards of type B
ISO/IEC14443-4[9]: specifies a half-duplex block transmission protocol featuring the
special needs of a contactless environment and defines the activation and deactivation
sequence of the protocol.
ISO/IEC14443-4A
[9]: previous protocol for the cards of type A
MIFARE(R): needs to be included for any MIFARE card. Contains support for MIFARE
authentication and data exchange reader chip and PC or PICC according to protocols
ISO/IEC14443-3A and ISO/ IEC1 444 3-4.
ISO/IEC15693[6]/ISO18000-3m1[10]: smart cards based on ISO/IEC15693 are used like
SKIPASS.
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ISO/IEC18000-3m3[10]: The ISO 18000-3 mode 3/EPC Class-1 HF standard allows the
commercialized provision of mass adoption of HF RFID technology for passive smart
tags and labels.
applications are supply chain management and logistics for worldwide use.
ISO/IEC18092 Mode Passive Initiator[12]: the DEP protocol as well as the passive
communication mode
Felicia: compliant protoco l[11], parts of it are also part of ISO 18092[12]
This document is focused on description of MIFARE Classic card which is compliant to
the ISO/IEC14443-3A protocol. The protocol layer ensures software functionality of
specified procedures: R equestA, Activate, Anti-collision, Select, HaltA, WakeUpA. The
PAL layer is software solution, how to ensure on the PC or MCU side all the procedures,
states and the states changes regarding to ISO/IEC14443-3A[9].
1.1.1.3 Hardware abstraction layer
The Hardware Abstraction Layer implements the hardware specific elements of the
reader chip. The reader chip could be considered as an additional module of MCU or PC
– connection provider between the MCU or PC and the card. From this point of view the
HAL layer is software how to utilize this module. There are many different card readers
supported by the NXP Reader Library. They differ in peripheral modules, memory
organization, command set etc or support various package of ISO protocols. According
to Fig 3 the NXP Reader Library supports two Pegoda readers and three reader chips
and their derivatives.
RD70x and RD710 Pegoda readers: contactless reader designed for an easy reader
adaptation to a PC to use these devices for test and application purposes and reference
design for new reader development based on the CLRC632 MFRC500 reader ICs
respectively.
Three major card reader chips and their derivatives:
There are several aspects that can be each reader chip considered from:
• support for card types
• support for types of ISO protocols from previous section 1.1.1.2
• support for secure access module (SAM)
• support for host communication interface
Check datasheet of particular reader chip to check if it satisfies your requirements.
Although there are some differences between these reader chips within each group also,
PCDs of one group share the same HAL layer source code – each PCD group owns a
separate folder in NxpRdbLib_PublicRelease/comps/phhalHw<readerChip>.
Functions of this layer are responsible for execution of native commands of particular
reader chip and all the management to be utilized effectively concurrently with stress on
preventing software from infinite loops. This means mainly:
• reading/writing from/into reader’s registers.
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• RF field management, receiver and transmitter configuration
• Timers configuration
• Resolving interrupt sources from reader chip
• FIFO management
Data passed from upper layers are packed together with command code into special
order, thus reader is able to decode them as command code, address and data. Section
2.1 is focused on description of functions performing CLRC663 native commands and
section 2.2 describes some HAL layer functions independent of reader chip.
The NXP Reader Library also supports Pegoda reader
1.1.1.4 Bus Abstraction Layer
The Bus Abstraction Layer ensures correct communication interface between the master
device and the reader chip. The master device can be PC with Windows or Linux
platform installed or MCU and it sends to the reader chip commands and other command
related data like addresses and data bytes. The card reader can send some register
values or received data like the response to requests from the mater device.
The NXP Reader Library supports following communication interfaces:
SerialWin:
serial connection for Windows platform
Rd70x USB Win: drivers for Windows platform to enable connection to Pegoda reader
PcscWin: driver for PC/SC interface running on Windows platform
Stub: Originally it was intended like component without functionality to ease
implementation of additional busses. Cur rently it supports SPI, I2C and RS232 interfac es
enabling connection to the Blueboard
The reader chip can possibly send replies – mostly when MCU requests value of
particular register.
1.1.1.5 Common Layer
The NXP Reader Library also includes utilities independent of any card and hardware
(card reader) – meaning they can be implemented regardless of hardware components.
All of them are encapsulated into the Common Layer
phTools: this part of common layer is able to perform binary operations related to CRC
and bit parity both for various lengths. CRC and parity check are used very rarely in
communication between PC or MCU and the card reader.
Note: These functions must not be implemented into the reader and any card
intercommunication. All the CRC checksum is done by both the sides automatically.
phKeyStore: is key handling software – storage, changing key format etc.. But the NXP
Reader Library supports only key storage utility. Only the NXP Reader Library Export
Controlled version supports full key storage functionalities and for those card readers
from phKeyStore part in
Each layer uses its own data structure to store important data, parameters for hardware
and software configuration. Members of structures determine branching of program flow
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during software running, which means triggering, enabling or disabling of particular
software utilities and hardware modules.
At the beginning of program, it is necessary to load data parameter structure of layer with
default values by calling an initialization function of that layer. At the moment, when
particular data parameter structure is being initialized, underlaying structure must have
already been allocated - pointer to the structure must be known. So it is recommended to
begin initialization of particular data param eter structures from bottom to top layers. To
successfully implem ent func tions desc r ibed in this doc ument, all the layer components
from Table 1 need to be incorporated and their structures initialized:
Initialization functions for HAL CLRC663, PAL ISO14443-3A, MIFARE Classic, MIFARE
Ultralight are described in sections 2.2.2 2.3.2, 2.4.1, 2.5.1 respectively. BAL and
MIFARE layer components initializations are mentioned in sample code in section 3 in
line 150 and 153 respectively.
Check each init function of data parameter structures whether its default values agrees
with your intended cause, otherwise, init manually. Pay special attention to
bBalConnectionType
member in
phhalHw_Rc663_DataParams_t
, to set custom bus
communication between reader chip and MCU. However, you will need to initiate
bBalConnectionType
“manually” (see sample code in section 3 line 164 or line 169), due to
HAL init function sets RS232 interface on default. The partial description of CLRC663
HAL layer structure and its initialization function are in sections 2.2.1 and 2.2.2
respectively. The HAL layer has its own couple of
phhalHw_GetConfig()
functions (see sections 2.2.3 and 2.2.4) to modify parameters of the
phhalHw_SetConfig()
and
structure and change configuration of the reader.
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2. Exemplary explanati on of t he li bra ry functions
A project defining a CLRC663 Blueboard communication with a MIFARE classic is
herewith explained.
2.1 HAL: CLRC663 commands
2.1.1 General
The reader chip is not able to execute compiled C code, but executes commands of
command set. For that reason the PCD reader is controlled by host device able to
execute the library code (PC or MCU) and sends particular commands to the PCD via
communication bus. In this chapter are described command related functions. Together
with command itself, described functions mostly call many other support routines to
ensure flawless command run. So the described functions are not PCD’s native
commands literally, but larger functions ensuring particular command execution. This
attitude intends to focus developer on most important issues without redundant
knowledge about underlaying functions.
2.1.2 Idle command
This command indicates that the PCD is in idle mode. This command is used to
terminate actually executed command. It also indicates. Unlike other commands this
command does not have its own function. Only way, how to perform the Idle command is
This function performs the low-power card detection and an automatic trimming of the
LPO. The values of the sampled I and Q channel are stored in the register map. The
value is compared with the min/max values in the register. If it exceeds the limits, an
LPCD IRQ will be raised. After the command the standby is activated if selected.
*pDataParams: pointer to the HAL layer data parameter structure.
bMode: there are three different modes that LPCD can run. Each is matched with one of
three following defines:
- phhalHw_Rc663_Cmd_Lpcd()
PHHAL_HW_RC663_CMD_LPCD_MODE_DEFAULT:
on 64 kHz frequency. Function ignores last two input arguments, but uses
PHHAL_HW_RC663_LPCD_T3_RELOAD_MIN
phhalHw_Rc663_Config.h file to set power-down and detection time amounts.
PHHAL_HW_RC663_CMD_LPCD_MODE_POWERDOWN:
time and performs LPC after wakeup. If no card is found the PCD is powered down again
and the procedure is restarted. If a card is found the function returns and the PCD
remains powered up.
Try LPCD until timeout is reached. T4timer runs
and
PHHAL_HW_RC663_LPCD_T4_RELOAD_MIN
Powers down the PCD for a certain amount of
from
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set with either
Guard-timer in this case is only running during the power-up phases, so the timeout has
to be adjusted properly.
PHHAL_HW_RC663_CMD_LPCD_MODE_OPTION_TRIMM_LPO:
perform LPO trimming together with the LPCD command.
PHHAL_HW_RC663_CMD_LPCD_MODE_OPTION_IGNORE_IQ
the function to set I and Q channel values.
bI: I-Channel value in case of no card on antenna.
bQ: is Q-Channel value in case of no card on antenna.
wPowerDownTimeMs: power-down time in milliseconds if power-down mode is used.
wDetectionTimeUs: detection time in microseconds if power-down mode is used.
returnValues:
PH_ERR_SUCCESS
PH_ERR_IO_TIMEOUT
PH_ERR_SUCCESS
Other: depending on implementation and underlaying component.
2.1.4 LoadKey
Same as previous, but uses the timeout
PHHAL_HW_CONFIG_TIMING_US
or
PHHAL_HW_CONFIG_TIMING_MS
Or this bit to the desired mode to
Or this bit to the desired mode to prevent
- card present.
- no card found.
- operation successful.
- phStatus_t phhalHw_R c663_Cmd_LoadKey ()
as abort criteria.
This function loads a MIFARE Key (6 bytes) into the Key buffer of the reader, that
necessary for further authentication.
*pDataParams: pointer to the HAL layer data parameter structure.
*pKey: pointer to the 6 byte MIFARE key array. Value of this key is defined by software,
so any value of key satisfying 6 byte size may be used for attempt to Authenticate. This
is different from LoadKeyE2 command loads key from EEPROM without any possibility to find out actual value of the key.
returnValues:
PH_ERR_SUCCESS
Other: depending on implementation and underlaying component.
2.1.5 LoadKeyE2
This function loads the MIFARE Key (6 bytes) from a position in the PCD EEPROM Key
Storage Area into the Key buffer. Subsequently, with such loaded key the authentication
can be executed.
Note: Before you decide to use this function, see more complex
function in section
purpose.
*pDataParams: pointer to the HAL layer data parameter structure.
bKeyNo: key number in EEPROM in range 0x00 - 0xFF.
returnValues:
PH_ERR_SUCCESS
Other: depending on implementation and underlaying component.
2.1.6 MFAuthent
This function performs MFAuthent command (entire three pass Authentication procedure
to the given EEPROM block of the card) with key currently loaded in the Key buffer. If
Authentication passes through all three phases successfully, then the EEPROM block is
fully accessible for data manipulation MIFARE Classic commands: reading, writing,
increment, decrement, restore and data transfer. For MIFARE Classic, if once access to
the block is obtained, then access to entire sector (4 blocks) retains until next attempt to
authenticate to any EEPROM block of card.[2]
Note:
This function does not provide any loading into the Key buffer. The key intended to
be used for the authentication needs to be loaded by
function
EEPROM see an alternative to this function
*pDataParams: pointer to the HAL layer data parameter structure.
Set
(
section 2.1.4). In case of using the key from the key storage area of PCD’s
pDataParams->pKeyStoreDataParams = NULL
- operation successful.
- phhalHw_Rc663_MfcAuthenticate_Int()
phhalHw_Rc663_Cmd_LoadKey()
phalMfc_Authenticate()
to run EEPROM key store branch.
in section 2.4.2.
bBlockNo: number of block in EEPROM of the card to authenticate to. Authentication to
block enables access to entire section which the block is part of. In case of the MIFARE
Classic it must be in range from 0 to 63.
bKeyType: can be either
PHAL_MFC_KEYA
or
PHAL_MFC_KEYB
. In case of MIFARE Classic
each block can be authenticated by using anyone of these two keys specified for that
block.[2]
*pUid: pointer to UID of the card to be authenticated. Each card has its own unique
identification number.
Note: In this function there is no pointer to array containing 6 byte key used for
authentication. Thus before calling this function, the key intended to be used for
authentication must be loaded into the Key buffer by the function
phhalHw_Rc663_Cmd_LoadKey()
section 2.1.14. In case of key stored in MKA see
– see section 2.1.4. or by the
phalMfc_Authenticate()
phKeyStore_SetKey()
– see
in section 2.4.2
as an alternative to this function.
returnValues:
PH_ERR_AUTH_ERROR:
Authentication procedure fails, if the key currently loaded in the Key
buffer of reader does not match with key for given block in card tried to be accessed.
PH_ERR_INVALID_PARAMETER
bKeyType
–
wKeyVersion
other than
other than NULL.
PHAL_MFC_KEYA
or
PHAL_MFC_KEYB
.
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Other: depending on implementation and underlaying component.
2.1.7 Receive
This function handles receiver, then waits for eventually coming data. There are many
data related errors that can occur during reception: framing, CRC, buffer overflow,
protocol, integrity, collision error. Weather successful frame reception or any among
many possible errors occur, they are used as return values, so developer can further
manage particular situation himself. Receiving also terminates as soon as number of
received data overflows FIFO WaterLevel. Waterlevel is set on default size FIFO-1 bytes,
so abort from this interrupt source should not occur. If necessary, use
exceeds half of maximum possible number of keys in
- Authentication command itself did not succeeded while timeout from
- operation successful.
- phhalHw_Rc663_Cmd_Receive()
to set
*pDataParams: pointer the HAL layer data param eter s truc tur e.
pDataParams->bRfResetAfterTo == PH_ON
: provokes RF field reset, after unsuccessful
reception due to timeout. Although this is just software parameter (no register related), it
is recommended to set this option by
PHHAL_HW_CONFIG_RFRESET_ON_TIMEOUT, PH_ON)
wOption:
PHHAL_HW_RC663_OPTION_RXTX_TIMER_START
phhalHw_SetConfig(pDataparams,
function (see section 2.2.3).
should be passed here to prevent
software from freezing while waiting for received data for a long time. This option
employs both T0 and T1 timers.
**ppRxBuffer: the pointer to byte where function writes received data.
*pRxLength: is pointer to the number of received data bytes.
returnValues:
– no coming data detected and while timeout from timer 1 terminated.
- Data is written into the FIFO when it is already full.
- Data was written into the FIFO, during a transmission of a
possible CRC, during "RxWait", "Wait for data" or "Receiving" state, or during an
authentication command.
PH_ERR_FRAMING_ERROR
were
received.
PH_ERR_COLLISION_ERROR
byte.
- A valid SOF was received, but afterwards less than 4 data bits
– A collision has occurred. Software routine retrieves valid bits of last
PH_ERR_PROTOCOL_ERROR
received data byte is not written into the FIFO.
– A protocol error has occurred. When a protocol error occurs the last
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possible CRC, during "RxWait", "Wait for data" or "Receiving" state, or during an
authentication command.
PH_ERR_SUCCESS
Other: depending on implementation and underlaying component.
2.1.9 WriteE2
buffers Tx
-Data into internal buffer instead of transmitting it.
does not clear the internal buffer before operation. If this bit
– invalid value of the
– ‘No data’ error. Data should be sent, but no data is in FIFO.
– Data written into the FIFO when it is already full.
– Data was written into the FIFO, during a transmission of a
- operation successful.
- phhalHw_Rc663_Cmd_WriteE2
starts timer after transmission before reception,
wOption
parameter.
Write one byte of data to the given EEPROM address. There is no software waiting loop
to protect program flow from delay, while writi ng data into EE PROM.
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*pDataParams: pointer to the HAL layer data parameter structure.
wAddress: address in EEPROM, where data byte shall be written to. Firmware does not
verify validity of address.
bData: data byte to be written.
returnValues:
PH_ERR_READ_WRITE_ERROR
PH_ERR_SUCCESS
Other: depending on implementation and underlaying component.
2.1.10 WriteE2 Page
Write up to 64 bytes of data to a given EEPROM page. There is no software waiting loop
to stop program flow, while writing data into EEPROM. In comparis on with prev iou s
function, this function handles medium amount of data.
*pDataParams: pointer to the HAL layer data parameter structure.
wAddress: 2 byte address. Better said page number in range from 0 to 128.
*pData: pointer to data byte array to be stored in EEPROM.
bDataLen: length of data to be written, up to 64 bytes.
returnValues:
PH_ERR_INVALID_PARAMETER
– error occurred during writing data into EEPROM – invalid
wAddress
parameter
- operation successful.
- phhalHw_Rc663_Cmd_WriteE2Page
-
wAddress
greater than 64
PH_ERR_READ_WRITE_ERROR
PH_ERR_SUCCESS
- operation successful.
Other: depending on implementation and underlaying component.
2.1.11 ReadE2
- phhalHw_Rc663_Cmd_ReadE2()
This function reads up to 256 bytes from the EEPROM of the reader. Since all requested
data are firstly loaded into FIFO buffer, High Alert Interrupt is enabled. This causes abort
as soon as loaded data in FIFO reaches FIFO top Waterlevel defined in Waterlevel (03h)
register. Outside of this function, you can increase FIFO size from default 256 to 512
bytes by setting FIFO. Use