NXP Semiconductors QorIQ FRDM-LS1012A Reference Manual
QorIQ FRDM-LS1012A Board
Reference Manual
Document Number: FRDM-LS1012ARM
Rev. 3, 12/2016
QorIQ FRDM-LS1012A Board Reference Manual, Rev. 3, 12/2016
2 NXP Semiconductors
Contents
Section number Title Page
Chapter 1
Overview
1.1 Introduction.....................................................................................................................................................................5
1.2 Related documentation....................................................................................................................................................5
1.3 Acronyms and abbreviations...........................................................................................................................................6
1.4 FRDM-LS1012A features...............................................................................................................................................7
1.5 FRDM-LS1012A block diagram.................................................................................................................................... 8
1.6 FRDM-LS1012A top view............................................................................................................................................. 8
Chapter 2
LS1012AFRDM Functional Description
2.1 Processor.........................................................................................................................................................................11
2.2 Power supplies................................................................................................................................................................ 11
2.2.1 Primary power supply........................................................................................................................................ 12
2.2.2 FRDM-LS1012A power supply delivery system...............................................................................................13
2.2.3 Power-ON.......................................................................................................................................................... 14
2.2.4 Voltage regulation..............................................................................................................................................14
2.3 Reset and configuration signals...................................................................................................................................... 15
2.4 Clocks............................................................................................................................................................................. 17
2.5 Double data rate (DDR) memory....................................................................................................................................18
2.6 Serializer/deserializer (SerDes)...................................................................................................................................... 18
2.7 Ethernet controller.......................................................................................................................................................... 18
2.7.1 SGMII ports....................................................................................................................................................... 18
2.8 Audio interface................................................................................................................................................................21
2.9 USB interface .................................................................................................................................................................21
2.10 I2C ports..........................................................................................................................................................................22
2.10.1 I2C devices and addresses..................................................................................................................................22
2.11 QSPI interface.................................................................................................................................................................23
2.12 SPI interface....................................................................................................................................................................23
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Section number Title Page
2.13 Ardiuno........................................................................................................................................................................... 24
2.14 JTAG port....................................................................................................................................................................... 24
2.14.1 CMSIS-DAP...................................................................................................................................................... 24
2.15 GPIO pins........................................................................................................................................................................25
2.16 Temperature ................................................................................................................................................................... 26
2.17 Power-monitoring LEDs.................................................................................................................................................26
2.18 Revision control..............................................................................................................................................................26
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Chapter 1
Overview
1.1 Introduction
The QorIQ FRDM-LS1012A board is an ultra-low-cost development platform for
LS1012A. The board provides connectivity support for SPI, UART, and I2C based
Arduino and freedom boards. Also, the FRDM-LS1012A supports the DDR3L memory,
two 1 Gbit/s Ethernet ports, one USB 3.0 5 Gbit/s port, and the Audio in and out
interface. The system is lead-free and RoHS-compliant.
The LS1012A processor is built on the LS architecture combining one ARM® A53
processor core with the datapath acceleration and network, peripheral interfaces required
for networking, wireless infrastructure, and the general-purpose embedded applications.
The FRDM-LS1012A onboard resources and debugging devices allow you to:
• Upload and run code
• Use the FRDM-LS1012A as a demonstration tool
A software application developed for the FRDM-LS1012A can run with various input/
output data streams, such as SGMII, SAI, or USB connections. The board support
package (BSP) is developed using the Linux operating system.
1.2
Related documentation
Table 1-1 lists the additional documents that you can refer to, for more information about
the FRDM-LS1012A.
Some of these documents may be available only under a non-disclosure agreement
(NDA). To request access to these documents, contact your local NXP field applications
engineer or sales representative.
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Table 1-1. Related documentation
Document Description
QorIQ FRDM-LS1012A board Getting Started Guide Explains the FRDM-LS1012A settings and physical
connections needed to boot the board.
FRDM-LS1012A Errata Lists and describes all known errata for the FRDM-LS1012A.
It also describes the available workaround for each errata and
their detailed explanation, where necessary.
QorIQ LS1012A Family Reference Manual Provides a detailed description of the LS1012A processor and
of some of its features, such as memory mapping, interfaces,
chip features, and clock information.
QorIQ LS1012A Data Sheet Contains the LS1012A information on pin assignments,
electrical characteristics, package information, and ordering
information.
LS1012A Chip Errata Lists the details of all known silicon errata for LS1012A.
QorIQ LS1012A Design Checklist, AN5192 This document provides recommendations for new designs
based on LS1012A.
This document can also be used to debug newly-designed
systems by highlighting those aspects of a design that merit
special attention during initial system start-up.
1.3 Acronyms and abbreviations
The following table lists the acronyms and abbreviations used in this document.
Table 1-2. Acronyms and abbreviations
Term Description
DDR Double Data Rate
DRAM Dynamic random-access memory
DUART Dual universal asynchronous receiver/transmitter
DUT Device Under Test
FET Field-effect transistor
GPIO General-purpose input/output
I2C Inter-Integrated Circuit Multi-Master Serial Computer Bus
JTAG Joint Test Action Group (IEEE 1149.1 standard)
LDO Low-dropout
OTG On-The-Go
PLL Phased Lock Loop
PS Power supply
PSU Power supply unit
RCW Reset Configuration Word
SDA Serial data line
SerDes Serializer/deserializer used to interface with serial interfaces, such as PCIe, SGMII, and SATA
Table continues on the next page...
Acronyms and abbreviations
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Table 1-2. Acronyms and abbreviations (continued)
Term Description
SGMII Serial Gigabit Media Independent Interface
SPI Serial Peripheral Interface
USB Universal Serial Bus
1.4 FRDM-LS1012A features
The following table lists the features of the FRDM-LS1012A.
Table 1-3. FRDM-LS1012A features
FRDM-LS1012A feature Specification Description
Processor LS1012A processor LS1012A processor with single core
1
High-speed serial ports
(SerDes)
2 SerDes lanes with speed
up to 1 Gbit/s
• 2 SGMII 1G PHYs
DDR controller One 512 MB DDR3L
SDRAM memory
• 512 MB memory
• Supports data rates up to 1000 MT/s
• Operates at 1.35 V
Ethernet Two Ethernet controllers • Two quad-speed Ethernet MACs supporting SGMII 1G.
• RJ45 connector for 1000BaseT connectivity.
USB 2.0/3.0 One SuperSpeed USB
2.0/3.0 port, one USB 2.0
port
• USB 2.0/3.0 port is configured as On-The-Go (OTG) with a
Micro-AB connector.
• USB 2.0 port is a debug port (CMSIS DAP) and is
configured as a Micro-AB device.
SPI SPI • SC16IS740IPW SPI to Dual UART bridge
• Arduino
QSPI One QSPI controller • Onboard 64 MB QSPI flash memory running at speed up
to 108/54 MHz, for boot image
Serial ports UART (Console)
1 UART (from
SC16IS740IPW)
• UART1 (Without flow control) for console
• 1 UART (with flow control) from SC16IS740IPW (SPI to
UART Bridge) to Arduino headers
SAI Audio interface • One SAI port, SAI 2 with full duplex support
I2C • One I2C bus with connectivity to Arduino headers, audio
device
Debug features • ARM Cortex® 10-pin JTAG connector for LS1012A
• CMSIS DAP through K20 microcontroller
Package • Package type is 9.6 mm x 9.6 mm x 0.805, 211 Flip Chip
Land Grid Array (FC-LGA)
Clocks • 25 MHz crystal for LS1012A
• 25 MHz for 2 SGMII PHYs from LS1012A CLKOUT
• 25 MHz for audio codec from LS1012A CLKOUT
• 8 MHz Crystal for K20
• 24 MHz for SC16IS740IPW SPI to Dual UART bridge
Table continues on the next page...
Chapter 1 Overview
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Table 1-3. FRDM-LS1012A features (continued)
FRDM-LS1012A feature Specification Description
Power supplies • 5 V input supply from USB
• 0.9 V, 1.35 V, and 1.8 V for VDD/Core, DDR, I/O, and
other board interfaces
1. For details about features of the LS1012A SoC, see QorIQ LS1012A Family Reference Manual.
1.5 FRDM-LS1012A block diagram
Figure 1-1
shows the FRDM-LS1012A block diagram.
LS1012
SVDD=0.9V,X1VDD,
AVDD_SR_PLL=1.35V
[A]
[B]
[D]
RESET
LED’s
(PG &
RESET)
USB_HVDD=3V3,
SV,SD_VDD=0.9V
SD2_REF_CLK1 & 2
2:2
OVDD=1.8V
SERDES 1
Freedom Headers
DDR3L
GVDD=1.35V
OVDD=1.8V
3 SPI Flash
I2C1
UART1
On Board Power Supply
VDD=0.9V
OVDD, TH_VD D=1.8V
MVREF=0.675V
SVDD=0.9V
USB_HVDD=3V3
EVDD=3.3
G1VDD=1.35V
XVDD =1.35V
AVDD_CGA,PLA T=1.8V
AVDD_SD1,2_P LL1,2=1.35V
USB_SVDD,SD VDD =0.9V
3V3 Board suppl y
2:3
1:3
1:2
1:2
1:2
SGMII(1G)
USB3 x2
USB2.0&USB3.0
QSPI NOR FLASH
S25FL128SAGMFI R0
OVDD=1.8V
QSPI
(Single & Dual IO)
VDD_PLAT,CGA 1,SD_REF=0.9V
DDR3L x16 SDRAM
MT 41K256M 16HA-125:E
KW24
STEREO
CODEC
SGTL5000
EMI1
SGMII PHY
REALTEK
RTL8211FS-CG
DSPI
5V from USB (Debug port)
1:2
JTAG
RESET
To LS1012A
SAI2
K20
(CMSIS DAP)
JTAG
1:2
SGMII(1G)
EMI1
SGMII PHY
REALTEK
RTL8211FS-CG
MMDC
RGMII/SAI
QSPI
USB3 PHY
AUD OUT
AUD IN
GPIO2[3:2] & GPIO1[15:19]
SPI to UART
Bridge
SC16IS740IPW
CS0
CS1
Debug uAB Port
USB3.0 PWRIN
2x1 HDR
VBUS
I2C1
Figure 1-1. FRDM-LS1012A block diagram
1.6
FRDM-LS1012A top view
The following figure shows the top view of the FRDM-LS1012A.
FRDM-LS1012A block diagram
QorIQ FRDM-LS1012A Board Reference Manual, Rev. 3, 12/2016
8 NXP Semiconductors
Audio in
port (J13)
Audio out
port (J8)
USB 3.0
Type AB (J5)
Arduino
connectors
(J1, J2, J3, J4)
ARM JTAG
header (J9)
Header for
USB power (J12)
K20 JTAG
header (J10)
Reset switch (SW1)
USB 2.0 debug/UART
connector (J11)
SGMII PHY2
(J7), ETH2
SGMII PHY1
(J6), ETH1
SDA_LED (D1)
USB VBUS
LED (D2)
PORST LED (D3)
Figure 1-2. FRDM-LS1012A top view
Chapter 1 Overview
QorIQ FRDM-LS1012A Board Reference Manual, Rev. 3, 12/2016
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FRDM-LS1012A top view
QorIQ FRDM-LS1012A Board Reference Manual, Rev. 3, 12/2016
10 NXP Semiconductors
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