NXP PN5331B3HN/C270 Schematics

PN533
Near Field Communication (NFC) controller
Rev. 3.3 — 16 July 2012 158233

1. General description

The PN533 is a highly integrated transceiver module for contactle ss communication at
13.56 MHz based on the 80C51 microcontroller core. A dedicated ROM code is implemented to handle different RF protocols.

1.1 RF protocols

The PN533 supports four main operating modes:
ISO/IEC 14443A Reader/Writer (including MIFARE product family)
FeliCa Reader/Writer
ISO/IEC 18092, ECMA 340 Peer-to-Peer
Product short data sheet
PUBLIC
The PN533 hardware implements a demodulator and decoder for signals from ISO/IEC 14443A compatible cards and transponders. The PN533 hardware handles the complete ISO/IEC 14443A framing and error detection and upper layers of this protocol (i.e. ISO/IEC 14443-4) are implemented in firmware.
The PN533 supports all MIFARE products (e.g. MIFARE crypto method). It supports contactless communication using higher transfer speeds up to 848 kbit/s in both directions.
The PN533 hardware supports layers 2 and 3 of the ISO/IEC 14443B Reader/Writer communication scheme, except anticollision. Anticollision is implemented in firmware as well as upper layers (i.e. ISO/IEC 14443-4).
The PN533 can demodulate and decode FeliCa coded signals. The PN533 handles the FeliCa framing and error detection. It supports contactless communication using FeliCa Higher transfer speeds up to 424 kbit/s in both directions.
Compliant to ECMA 340 and ISO/IEC 18092 NFCIP-1 Passive and Active co mmunication modes, the PN5331B3HN/C270 offers the possibility to communicate to another NFCIP-1 compliant device, at transfer speeds up to 424 kbit/s. The PN533 handles the complete NFCIP-1 framing and error detection.

1.2 Interfaces

The PN533 supports USB 2.0 full speed interface (bus powered or host powered mode). PN533 also has a master I
2
C interface enabling the drive of following peripherals:
An external EEPROM
A TDA8029 smart card reader
NXP Semiconductors

1.3 Standards compliancy

PN533 offers commands in order for application s to be compliant in reader mode with “Paypass-ISO/IEC 14443 Implementation v1.1”.
PN533 supports RF protocols ISO/IEC 14443A and B such as compliancy with Smar t eID standard can be achieved at application level.
A dedicated command is implemented in PN533 firmware to support NFC secure applications in accordance with “NFC sec Security layer for NFC” specification in order to enable USB wireless or BT enabler applications in a host baseband.

2. Features and benefits

80C51 microcontroller core with 45056 bytes ROM and 1224 bytes RAMHighly integrated demodulator and decoder Buffered output drivers to connect an antenna with minimum number of external
components
Integrated RF level detectorIntegrated data mode detectorSupports ISO/IEC 14443A Reader/Writer mode up to 848 kbit/sSupports ISO/IEC 14443B Reader/Writer mode up to 848 kbit/sSu pp or ts MIFARE encryption in Reader/Writer mode and high er tran sf er spee d
communication at 212 kbit/s, 424 kbit/s and 848kbit/s
Supports contactless communication according to the FeliCa protocol at 212 kbit/s and
424 kbit/s
Typical operating distance in Reader/Writer mode for communication to
ISO/IEC 14443A/MIFARE, ISO/IEC 14443B or FeliCa cards up to 50 mm depending on antenna size and tuning
Su pp or t NF CIP- 1 mo d e up to 424 kbit /sTypical operating distance in NFCIP-1 mode up to 5 0 mm dep ending on ante nna size ,
tuning and power supply
Su pp or te d USB 2. 0 full sp ee d int er fa ceRestricted I
card reader
Lo w- po we r m od es
Hard-Power-Down mode
Soft-Power-Down mode 27.12 MHz Crystal oscillatorOn-Chip PLL to generate internally 96 MHz for the USB interfacePower modes
USB bus power mode
2.5 V to 3.6 V power supply operating range in non-USB bus power modeDedicated IO ports for external device control
PN533
Near Field Communication (NFC) controlle r
2
C master interface to control an external I2C EEPROM or TDA8029 smart
PN533_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product short data sheet PUBLIC
Rev. 3.3 — 16 July 2012
158233 2 of 9
NXP Semiconductors

3. Quick reference data

PN533
Near Field Communication (NFC) controlle r
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
BUS
V
DDA
V
DDD
V
DD(TVDD)
V
DD(PVDD)
V
DD(SVDD)
bus supply voltage 4.02 5 5.25 V
2.5 3.3 3.6 V
[1]
2.5 3.3 3.6 V
[1]
2.5 3.3 3.6 V
[1]
2.5 3.3 3.6 V
analog supply voltage V digital supply voltage TVDD supply voltage
(non-USB mode); V
BUS=VDDD; VSSD DDA
V
DD(PVDD)
V
SS(PVSS)
= V
DDD
; V = V
= V
= V
SSA
SS(TVSS)
=0V
DD(TVDD)
SSD
= 0 V
=
=
PVDD supply voltage 1.6 - 3.6 V SVDD supply voltage V
SSA
V
SS(TVSS)
= V
SSD
= V
SS(PVSS)
= 0 V ; reserved for
=
V
0.1 - V
DDD
DDD
V
future use
I
BUS
bus supply current maximum load current (USB
mode); measured on V
BUS
maximum inrush current
150 mA
100 mA limitation; at power-up (curlimoff =0)
I
pd
power-down current V
DDA
= V
DDD
= V
DD(TVDD)
hard power-down; RF
= V
DD(PVDD)
= 3 V; not powered from USB
10 A
level detector off soft power-down; RF level
30 A
detector on
I
CCSL
I
DDD
I
DD(SVDD)
I
DDA
I
DD(TVDD)
P
tot
T
amb
suspended low-power device supply current
RF level detector on, (without resistor on DP/DM)
digital supply current RF level detector on,
switch off
= 3 V - - 30 mA
SVDD supply current V
V
DD(SVDD) DDS
analog supply current RF level detector on - 6 - mA TVDD supply current d uring RF transmission;
total power dissipation T
V
DD(TVDD) amb
=3 V
= 30 Cto+85C--0.55W
ambient temperature 30 - +85 C
[1]
--250A
[1]
-15-mA
-60100mA
[1] V
DDD
, V
DDA
and V
DD(TVDD)
must always be at the same supply voltage.

4. Ordering information

[1][2]
Licenses”
Name Description Version
HVQFN40 plastic thermal enhanced very thin quad flat package; no
leads; 40 terminals; body 6 x 6 x 0.85 mm
Rev. 3.3 — 16 July 2012
158233 3 of 9
SOT618-1
Table 2. Ordering information
Type number Package
PN5331B3HN/C270
[1] 70 refers to the ROM code version described in User Manual. [2] Refer to Section 9.4 “
PN533_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product short data sheet PUBLIC
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