The PN533 hardware implements a demodulator and decoder for signals from
ISO/IEC 14443A compatible cards and transponders. The PN533 hardware handles the
complete ISO/IEC 14443A framing and error detection and upper layers of this protocol
(i.e. ISO/IEC 14443-4) are implemented in firmware.
The PN533 supports all MIFARE products (e.g. MIFARE crypto method). It supports
contactless communication using higher transfer speeds up to 848 kbit/s in both
directions.
The PN533 hardware supports layers 2 and 3 of the ISO/IEC 14443B Reader/Writer
communication scheme, except anticollision. Anticollision is implemented in firmware as
well as upper layers (i.e. ISO/IEC 14443-4).
The PN533 can demodulate and decode FeliCa coded signals. The PN533 handles the
FeliCa framing and error detection. It supports contactless communication using FeliCa
Higher transfer speeds up to 424 kbit/s in both directions.
Compliant to ECMA 340 and ISO/IEC 18092 NFCIP-1 Passive and Active co mmunication
modes, the PN5331B3HN/C270 offers the possibility to communicate to another NFCIP-1
compliant device, at transfer speeds up to 424 kbit/s. The PN533 handles the complete
NFCIP-1 framing and error detection.
1.2Interfaces
The PN533 supports USB 2.0 full speed interface (bus powered or host powered mode).
PN533 also has a master I
2
C interface enabling the drive of following peripherals:
• An external EEPROM
• A TDA8029 smart card reader
NXP Semiconductors
1.3Standards compliancy
PN533 offers commands in order for application s to be compliant in reader mode with
“Paypass-ISO/IEC 14443 Implementation v1.1”.
PN533 supports RF protocols ISO/IEC 14443A and B such as compliancy with Smar t eID
standard can be achieved at application level.
A dedicated command is implemented in PN533 firmware to support NFC secure
applications in accordance with “NFC sec Security layer for NFC” specification in order to
enable USB wireless or BT enabler applications in a host baseband.
2. Features and benefits
80C51 microcontroller core with 45056 bytes ROM and 1224 bytes RAM
Highly integrated demodulator and decoder
Buffered output drivers to connect an antenna with minimum number of external
components
Integrated RF level detector
Integrated data mode detector
Supports ISO/IEC 14443A Reader/Writer mode up to 848 kbit/s
Supports ISO/IEC 14443B Reader/Writer mode up to 848 kbit/s
Su pp or ts MIFARE encryption in Reader/Writer mode and high er tran sf er spee d
communication at 212 kbit/s, 424 kbit/s and 848kbit/s
Supports contactless communication according to the FeliCa protocol at 212 kbit/s and
424 kbit/s
Typical operating distance in Reader/Writer mode for communication to
ISO/IEC 14443A/MIFARE, ISO/IEC 14443B or FeliCa cards up to 50 mm depending
on antenna size and tuning
Su pp or t NF CIP- 1 mo d e up to 424 kbit /s
Typical operating distance in NFCIP-1 mode up to 5 0 mm dep ending on ante nna size ,
tuning and power supply
Su pp or te d USB 2. 0 full sp ee d int er fa ce
Restricted I
card reader
Lo w- po we r m od es
Hard-Power-Down mode
Soft-Power-Down mode
27.12 MHz Crystal oscillator
On-Chip PLL to generate internally 96 MHz for the USB interface
Power modes
USB bus power mode
2.5 V to 3.6 V power supply operating range in non-USB bus power mode
Dedicated IO ports for external device control
PN533
Near Field Communication (NFC) controlle r
2
C master interface to control an external I2C EEPROM or TDA8029 smart