NXP provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a
sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board
may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via
off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for
any particular application. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking
design as well as attention to supply filtering, transient suppression, and I/O signal quality.
The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations,
including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product,
it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks
associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize
inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services.
Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from the date of delivery and will
be replaced by a new kit.
NXP reserves the right to make changes without further notice to any products herein. NXP makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or
incidental damages. Typical parameters can and do vary in different applications and actual performance may vary over time. All operating
parameters, including Typical, must be validated for each customer application by customer’s technical experts.
NXP does not convey any license under its patent rights nor the rights of others. NXP products are not designed, intended, or authorized
for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or
for any other application in which the failure of the NXP product could create a situation where personal injury or death may occur.
Should the Buyer purchase or use NXP products for any such unintended or unauthorized application, the Buyer shall indemnify and hold
NXP and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and
reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges NXP was negligent regarding the design or manufacture of the part.
This document is the user guide for the KITPF5023FRDMEVM evaluation board.
This document is intended for the engineers involved in the evaluation, design,
implementation, and validation of PF5023 Power management integrated circuit (PMIC)
for high performance applications.
The scope of this document is to provide the user with information that covers interfacing
with the hardware, installing the GUI software, using other tools, and configuring the
board for the application environment.
2Finding kit resources and information on the NXP web site
NXP Semiconductors provides online resources for this evaluation board and its
supported device(s) on http://www.nxp.com.
The information page for KITPF5023FRDMEVM evaluation board is at http://
www.nxp.com/KITPF5023FRDMEVM. The information page provides overview
information, documentation, software and tools, parametrics, ordering information
and a Getting Started tab. The Getting Started tab provides quick-reference
information applicable to using the KITPF5023FRDMEVM evaluation board, including the
downloadable assets referenced in this document.
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2.1 Collaborate in the NXP community
The NXP community is for sharing ideas and tips, ask and answer technical questions,
and receive input on just about any embedded design topic.
The NXP community is at http://community.nxp.com.
3Getting ready
Working with the KITPF5023FRDMEVM requires the kit contents, additional hardware
and a Windows PC workstation with installed software.
3.1 Kit contents
• Assembled and tested KITPF5023FRDMEVM connected to FRDM-KL25Z in an anti-
• 3.0 ft USB-STD A to USB-B-mini cable
3.2 Additional hardware
In addition to the kit contents, the following hardware is necessary or beneficial when
working with this kit.
• Power supply with a range of 2.5 V to 6.0 V and current limit set initially to 100 mA
static bag
3.3 Windows PC workstation
This evaluation board requires a Windows PC workstation. Meeting these minimum
specifications should produce great results when working with this evaluation board.
• USB-enabled computer with Windows 7 or Windows 10
Installing software is necessary to work with this evaluation board. All listed software
is available on the evaluation board's information page at http://www.nxp.com/
KITPF5023FRDMEVM.
• NXP_GUI_ PR_1.0: software interface GUI, tool to configure OTP, generate TBB and
OTP scripts
4Getting to know the hardware
The KITPF5023FRDMEVM evaluation board is the complete evaluation kit of the
PF5023 power management IC from NXP Semiconductors. This user guide describes
the functionality of the evaluation board, explains how to use the PMIC device in an
application environment, and gives details about the hardware and software required.
The KITPF5023FRDMEVM board is the dedicated kit for the PF5023 PMIC but it is also
compatible with other PMIC devices in the family like the PF5020 and PF5024.
4.1 KITPF5023FRDMEVM features
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KITPF5023FRDMEVM evaluation board
• SW1, SW2, SW3 in single-phase mode (default) or multiphase mode up to 3.5 A peak
each
• PWRON switch for global wake up or enable
• Individual enable control switch for each regulator
• LEDs to indicate individual PGOODx and global PGOOD status
• USB interface through FRDM-KL25Z for register access, TBB mode, and OTP
programming
• Multiple signal connectors for easy access
• Terminal blocks and test point for all the regulators for easy testing and evaluation
Figure 2 identifies important components on the board.
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KITPF5023FRDMEVM evaluation board
1. PF5023 PMIC
2. VIN connector
3. PWRON control switch and jumper
4. Enable switches for the regulators
5. Feedback jumpers for the buck regulators
6. FRDM-KL25Z connectors (for SW/GUI interface) – on the bottom side of the board
7. Jumpers for IO control (TBBEN, VDDOTP, STANDBY, WDI, VDDIO)
8. Load terminal for the buck outputs
9. Load / test point for LDO1 output
10. Connector for efficiency measurement
11. Connector for master/slave (multi-PMIC) connection
12. Connector for signals and power measurement
13. Connectors for IO measurement
14. Feedback test points of buck regulators to measure loop stability
Figure 2. Evaluation board featured component locations
4.2.1 PF5023: Power management integrated circuit (PMIC) for high performance
applications
4.2.1.1 General description
The PF5023 integrates multiple high performance buck regulators. It can operate as a
stand-alone point-of-load regulator IC, or as a companion chip to a larger PMIC.
Built-in one-time programmable (OTP) memory stores key startup configurations,
drastically reducing external components typically used to set output voltage and
sequence of regulators. Regulator parameters are adjustable through high-speed I2C
after start up offering flexibility for different system states.
4.2.1.2 Features
• Three high efficiency buck converters
• VTT Termination mode on SW2
• Watchdog timer/monitor
• Monitoring circuit to fit ASIL B safety level
• One-time programmable device configuration
• 3.4 MHz I2C communication interface
• 40-pin QFN package with wettable flank and exposed pad
4.2.2 Jumper, switch, and shunt configuration
Table 1. Evaluation board jumper, switch, and shunt descriptions