NXP BSS84AKS Schematic [ru]

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BSS84AKS

TSSOP6

1. Product profile

1.1 General description

1.2 Features and benefits

50 V, 160 mA dual P-channel Trench MOSFET

Rev. 1 — 23 May 2011 Product data sheet

Dual P-channel enhancement mode Field- Ef fe ct Transistor (FET) in a very small SOT363 (SC-88) package using Trench MOSFET technology.

 Logic-level compatible  Very fast switching

 ESD protection up to 1 kV  AEC-Q101 qualified

 Trench MOSFET technology

1.3 Applications

 Relay driver  High-speed line driver

 High-side loadswitch  Switching circuits

1.4 Quick reference data

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

Per transistor

Static characteristics (per transistor)

DSon

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for

drain-source voltage Tj=25°C ---50V gate-source voltage -20 - 20 V drain current VGS=-10V; T

drain-source on-state resistance

drain 1 cm

=25°C

amb

VGS=-10V; ID= -100 mA; Tj=25°C

[1]

---160mA

-4.57.5Ω

NXP Semiconductors

2. Pinning information

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Table 2. Pinning information

Pin Symbol Description Simplified outline Graphic symbol

1S1source 1 2 G1 gate 1

3D2drain 2 4S2source 2 5 G2 gate 2 6D1drain 1

132

SOT363 (TSSOP6)

G1 G2

S1D2S2

sym147

3. Ordering information

Table 3. Ordering information

Type number Package

BSS84AKS TSSOP6 plastic surface-mounted package; 6 leads SOT363

Name Description Version

4. Marking

Table 4. Marking codes

Type number Marking code

BSS84AKS %VY

[1]

[1] % = placeholder for manufacturing site code

Product data sheet Rev. 1 — 23 May 2011 2 of 17

NXP Semiconductors

5. Limiting values

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per transistor

tot

Per device

tot

amb

stg

Source-drain diode

ESD maximum rating

ESD

drain-source voltage Tj=25°C - -50 V gate-source voltage -20 20 V drain current VGS=-10V; T

=-10V; T

peak drain current T total power dissipation T

total power dissipation T

= 25 °C; single pulse; tp≤ 10 µs - -640 mA

amb

=25°C

amb

= 25 °C - 990 mW

=25°C

amb

amb amb

=25°C = 100 °C

[1]

- -160 mA

[1]

- -100 mA

[2]

- 280 mW

[1]

- 320 mW

[2]

- 445 mW junction temperature -55 150 °C ambient temperature -55 150 °C storage temperature -65 150 °C

source current T

amb

electrostatic discharge voltage HBM

=25°C

[1]

- -160 mA

[3]

- 1000 V

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2. [2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. [3] Measured between all pins.

Product data sheet Rev. 1 — 23 May 2011 3 of 17

NXP Semiconductors

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

001aao121

Tj (°C)

(%)

120

der

-75 17512525 75-25

Fig 1. Normalized total power dissipation as a

function of junction temperature

-1

(A)

-1

-10

120

der

(%)

-75 17512525 75-25

001aao122

Tj (°C)

Fig 2. Normalized continuous drain curre nt as a

function of junction temperature

001aao139

(1)

(2)

(3)

(4)

-10

-2

-3

-10

(1) t

-1

is single pulse

= 100 μs

-10-1 VDS (V)

(5)

(6)

-10

(2) tp = 1 ms (3) t

= 10 ms

(4) DC; T

= 25 °C

(5) tp = 100 ms (6) DC; T

= 25 °C; drain mounting pad 1 cm

amb

Fig 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source

voltage

Product data sheet Rev. 1 — 23 May 2011 4 of 17

NXP Semiconductors

6. Thermal characteristics

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Table 6. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Per device

th(j-a)

thermal resistance from junction to ambient in free air

[1]

- - 300 K/W

Per transistor

th(j-a)

th(j-sp)

thermal resistance from junction to ambient in free air

thermal resistance from junction to solder point - - 130 K/W

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm

th(j-a)

duty cycle = 1

0.75

0.5

0.33

0.25

0.1

0.05

0.02

0.01

0.2

(K/W)

[1]

- 390 445 K/W

[2]

- 340 390 K/W

017aaa034

−3

−2

−1

10110

tp (s)

FR4 PCB, standard footprint

Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;

typical values

Product data sheet Rev. 1 — 23 May 2011 5 of 17

NXP Semiconductors

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

tp (s)

017aaa035

th(j-a)

−3

duty cycle = 1

0.75

0.5

0.33

0.25

0.1

0.05

0.2

0.02

0.01

−2

(K/W)

FR4 PCB, mounting pad for drain 1 cm

−1

10110

Fig 5. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;

typical values

Product data sheet Rev. 1 — 23 May 2011 6 of 17

NXP Semiconductors

7. Characteristics

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Table 7. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics (per transistor)

(BR)DSS

drain-source breakdown

ID= -10 µA; VGS=0V; Tj=25°C -50--V

voltage

GSth

gate-source threshold

ID= -250 µA; VDS=VGS; Tj= 25 °C -1.1 -1.6 -2.1 V

voltage

DSS

GSS

DSon

drain leakage current VDS=-50V; VGS=0V; Tj=25°C ---1µA

=-50V; VGS=0V; Tj= 150 °C - - -2 µA

gate leakage current VGS=-20V; VDS=0V; Tj= 25 °C - - -10 µA

=20V; VDS=0V; Tj= 25 °C - - -10 µA

drain-source on-state resistance

VGS=-10V; ID= -100 mA; Tj=25°C - 4.5 7.5 Ω

=-10V; ID= -100 mA; Tj= 150 °C - 8 13.5 Ω

=-5V; ID=-100mA; Tj=25°C - 5.7 8.5 Ω

forward transconductance VDS=-10V; ID=-100mA; Tj= 25 °C - 150 - mS

Dynamic characteristics (per transistor)

Q Q Q C C C

G(tot) GS

GD iss oss rss

total gate charge VDS=-25V; ID=-200mA; VGS=-5V; gate-source charge - 0.12 - nC

Tj=25°C

gate-drain charge - 0.09 - nC input capacitance VDS= -25 V; f = 1 MHz; VGS=0V; output capacitance - 4.5 - pF

Tj=25°C

reverse transfer

- 0.26 0.35 nC

- 2436pF

-1.3-pF

capacitance

d(on)

d(off)

turn-on delay time VDS=-30V; RL=250Ω; VGS=-10V;

=6Ω; Tj=25°C

rise time - 11 - ns

G(ext)

turn-off delay time - 48 96 ns fall time - 25 - ns

- 1326ns

Source-drain diode (per transistor)

source-drain voltage IS=-115mA; VGS=0V; Tj= 25 °C -0.48 -0.85 -1.2 V

Product data sheet Rev. 1 — 23 May 2011 7 of 17

NXP Semiconductors

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

-0.20 VGS = -10 V -4.0 V

(A)

-0.15

-0.10

-0.05

0-4-3-1 -2

-3.5 V

001aao124

-3.0 V

-2.5 V

VDS (V)

Tj = 25 °C Tj = 25 °C; VDS = -5 V

Fig 6. Output characteristics; drain current as a

function of drain-source voltage; typical values

001aao126

(3)

DSon

(Ω)

(1)

(2)

001aao125

(2)

(3)

VGS (V)

(A)

-10

-3

-4

-5

-6

(1)

0 -2.5-2.0-1.0 -1.5-0.5

(1) minimum values (2) typical values (3) maximum values

Fig 7. Sub-threshold drain current as a function of

gate-source voltage

001aao127

DSon

(Ω)

0 -0.4-0.3-0.1 -0.2

= 25 °C

(1) V

= -3.0 V

(4)

(5)

ID (A)

(2) VGS = -3.5 V (3) V

= -4.0 V

(4) V

= -5.0 V

(5) V

= -10.0 V

Fig 8. Drain-source on-state resistance as a function

of drain current; typical values

0 -10-8-4 -6-2

= -200 mA

(1) T

= 150 °C

(1)

(2)

VGS (V)

(2) Tj = 25 °C

Fig 9. Drain-source on-state resistance as a function

of gate-source voltage; typical values

Product data sheet Rev. 1 — 23 May 2011 8 of 17

NXP Semiconductors

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

-0.20

(A)

-0.15

-0.10

-0.05

0-4-3-1 -2

VDS > ID x R

(2)

(1)

DSon

001aao128

(1)

VGS (V)

(2)

(1) Tj = 25 °C (2) T

= 150 °C

Fig 10. Transfer characteristics: drain current as a

function of gate-source voltage; typical values

-3

001aao130

2.0

1.5

1.0

0.5

-60 180120060

001aao129

Tj (°C)

Fig 11. Normalized drain-source on-state resistance as

a function of junction temperature; typical values

001aao131

GS(th)

(V)

-2

-1

-60 180120060

ID = -0.25 mA; VDS = V

(1)

(2)

(3)

Tj (°C)

(1) maximum values (2) typical values (3) minimum values

Fig 12. Gate-source threshold voltage as a function of

junction temperature

(pF)

-10

f = 1 MHz, V (1) C (2) C (3) C

-1

iss oss rss

(1)

(2)

(3)

= 0 V

-10-1 VDS (V)

-10

Fig 13. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical values

Product data sheet Rev. 1 — 23 May 2011 9 of 17

NXP Semiconductors

003aaa508

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

amb

001aao132

QG (nC)

= 25 °C

-10

(V)

-8

-6

-4

-2

0 0.60.40.2

ID = -0.2 A; VDS = -25 V; T

Fig 14. Gate-source voltage as a function of gate

charge; typical values

-0.3

(A)

GS(pl)

GS(th)

GS1QGS2

G(tot)

Fig 15. Gate charge wa veform definitions

001aao133

-0.2

-0.1

(1)

(2)

0 -1.2-0.8-0.4

VSD (V)

VGS = 0 V (1) T

= 150 °C

(2) T

= 25 °C

Fig 16. Source current as a function of source-drain voltage; typical values

Product data sheet Rev. 1 — 23 May 2011 10 of 17

NXP Semiconductors

8. Test information

Fig 17. Duty cycle definition

8.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications.

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

duty cycle δ =

006aaa812

Product data sheet Rev. 1 — 23 May 2011 11 of 17

NXP Semiconductors

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

9. Package outline

lastic surface-mounted package; 6 leads SOT36

v M

456

pin 1 index

132

wBM

detail X

0 1 2 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT

1.1

0.8

OUTLINE VERSION

SOT363 SC-88

max

0.1

0.30

0.20

IEC JEDEC JEITA

0.25

0.10

2.2

1.8

1.35

1.3

1.15

REFERENCES

0.65

HEL

2.2

2.0

0.45

0.15

Qywv

0.25

0.15

0.2 0.10.2

EUROPEAN

PROJECTION

ISSUE DATE

04-11-08 06-03-16

Fig 18. Package outline SOT363 (TSSOP6)

Product data sheet Rev. 1 — 23 May 2011 12 of 17

NXP Semiconductors

sot363_fw

10. Soldering

1.5

2.35

0.6

(4×)

0.5

(4×)

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

2.65

solder lands

0.4 (2×)

solder resist

solder paste

0.5

(4×)

0.6

(4×)

0.6

(2×)

1.8

Fig 19. Reflow soldering footprint for SOT363 (TSSOP6)

4.5

1.3 1.3

2.45

5.3

Fig 20. Wave soldering footprint for SOT363 (TSSOP6)

1.5

0.3

occupied area

Dimensions in mm

sot363_

solder lands

2.5 solder resist

occupied area

Dimensions in mm

preferred transport

direction during soldering

Product data sheet Rev. 1 — 23 May 2011 13 of 17

NXP Semiconductors

11. Revision history

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Table 8. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BSS84AKS v.2 20110523 Product data sheet - -

Product data sheet Rev. 1 — 23 May 2011 14 of 17

NXP Semiconductors

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

12. Legal information

12.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s ) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com.

[1] [2]

Product status

[3]

Definition

12.2 Definitions

Preview — The document is a preview version only. The document is still

subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

12.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including withou t limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied pri or to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonabl y be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default , damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third part y customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.

Product data sheet Rev. 1 — 23 May 2011 15 of 17

NXP Semiconductors

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpret ed or construed as an offer to sell products that is open f or acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

, unless otherwise

12.4 Trademarks

Notice: All referenced brands, prod uct names, service names and trad emarks are the property of their respective owners.

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.

HD Radio and HD Radio logo — are trademarks of iBiquity Digital

Corporation.

13. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Product data sheet Rev. 1 — 23 May 2011 16 of 17

NXP Semiconductors

14. Contents

1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . .5

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .7

8 Test information. . . . . . . . . . . . . . . . . . . . . . . . .11

8.1 Quality information . . . . . . . . . . . . . . . . . . . . . .11

9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .12

10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .14

12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .15

12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .15

12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .15

12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .16

13 Contact information. . . . . . . . . . . . . . . . . . . . . .16

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 23 May 2011

Document identifier: BSS84AKS

NXP BSS84AKS Schematic [ru]

Specifications and Main Features

Frequently Asked Questions

User Manual

1. Product profile

1.1 General description

1.2 Features and benefits

1.3 Applications

1.4 Quick reference data

2. Pinning information

3. Ordering information

4. Marking

5. Limiting values

6. Thermal characteristics

7. Characteristics

8. Test information

8.1 Quality information

9. Package outline

10. Soldering

11. Revision history

12. Legal information

12.1 Data sheet status

12.2 Definitions

12.3 Disclaimers

12.4 Trademarks

13. Contact information

14. Contents