BSS84
P-channel enhancement mode vertical DMOS transistor
Rev. 06 — 16 December 2008 Product data sheet
1. Product profile
1.1 General description
P-channel enhancement mode vertical Diffusion Metal-Oxide Semiconductor (DMOS)
transistor in a small Surface-Mounted Device (SMD) plastic package.
Table 1. Product overview
Type number
BSS84 SOT23 TO-236AB
BSS84/DG
[1] /DG: halogen-free
1.2 Features
[1]
Package
NXP JEDEC
n Low threshold voltage n Direct interface to CMOS and
Transistor-Transistor Logic (TTL)
n High-speed switching n No secondary breakdown
1.3 Applications
n Line current interrupter in telephone sets n Relay, high-speed and line transformer
drivers
1.4 Quick reference data
n VDS≤−50 V n ID≤−130 mA
n R
≤ 10 Ω n P
DSon
≤ 250 mW
tot
NXP Semiconductors
2. Pinning information
Table 2. Pinning
Pin Symbol Description Simplified outline Graphic symbol
1 G gate
2 S source
3 D drain
3. Ordering information
Table 3. Ordering information
Type number
BSS84 TO-236AB plastic surface-mounted package; 3 leads SOT23
BSS84/DG
BSS84
P-channel enhancement mode vertical DMOS transistor
3
12
SOT23 (TO-236AB)
[1]
Package
Name Description Version
G
001aaa025
D
S
4. Marking
[1] /DG: halogen-free
Table 4. Marking codes
Type number
[1]
Marking code
BSS84 13*
BSS84/DG ZV*
[1] /DG: halogen-free
[2] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
[2]
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 2 of 11
NXP Semiconductors
5. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
GS
I
D
I
DM
P
tot
T
stg
T
j
[1] Device mounted on a Printed-Circuit Board (PCB).
BSS84
P-channel enhancement mode vertical DMOS transistor
drain-source voltage 25 °C ≤ Tj≤ 150 °C-−50 V
gate-source voltage - ±20 V
drain current Tsp=25°C; VGS= −10 V;
see
Figure 1
= 100 °C;
T
sp
V
= −10 V
GS
peak drain current Tsp=25°C; tp≤ 10 µs;
see
Figure 1
total power dissipation Tsp=25°C; see Figure 2
storage temperature −65 +150 °C
junction temperature −65 +150 °C
- −130 mA
- −75 mA
- −520 mA
[1]
- 250 mW
3
−10
I
D
(mA)
2
−10
−10
−1
−1 −10
Tsp=25°C
(1) R
DSon
limitation
(1)
DC
−10
VDS (V)
tp =
10 µs
100 µs
1 ms
10 ms
100 ms
mld251
Fig 1. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
2
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 3 of 11
NXP Semiconductors
BSS84
P-channel enhancement mode vertical DMOS transistor
Fig 2. Power derating curve
6. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-a)
thermal resistance from
junction to ambient
300
P
tot
(mW)
200
100
0
0 200
50 100 150
see Figure 3
mld199
T
(°C)
amb
[1]
- - 500 K/W
[1] Mounted on a PCB, vertical in still air.
3
10
R
th(j-a)
(K/W)
10
10
δ = 0.75
0.5
2
10
1
−1
−6
10
0.2
0.1
0.05
0.02
0.01
P
0
−5
10
−4
10
−3
10
−2
10
−1
10
110
t
p
Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration
mld250
t
p
δ =
T
T
10
t
2
tp (s)
3
10
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 4 of 11
NXP Semiconductors
7. Characteristics
Table 7. Characteristics
Tj=25°C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
V
GS(th)
I
DSS
I
GSS
R
DSon
Dynamic characteristics
| transfer admittance VDS= −25 V;
|Y
fs
C
iss
C
oss
C
rss
t
on
t
off
BSS84
P-channel enhancement mode vertical DMOS transistor
drain-source breakdown
voltage
gate-source threshold
voltage
drain leakage current VDS= −40 V; VGS=0V
gate leakage current VGS= +20 V; VDS= 0 V - - 100 nA
drain-source on-state
resistance
input capacitance VGS=0V; VDS= −25 V;
output capacitance - 15 25 pF
reverse transfer
capacitance
turn-on time VDS= −40 V; VGS=0V
turn-off time VDS= −40 V;
ID= −10 µA; VGS=0V −50--V
ID= −1 mA; VDS=VGS;
see
Figure 8
=25°C −0.8 - −2V
T
j
= −55 °C--−1.8 V
T
j
=25°C--−100 nA
T
j
= −50 V; VGS=0V
V
DS
=25°C--−10 µA
T
j
= 125 °C--−60 µA
T
j
= −20 V; VDS= 0 V - - 100 nA
V
GS
VGS= −10 V;
I
= −130 mA;
D
see
Figure 5 and 7
-610Ω
50--mS
I
= −130 mA
D
- 2545pF
f = 1 MHz; see
Figure 9
- 3.5 12 pF
-3-ns
to −10 V; I
see
Figure 10 and 11
= −200 mA;
D
-7-ns
V
= −10 V to 0 V;
GS
I
= −200 mA;
D
see
Figure 10 and 11
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 5 of 11
NXP Semiconductors
BSS84
P-channel enhancement mode vertical DMOS transistor
−600
VGS = −10 V
I
D
(mA)
−400
−200
0
0 −2 −10 −12
−7.5 V
−4 −6 −8
−6 V
mld197
−5 V
−4 V
−3 V
−2.5 V
V
DS
(V)
Tj=25°CT
Fig 4. Output characteristics: drain current as a
function of drain-source voltage; typical
values
−600
I
D
(mA)
−400
mld196
R
DSon
(Ω)
60
40
20
0
−1
=25°C
j
V
= −2.5 V
GS
−10 −10
−3 V
2
−4 V
I
D
−5 V
(mA)
mld198
−7.5 V
−10 V
−10
3
Fig 5. Drain-source on-state resistance as a function
of drain current; typical values
mld194
(1)
(2)
R
DSon
R
DSon(25°C)
1.8
1.4
−200
0
0 −2 −4 −10
−6
−8
V
(V)
GS
1.0
0.6
0 50 100 150−50
T
(°C)
j
Tj=25°C; VDS= −10 V (1) ID= −130 mA; VGS= −10 V
(2) ID= −20 mA; VGS= −2.4 V
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
BSS84_6 © NXP B.V. 2008. All rights reserved.
Fig 7. Normalized drain-source on-state resistance
factor as a function of junction temperature
Product data sheet Rev. 06 — 16 December 2008 6 of 11
NXP Semiconductors
BSS84
P-channel enhancement mode vertical DMOS transistor
T
(°C)
j
mld195
V
GSth
V
GSth(25°C)
1.2
1.0
0.8
0.6
−50
0 50 100 150
ID= −1 mA; VDS=V
GS
Fig 8. Gate-source threshold voltage as a function of
junction temperature
8. Test information
80
C
(pF)
60
40
C
iss
20
0
0
−10 −20 −30
C
oss
C
rss
V
DS
VGS= 0 V; f = 1 MHz
Fig 9. Input, output and reverse transfer
capacitances as a function of drain-source
voltage; typical values
mld191
(V)
10 %
t
on
90 %
90 %
0 V
−10 V
50 Ω
V
DS
I
D
= −40 V
mld189
INPUT
OUTPUT
Fig 10. Switching time test circuit Fig 11. Input and output waveforms
10 %
t
off
mbb690
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 7 of 11
NXP Semiconductors
BSS84
P-channel enhancement mode vertical DMOS transistor
9. Package outline
Plastic surface-mounted package; 3 leads SOT23
D
3
A
A
1
12
e
1
b
p
e
w M
B
E
H
E
detail X
AB
Q
L
p
X
v M
A
c
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
1.1
mm
0.9
OUTLINE
VERSION
SOT23 TO-236AB
1
A
max.
0.48
0.1
0.38
cD
b
p
0.15
0.09
IEC JEDEC JEITA
3.0
2.8
E
1.4
1.2
REFERENCES
1.9
e
e
1
0.95
H
2.5
2.1
L
Qwv
p
E
0.55
0.45
0.15
0.45
0.2
0.1
EUROPEAN
PROJECTION
ISSUE DATE
04-11-04
06-03-16
Fig 12. Package outline SOT23 (TO-236AB)
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 8 of 11
NXP Semiconductors
P-channel enhancement mode vertical DMOS transistor
10. Revision history
Table 8. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BSS84_6 20081216 Product data sheet - BSS84_5
Modifications:
BSS84_5 20081209 Product data sheet - BSS84_4
BSS84_4 20070717 Product data sheet - BSS84_3
BSS84_3 20030804 Product specification - BSS84_2
BSS84_2 19970618 Product specification - BSS84_1
BSS84_1 19950407 Product specification - -
• Table 5 “Limiting values”: P
figure reference updated
tot
BSS84
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 9 of 11
NXP Semiconductors
11. Legal information
11.1 Data sheet status
BSS84
P-channel enhancement mode vertical DMOS transistor
Document status
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The productstatus of device(s) described in this documentmay have changed since thisdocument waspublished andmay differin caseof multipledevices. Thelatest productstatus
information is available on the Internet at URL
[1][2]
Product status
11.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information includedherein and shallhave noliability forthe consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
11.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
[3]
http://www.nxp.com.
Definition
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at
http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyanceor implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
11.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BSS84_6 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 06 — 16 December 2008 10 of 11
NXP Semiconductors
13. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12 Contact information. . . . . . . . . . . . . . . . . . . . . 10
13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
BSS84
P-channel enhancement mode vertical DMOS transistor
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2008. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 December 2008
Document identifier: BSS84_6
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