NXP 2N7002PW Schematic [ru]

2N7002PW
60 V, 310 mA N-channel Trench MOSFET
Rev. 02 — 29 July 2010 Product data sheet

1. Product profile

1.1 General description

N-channel enhancement mode Field-Effect Transistor (FET) in a very small SOT323 (SC-70) Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology.

1.2 Features and benefits

AEC-Q101 qualifiedLogic-level compatible
Trench MOSFET technologyVery fast switching

1.3 Applications

High-speed line driverLow-side loadswitch
Relay driverSwitching circuits

1.4 Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DS
V
GS
I
D
Static characteristics
R
DSon
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm2.
drain-source voltage
gate-source voltage
drain current VGS=10V; T
drain-source on-state resistance
T
=25°C --60V
amb
-20 - 20 V
=25°C
amb
VGS=10V; ID=500mA; Tj=25°C; tp≤ 300 µs; pulsed; δ≤0.01
[1]
--310mA
-11.6
NXP Semiconductors
12
G
m

2. Pinning information

2N7002PW
60 V, 310 mA N-channel Trench MOSFET
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 G gate 2Ssource
3
D
3 D drain
S
bb076
SOT323 (SC-70)

3. Ordering information

Table 3. Ordering information
Type number Package
2N7002PW SC-70 plastic surface-mounted package; 3 leads SOT323
Name Description Version

4. Marking

Table 4. Marking codes
Type number Marking code
2N7002PW X8%
[1]
[1] % = -: made in Hong Kong; % = p: made in Hong Kong; % = t: made in Malaysia; % = W: made in China

5. Limiting values

Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
GS
I
D
I
DM
P
tot
T
j
T
amb
T
stg
Source-drain diode
I
S
drain-source voltage T gate-source voltage -20 20 V drain current VGS=10V; T
peak drain current T total power dissipation T
junction temperature - 150 °C ambient temperature -55 150 °C storage temperature -65 150 °C
source current T
=25°C - 60 V
amb
=25°C
amb
=10V; T
V
GS
= 25 °C; single pulse; tp≤ 10 µs - 1.2 A
amb
=25°C
amb
= 25 °C - 830 mW
T
sp
=25°C
amb
amb
= 100 °C
[1] [1]
[2] [1]
[1]
- 310 mA
- 240 mA
- 260 mW
- 310 mW
- 310 mA
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm2.
2N7002PW All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 July 2010 2 of 15
NXP Semiconductors
017aaa027
2N7002PW
60 V, 310 mA N-channel Trench MOSFET
[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.
120
P
der
(%)
80
40
0
75 17512525 75−25
017aaa001
T
(°C)
amb
Fig 1. Normalized total power dissipation as a
function of ambient temperature
10
I
D
(A)
1
1
10
120
I
der
(%)
80
40
0
75 17512525 75−25
017aaa002
T
(°C)
amb
Fig 2. Normalized continuous drain current as a
function of ambient temperature
(1)
(2)
(3)
(4)
2
10
3
10
1
10
101
VDS (V)
(5) (6)
2
10
IDM = single pulse (1) tp = 100 μs (2) t
= 1 ms
p
(3) t
= 10 ms
p
(4) tp = 100 ms (5) DC; T (6) DC; T
= 25 °C
sp
= 25 °C; drain mounting pad 1 cm
amb
2
Fig 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source
voltage
2N7002PW All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 July 2010 3 of 15
NXP Semiconductors
017aaa029

6. Thermal characteristics

2N7002PW
60 V, 310 mA N-channel Trench MOSFET
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-a)
R
th(j-sp)
thermal resistance from junction to ambient
thermal resistance
in free air
[1] [2]
- 415 480 K/W
- 350 400 K/W
- - 150 K/W from junction to solder point
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
2
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm
3
10
th(j-a)
10
2
10
duty cycle = 1
0.75
0.5
0.33
0.25
0.1
0.05
0.02
0
0.01
0.2
Z
(K/W)
.
017aaa028
1
3
10
2
1
10
10110
2
10
tp (s)
3
10
FR4 PCB, standard footprint
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
3
10
Z
(K/W)
duty cycle = 1
th(j-a)
10
2
10
1
3
10
0.5
0.25
0.1
0
0.75
0.33
0.2
0.05
0.02
0.01
2
FR4 PCB, mounting pad for drain 1 cm
1
10
2
10110
2
10
tp (s)
3
10
Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
2N7002PW All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 July 2010 4 of 15
NXP Semiconductors

7. Characteristics

2N7002PW
60 V, 310 mA N-channel Trench MOSFET
Table 7. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source
ID=10µA; VGS=0V; Tj=25°C 60--V
breakdown voltage
V
GSth
gate-source threshold
ID=250µA; VDS=VGS; Tj= 25 °C 1.1 1.75 2.4 V
voltage
I
DSS
I
GSS
R
DSon
drain leakage current VDS=60V; VGS=0V; Tj=25°C --1µA
=60V; VGS=0V; Tj=150°C --1A
V
DS
gate leakage current VGS=20V; VDS=0V; Tj= 25 °C - - 100 nA
=-20V; VDS=0V; Tj= 25 °C - - 100 nA
V
GS
drain-source on-state resistance
VGS=5V; ID= 50 mA; pulsed; tp≤ 300 µs; δ≤0.01 ; Tj=25°C
=10V; ID= 500 mA; pulsed;
V
GS
-1.32
-11.6
tp≤ 300 µs; δ≤0.01 ; Tj=25°C
g
fs
forward transconductance
VDS=10V; ID= 200 mA; pulsed;
300 µs; δ≤0.01 ; Tj=25°C
t
p
- 400 - mS
Dynamic characteristi cs
Q Q Q C C C
G(tot) GS
GD iss oss rss
total gate charge ID=300mA; VDS=30V; VGS=4.5V; gate-source charge - 0.2 - nC
Tj=25°C
-0.60.8nC
gate-drain charge - 0.2 - nC input capacitance VGS=0V; VDS=10V; f=1MHz; output capacitance - 7 - pF
Tj=25°C
reverse transfer
- 3050pF
-4-pF
capacitance
t
d(on)
t
r
t
d(off)
t
f
turn-on delay time VDS=50V; RL= 250 ; VGS=10V;
=6; Tj=25°C
R
rise time - 4 - ns
G(ext)
turn-off delay time - 10 20 ns fall time -5-ns
- 36ns
Source-drain diode
V
SD
source-drain voltage IS=115mA; VGS=0V; Tj= 25 °C 0.47 0.75 1.1 V
2N7002PW All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 02 — 29 July 2010 5 of 15
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