Electrical Characteristics (Notes 2, 7) (Continued)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Thermal shutdown circuitry protects the device from permanent damage.
Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 5: Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operating junction temperature (T
J-MAX-OP
= 125oC), the maximum power
dissipation of the device in the application (P
D-MAX
), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: T
A-MAX=TJ-MAX-OP
-(θJAxP
D-MAX
). Maximum power dissipation of the LM2750 in a given application can be approximated using the following
equation: P
D-MAX
=(V
IN-MAXxIIN-MAX
)-(V
OUTxIOUT-MAX
)=[V
IN-MAX
x((2xI
OUT-MAX
) + 5mA)] - (V
OUTxIOUT-MAX
). In this equation, V
IN-MAX,IIN-MAX
, and
I
OUT-MAX
are the maximum voltage/current of the specific application, and not necessarily the maximum rating of the LM2750.
The maximum ambient temperature rating of 85
o
C is determined under the following application conditions: θJA=55oC/W, P
D-MAX
= 727mW (achieved when
V
IN-MAX
= 5.5V and I
OUT-MAX
= 115mA, for example). Maximum ambient temperature must be derated by 1.1oC for every increase in internal power dissipation of
20mW above 727mW (again assuming that θ
JA
=55oC/W in the application). For more information on these topics, please refer to Application Note 1187: Leadless
Leadframe Package (LLP) and the Power Efficiency and Power Dissipation section of this datasheet.
Note 6: Junction-to-ambient thermal resistance (θ
JA
) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC
standard JESD51-7. The test board is a 4 layer FR-4 board measuring 102mm x 76mm x 1.6mm witha2x1array of thermal vias. The ground plane on the board
is 50mm x 50mm. Thickness of copper layers are 36mm/18 mm /18 mm /36 mm (1.5oz/1oz/1oz/1.5oz). Ambient temperature in simulation is 22˚C, still air. Power
dissipation is 1W.
The value of θ
JA
of the LM2750 in LLP-10 could fall in a range as wide as 50oC/W to 150oC/W (if not wider), depending on PCB material, layout, and environmental
conditions. In applications where high maximum power dissipation exists (high V
IN
, high I
OUT
), special care must be paid to thermal dissipation issues. For more
information on these topics, please refer to Application Note 1187: Leadless Leadframe Package (LLP) and the Power Efficiency and Power Dissipation
section of this datasheet. and the following sections of this datasheet:
Note 7: All room temperature limits are 100% tested or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed by correlation
using standard Statistical Quality Control methods (SQC). All limits are used to calculate Average Outgoing Quality Level (AOQL). Typical numbers are not
guaranteed, but do represent the most likely norm.
Note 8: C
FLY,CIN
, and C
OUT
: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics
Note 9: Turn-on time is measured from when SD signal is pulled high until the output voltage crosses 90% of its final value.
Note 10: Efficiency is measured versus VIN, with VINbeing swept in small increments from 3.0V to 4.2V. The average is calculated from these measurements
results. Weighting to account for battery voltage discharge characteristics (V
BAT
vs. Time) is not done in computing the average.
Note 11: SD Input Current (I
IH
) is due to a 200kΩ (typ.) pull-down resistor connected internally between the SD pin and GND.
Note 12: Limit is the minimum required output capacitance to ensure proper operation. This electrical specification is guaranteed by design.
Block Diagram
20035103
LM2750
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