NSC LM20242, LM20242MH Datasheet
November 1, 2007
LM20242
36V, 2A PowerWise® Adjustable Frequency Synchronous
Buck Regulator
General Description
The LM20242 is a full featured 1MHz capable synchronous
buck regulator capable of delivering up to 2A of load current.
The current mode control loop is externally compensated with
only two external components, offering both high performance and ease of use. The device is optimized to work over
the input voltage range of 4.5V to 36V making it well suited
for high voltage systems.
The device features internal Over Voltage Protection (OVP)
and Over Current Protection (OCP) circuits for increased system reliability. A precision Enable pin and integrated UVLO
allows the turn on of the device to be tightly controlled and
sequenced. Startup inrush currents are limited by both an internally fixed and externally adjustable soft-start circuit. Fault
detection and supply sequencing are possible with the integrated PGOOD circuit.
The LM20242 is designed to work well in multi-rail power
supply architectures. The output voltage of the device can be
configured to track a higher voltage rail using the SS/TRK pin.
If the output of the LM20242 is pre-biased at startup it will not
sink current to pull the output low until the internal soft-start
ramp exceeds the voltage at the feedback pin.
The LM20242 is offered in an exposed pad 20 pin TSSOP
package that can be soldered to the PCB, eliminating the
need for bulky heatsinks.
Features
■
2A Output Current, 3.7A peak current
■
130 mΩ/110 mΩ integrated power MOSFETs
■
1.5% output voltage accuracy
■
Current Mode Control, selectable compensation
■
Resistor programmed, 1MHz capable oscillator
■
Synchronous rectifier with diode emulation
■
Adjustable output voltage down to 0.8V
■
Compatible with pre-biased loads
■
Programmable soft-start with external capacitor
■
Precision enable pin with hysteresis
■
OVP, UVLO inputs and PGOOD output
■
Internally protected with peak current limit, thermal
shutdown and restart
■
Accurate current limit with frequency foldback
■
Non-linear current mode slope compensation
■
eTSSOP-20 exposed pad package
Applications
■
Simple to design, high efficiency point of load regulation
from a 4.5V to 36V bus
■
High Performance DSPs, FPGAs, ASICs and
Microprocessors
■
Communications Infrastructure, Automotive
Simplified Application Circuit
30031401
PowerWise® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation 300314 www.national.com
LM20242 36V, 2A PowerWise
®
Adjustable Frequency Synchronous Buck Regulator
Connection Diagram
30031402
Top View
eTSSOP-20 Package
Ordering Information
Order Number Package Type NSC Package Drawing Package Marking Supplied As
LM20242MH eTSSOP-20 MXA20A 20242MH 73 Units per Rail
LM20242MHE 250 Units per Tape and Reel
LM20242MHX 2500 Units per Tape and Reel
Pin Descriptions
Pin(s) Name Description Application Information
1 SS/TRK Soft-Start or Tracking control input An internal 5 µA current source charges an external capacitor to set
the soft-start rate. The PWM can Track to an external voltage ramp
with a low impedance source. If left open, an internal 1 ms SS ramp
is activated.
2 FB Feedback input to the error amplifier
from the regulated output
This pin is connected to the inverting input of the internal
transconductance error amplifier. An 800 mV reference is internally
connected to the non-inverting input of the error amplifier.
3 PGOOD Power good output signal Open drain output indicating the output voltage is regulating within
tolerance. A pull-up resistor of 10 kΩ to 100 kΩ is recommended if this
function is used.
4 COMP Output of the internal error amplifier and
input to the Pulse Width Modulator
The loop compensation network should be connected between the
COMP pin and the AGND pin.
5,6,15,16 VIN Input supply voltage Nominal operating range: 4.5V to 36V.
7,8,13,14 SW Switch pin The drain terminal of the internal Synchronous Rectifier power
NMOSFET and the source terminal of the internal Control power
NMOSFET.
9,10,11 GND Ground Internal reference for the power MOSFETs.
12 AGND Analog ground Internal reference for the regulator control functions.
17 BOOT Boost input for bootstrap capacitor An internal diode from VCC to BOOT charges an external capacitor
required from SW to BOOT to power the Control MOSFET gate driver.
18 VCC Output of the high voltage linear
regulator. The VCC voltage is regulated
to approximately 5.5V.
VCC tracks VIN up to about 7.2V. Above VIN = 7.2V, VCC is regulated
to approximately 5.5 Volts. A 0.1 µF to 1 µF ceramic decoupling
capacitor is required. The VCC pin is an output only.
19 EN Enable or UVLO input An external voltage divider can be used to set the line undervoltage
lockout threshold. If the EN pin is left unconnected, a 2 µA pull-up
current source pulls the EN pin high to enable the regulator.
20 RT Internal oscillator frequency adjust input Normally biased at 550 mV. An external resistor connected between
RT and AGND sets the internal oscillator frequency.
EP Exposed
Pad
Exposed pad Exposed metal pad on the underside of the package with a weak
electrical connection to GND. Connect this pad to the PC board ground
plane in order to improve heat dissipation.
www.national.com 2
LM20242
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to GND -0.3V to +38V
BOOT to GND -0.3V to +43V
BOOT to SW -0.3V to +7V
SW to GND -0.5V to +38V
SW to GND (Transient) -1.5V (< 20 ns)
FB, EN, SS/TRK, PGOOD to
GND
-0.3V to +6V
VCC to GND -0.3V to +8V
Storage Temperature -65°C to 150°C
ESD Rating
Human Body Model (Note 2) 2kV
Operating Ratings
VIN to GND +4.5V to +36V
Junction Temperature −40°C to + 125°C
Electrical Characteristics Unless otherwise stated, the following conditions apply: V
VIN
= 12V. Limits in standard
type are for TJ = 25°C only, limits in bold face type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum
and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely
parametric norm at TJ = 25°C, and are provided for reference purposes only.
Symbol Parameter Conditions Min Typ Max Units
V
FB
Feedback pin voltage V
VIN
= 4.5V to 36V
V
COMP
= 500 mV to 700 mV
0.788 0.8 0.812 V
R
HSW-DS(ON)
High-Side MOSFET On-Resistance ISW = 200 mA 130 225
mΩ
R
LSW-DS(ON)
Low-Side MOSFET On-Resistance ISW = 200 mA 110 190
mΩ
I
Q
Operating Quiescent Current V
VIN
= 4.5V to 36V 2 3 mA
I
SD
Shutdown Quiescent current VEN = 0V 150 180 µA
V
UVLO
VIN Under Voltage Lockout Rising V
VIN
3.65 3.9 4.2 V
V
UVLO(HYS)
VIN Under Voltage Lockout Hysteresis 200 400 mV
V
VCC
VCC Voltage I
VCC
= -5 mA, VEN = 5V 5.5 V
I
SS
Soft-Start Pin Source Current VSS = 0V 3 5 7 µA
I
BOOT
BOOT Diode Leakage V
BOOT
= 4V 10 nA
V
F-BOOT
BOOT Diode Forward Voltage I
BOOT
= -100 mA 0.9 1.1 V
Powergood
V
FB(OVP)
Over Voltage Protection Rising Threshold V
FB(OVP)
/ V
FB
107 110 112 %
V
FB(OVP-HYS)
Over Voltage Protection Hysteresis
Δ
VFB(OVP)
/ V
FB
2 3 %
V
FB(PG)
PGOOD Rising Threshold V
FB(PG)
/ V
FB
93 95 97 %
V
FB(PG-HYS)
PGOOD Hysteresis
Δ
VFB(PG)
/ V
FB
2 3 %
T
PGOOD
PGOOD delay 20 µs
I
PGOOD(SNK)
PGOOD Low Sink Current V
PGOOD
= 0.5V 0.6 1 mA
I
PGOOD(SRC)
PGOOD High Leakage Current V
PGOOD
= 5V 5 200 nA
Oscillator
F
SW1
Switching Frequency 1
RRT = 49.9 kΩ
675 750 825 kHz
F
SW2
Switching Frequency 2
RRT = 249 kΩ
225 250 325 kHz
T
OFF-TIME
Minimum Off Time 50 ns
V
RT
RT pin voltage
RRT = 250 kΩ
550 mV
Error Amplifier
I
FB
Feedback pin bias current VFB = 1V 50 nA
I
COMP(SRC)
COMP Output Source Current VFB = 0V
V
COMP
= 0V
200 400 µA
I
COMP(SNK)
COMP Output Sink Current VFB = 1V
V
COMP
= 0.5V
200 350 µA
g
m
Error Amplifier DC Transconductance I
COMP
= -50 µA to +50 µA 400 515 600 µmho
A
VOL
Error Amplifier Voltage Gain COMP pin open 2000 V/V
GBW Error Amplifier Gain-Bandwidth Product COMP pin open 7 MHz
3 www.national.com
LM20242
Symbol Parameter Conditions Min Typ Max Units
Current Limit
I
LIM
Cycle By Cycle Current Limit 3.1 3.7 4.65 A
T
ILIM
Cycle By Cycle Current Limit Delay 150 ns
Enable
V
EN(RISING)
EN Pin Rising Threshold 1.2 1.25 1.3 V
V
EN(HYS)
EN Pin Hysteresis 50 mV
I
EN
EN Source Current VEN = 0V, V
VIN
= 12V 2 µA
Thermal Shutdown
T
SD
Thermal Shutdown 170 °C
T
SD(HYS)
Thermal Shutdown Hysteresis 20 °C
Thermal Resistance
θ
JC
Junction to Case 5.6 °C/W
θ
JA
Junction to Ambient 0 LFM airflow 30 °C/W
Note 1: Absolute Maximum Ratings indicate limits beyond witch damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor to each pin.
Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Typical Performance Characteristics Unless otherwise specified: T
J
= 25°C, V
VIN
= 12V
Efficiency vs. Load Current
fSW = 350 kHz
30031403
Efficiency vs. Load Current
fSW = 500 kHz
30031404
www.national.com 4
LM20242
Error Amplifier Gain
30031405
Error Amplifier Phase
30031406
Line Regulation
30031407
VCC vs. V
IN
30031408
Non-Switching IQ vs. V
IN
30031409
Shutdown IQ vs. V
IN
30031410
5 www.national.com
LM20242
PGOOD VOL vs. I
PGOOD
30031419
EN Threshold and Hysteresis vs. Temperature
30031421
EN Current vs. Temperature
30031422
Oscillator Frequency vs. R
RT
30031453
Oscillator Frequency vs. V
IN
30031454
High-Side FET Resistance vs. Temperature
30031455
www.national.com 6
LM20242
Loading...