NSC JM38510-33204BS, JM38510-33204BR Datasheet

TL/F/9553

54F/74F540

#

54F/74F541 Octal Buffer/Line Driver with TRI-STATE Outputs

May 1995

54F/74F540#54F/74F541
Octal Buffer/Line Driver with TRI-STATE

É

Outputs

General Description

The ’F540 and ’F541 are similar in function to the ’F240 and
’F244 respectively, except that the inputs and outputs are
on opposite sides of the package (see Connection Dia­grams). This pinout arrangement makes these devices es­pecially useful as output ports for microprocessors, allowing
ease of layout and greater PC board density.

Features

Y

TRI-STATE outputs drive bus lines

Y

Inputs and outputs opposite side of package, allowing
easier interface to microprocessors

Commercial Military

Package

Package Description

Number

74F540PC N20A 20-Lead (0.300×Wide) Molded Dual-In-Line

54F540DM (Note 2) J20A 20-Lead Ceramic Dual-In-Line

74F540SC (Note 1) M20B 20-Lead (0.300×Wide) Molded Small Outline, JEDEC

74F540SJ (Note 1) M20D 20-Lead (0.300×Wide) Molded Small Outline, EIAJ

54F540FM (Note 2) W20A 20-Lead Cerpack

54F540LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C

74F541PC N20A 20-Lead (0.300×Wide) Molded Dual-In-Line

54F541DM (Note 2) J20A 20-Lead Ceramic Dual-In-Line

74F541SC (Note 1) M20B 20-Lead (0.300×Wide) Molded Small Outline, JEDEC

74F541SJ (Note 1) M20D 20-Lead (0.300×Wide) Molded Small Outline, EIAJ

54F541FM (Note 2) W20A 20-Lead Cerpack

54F541LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C

Note 1: Devices also available in 13×reel. Use suffixeSCX and SJX.

Note 2: Military grade device with environmental and burn-in processing. Use suffix

e

DMQB, FMQB and LMQB.

Connection Diagrams

Pin Assignment for

DIP, SOIC and Flatpak

Pin Assignment

for LCC

’F540

TL/F/9553– 1

TL/F/9553– 2

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

C

1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Connection Diagrams (Continued)

’F541

TL/F/9553– 4

TL/F/9553– 5

Unit Loading/Fan Out

54F/74F

Pin Names Description

U.L. Input I

IH/IIL

HIGH/LOW Output IOH/I

OL

OE1,OE2TRI-STATE Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
I

n

Inputs 1.0/1.0 20 mA/b0.6 mA

O

n,On

Outputs 600/106.6 (80)b12 mA/64 mA (48 mA)

Truth Table

Inputs Outputs

OE

1

OE

2

I ’F540 ’F541

LLHL H
HXXZ Z
XHXZ Z
LLLH L

H

e

HIGH Voltage Level

L

e

LOW Voltage Level

X

e

Immaterial

Z

e

High Impedance

Logic Diagrams

IEEE/IEC

’F540

TL/F/9553– 3

IEEE/IEC

’F541

TL/F/9553– 6

2

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Storage Temperature

b

65§Ctoa150§C

Ambient Temperature under Bias

b

55§Ctoa125§C

Junction Temperature under Bias

b

55§Ctoa175§C

Plastic

b

55§Ctoa150§C

V

CC

Pin Potential to

Ground Pin

b

0.5V toa7.0V

Input Voltage (Note 2)

b

0.5V toa7.0V

Input Current (Note 2)

b

30 mA toa5.0 mA

Voltage Applied to Output

in HIGH State (with V

CC

e

0V)

Standard Output

b

0.5V to V

CC

TRI-STATE Output

b

0.5V toa5.5V

Current Applied to Output

in LOW State (Max) twice the rated I

OL

(mA)

Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.

Note 2: Either voltage limit or current limit is sufficient to protect inputs.

Recommended Operating
Conditions

Free Air Ambient Temperature

Military

b

55§Ctoa125§C

Commercial 0

§

Ctoa70§C

Supply Voltage

Military

a

4.5V toa5.5V

Commercial

a

4.5V toa5.5V

DC Electrical Characteristics

Symbol Parameter

54F/74F

Units V

CC

Conditions

Min Typ Max

V

IH

Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

V

IL

Input LOW Voltage 0.8 V Recognized as a LOW Signal

V

CD

Input Clamp Diode Voltage

b

1.2 V Min I

IN

eb

18 mA

V

OH

Output HIGH 54F 10% V

CC

2.4 I

OH

eb

3mA

Voltage 54F 10% V

CC

2.0 I

OH

eb

12 mA

74F 10% V

CC

2.4 V Min I

OH

eb

3mA

74F 10% V

CC

2.0 I

OH

eb

15 mA

74F 5% V

CC

2.7 I

OH

eb

3mA

V

OL

Output LOW 54F 10% V

CC

0.55
V Min

I

OL

e

48 mA

Voltage 74F 10% V

CC

0.55 I

OL

e

64 mA

I

IH

Input HIGH 54F 20.0

mA Max V

IN

e

2.7V

Current 74F 5.0

I

BVI

Input HIGH Current 54F 100

mA Max V

IN

e

7.0V

Breakdown Test 74F 7.0

I

CEX

Output HIGH 54F 250

mA Max V

OUT

e

V

CC

Leakage Current 74F 50

V

ID

Input Leakage

74F 4.75 V 0.0

I

ID

e

1.9 mA

Test All Other Pins Grounded

I

OD

Output Leakage

74F 3.75 mA 0.0

V

IOD

e

150 mV

Circuit Current All Other Pins Grounded

I

IL

Input LOW Current

b

0.6 mA Max V

IN

e

0.5V

I

OZH

Output Leakage Current 50 mA Max V

OUT

e

2.7V

I

OZL

Output Leakage Current

b

50 mA Max V

OUT

e

0.5V

I

OS

Output Short-Circuit Current

b

100

b

225 mA Max V

OUT

e

0V

I

ZZ

Bus Drainage Test 500 mA 0.0V V

OUT

e

5.25V

3