ADC10461/ADC10462/ADC10464
10-Bit 600 ns A/D Converter with Input Multiplexer and
Sample/Hold
ADC10461/ADC10462/ADC10464 10-Bit 600 ns A/D Converter with Input Multiplexer and
Sample/Hold
General Description
Using an innovative, patented multistep*conversion technique, the 10-bit ADC10461, ADC10462, and ADC10464
CMOS analog-to-digital converters offer sub-microsecond
conversion times yet dissipate a maximum of only 235 mW.
The ADC10461, ADC10462, and ADC10464 perform a
10-bit conversion in two lower-resolution “flashes”, thus
yielding a fast A/D without the cost, power dissipation, and
other problems associated with true flash approaches. Dynamic performance (THD, S/N) is guaranteed. The
ADC10461 is pin-compatible with the ADC1061 but much
faster, thus providing a convenient upgrade path for the
ADC1061.
The analog input voltageto the ADC10461, ADC10462, and
ADC10464 is sampled and held by an internal sampling circuit. Input signals at frequencies from dc to over 200 kHz
can therefore be digitized accurately without the need for an
external sample-and-hold circuit.
The ADC10462 and ADC10464 include a “speed-up” pin.
Connecting an external resistor between this pin and ground
reduces the typical conversion time to as little as 350 ns with
only a small increase in linearity error.
For ease of interface to microprocessors, the ADC10461,
ADC10462, and ADC10464 have been designed to appear
as a memory location or I/O port without the need for external interface logic.
Ordering Information
Industrial Temp Range
(−40˚C ≤ T
ADC20461CIWMM20B Small Outline
ADC20462CIWMM24B Small Outline
ADC20464CIWMM28B Small Outline
≤ +85˚C)
A
Features
n Built-in sample-and-hold
n Single +5V supply
n 1, 2, or 4-input multiplexer options
n No external clock required
n Speed adjust pin for faster conversions (ADC10462 and
ADC10464)
Key Specifications
n Conversion time to 10 bits600 ns typical
n Sampling Rate800 kHz
n Low power dissipation235 mW (max)
n Total harmonic distortion (50 kHz)−60 dB (max)
n No missing codes over temperature
Applications
n Digital signal processor front ends
n Instrumentation
n Disk drives
n Mobile telecommunications
Note:*U.S. Patent Number 4918449
Package
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
DVCC,AVCCThese are the digital and analog positive sup-
INT
S/HThis is the Sample/Hold control input. When
RD
CS
S0, S1On the multiple-input devices (ADC10462 and
V
REF−
V
REF+
ply voltage inputs. They should always be connected to the same voltage source, but are
brought out separately to allow for separate
bypass capacitors. Each supply pin should be
bypassed with a 0.1 µF ceramic capacitor in
parallel with a 10 µF tantalum capacitor to
ground.
This is the active low interrupt output. INT
goes low at the end of each conversion, and
returns to a high state following the rising edge
of RD .
this pin is forced low (and CS is low), it causes
the analog input signal to be sampled and initiates a new conversion.
This is the active low Read control input.
When this RD and CS are low, any data
present in the output registers will be placed
on the data bus.
This is the active low Chip Select control input.
When low, this pin enables the RD and S /H
pins.
ADC10464), these pins select the analog input
that will be connected to the A/D during the
conversion. The input is selected based on the
state of S0 and S1 when S /H makes its
High-to-Low transition (See the Timing Diagrams). The ADC10464 includes both S0 and
S1. The ADC10462 includes just S0, and the
ADC10461 includes neither.
,
These are the reference voltage inputs. They
may be placed at any voltage between GND
and V
, but V
CC
V
. An input voltage equal to V
REF−
duces an output code of 0, and an input voltage equal to (V
put code of 1023.
must be greater than
REF+
− 1 LSB) produces an out-
REF+
REF−
pro-
DS011108-11
Top View
Top View
V
,
IN,VIN0
V
IN1,VIN2
V
IN3
These are the analog input pins. The
ADC10461 has one input (V
,
has two inputs (V
ADC10464 has four inputs (V
and V
). The impedance of the source
IN3
should be less than 500Ω for best accuracy
and V
IN0
and conversion speed. For accurate conversions, no input pin (even one that is not selected) should be driven more than 50 mV
GND, AGND,
DGND
above V
These are the power supply ground pins. The
ADC10461 has a single ground pin (GND),
or 50 mV below ground.
CC
and the ADC10462 and ADC10464 have
separate analog and digital ground pins
(AGND and DGND) for separate bypassing of
the analog and digital supplies. The ground
pins should be connected to a stable,
noise-free system ground. For the devices
with two ground pins, both pins should be re-
turned to the same potential.
DB0–DB9These are the TRI-STATE output pins.
SPEED ADJ (ADC10462 and ADC10464 only). This pin is
normally left unconnected, but by connecting a
resistor between this pin and ground, the con-
version time can be reduced. See the Typical
Performance Curves and the table of Electri-
cal Characteristics.
DS011108-12
), the ADC10462
IN
), and the
IN1
IN0,VIN1,VIN2
www.national.com2
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
+
=
Supply Voltage (V
Voltage at Any Input or Output−0.3V to V
Input Current at Any Pin (Note 3)5 mA
Package Input Current (Note 3)20 mA
Power Dissipation (Note 4)875 mW
ESD Susceptability (Note 5)2000V
Soldering Information (Note 6)
N Package (10 Sec)260˚C
SO Package:
AV
=
)−0.3V to +6V
DV
CC
CC
+
+ 0.3V
Vapor Phase (60 Sec)215˚C
Infrared (15 Sec)220˚C
Storage Temperature Range−65˚C to +150˚C
Junction Temperature150˚C
Operating Ratings (Notes 1, 2)
Temperature RangeT
ADC10461CIWM,
ADC10462CIWM,
ADC10464CIWM−40˚C ≤ T
Supply Voltage Range4.5V to 5.5V
MIN
≤ TA≤ T
≤ +85˚C
A
MAX
Converter Characteristics
The following specifications apply for V
otherwise specified. Boldface limits apply for T
+
=
+5V, V
A
REF(+)
=
=
+5V, V
=
T
T
J
Min
to T
REF(−)
Max
=
GND, and Speed Adjust pin unconnected unless
; all other limits T
=
=
T
+25˚C.
A
J
SymbolParameterConditionsTypicalLimitUnits
(Note 7)(Note 8)(Limit)
Resolution10Bits
Integral Linearity ErrorR
Offset Error
Full-Scale Error
Total Unadjusted ErrorR
SA
SA
≥ 18 kΩ
≥ 18 kΩ
±
0.5LSB
±
1LSB (max)
±
1LSB (max)
±
0.5LSB
Missing Codes0(max)
+
Power Supply SensitivityV
THDTotal Harmonic Distortionf
SNRSignal-to-Noise Ratiof
ENOBEffective Number of Bitsf
R
R
V
V
V
V
V
V
REF
REF
REF(+)
REF(−)
REF(+)
REF(−)
IN
IN
Reference Resistance650400Ω (min)
Reference Resistance650900Ω (max)
V
Input VoltageV++ 0.05V (max)
REF(+)
V
Input VoltageGND − 0.05V (min)
REF(−)
V
Input VoltageV
REF(+)
V
Input VoltageV
REF(−)
Input VoltageV++ 0.05V (max)
Input VoltageGND − 0.05V (min)
OFF Channel Input Leakage CurrentCS=V
ON Channel Input Leakage CurrentCS=V
=
5V
+
=
V
5V
=
1 kHz, 4.85 V
IN
=
f
50 kHz, 4.85 V
IN
=
f
100 kHz, 4.85 V
IN
=
f
240 kHz, 4.85 V
IN
=
1 kHz, 4.85 V
IN
=
f
50 kHz, 4.85 V
IN
=
f
100 kHz, 4.85 V
IN
=
1 kHz, 4.85 V
IN
=
f
50 kHz, 4.85 V
IN
+
+
±
5%,V
±
10%,V
,V
,V
=
4.5V
REF
=
4.5V
REF
P-P
P-P
P-P
P-P
P-P
P-P
P-P
P-P
P-P
+
=
V
IN
+
=
V
IN
±
1/16LSB
1
±
⁄
8
LSB
−68dB
−66−60dB (max)
−62dB
−58dB
61dB
6058dB (min)
60dB
9.6Bits
9.59Bits (min)
REF(−)
REF(+)
V (min)
V (max)
0.013µA (max)
±
1−3µA (max)
DC Electrical Characteristics
The following specifications apply for V
erwise specified. Boldface limits apply for T
+
=
+5V, V
=
5V V
REF(+)
=
=
T
A
to T
T
J
MIN
=
GND, and Speed Adjust pin unconnected unless oth-
REF(−)
; all other limits T
MAX
=
=
T
A
+25˚C.
J
SymbolParameterConditionsTypicalLimitUnits
(Note 7)(Note 8)(Limits)
+
V
IN(1)
Logical “1” Input VoltageV
=
5.5V2.0V (min)
www.national.com3
DC Electrical Characteristics (Continued)
+
The following specifications apply for V
erwise specified. Boldface limits apply for T
The following specifications apply for V
nected unless otherwise specified. Boldface limits apply for T
+
=
+5V, t
=
=
t
20 ns, V
r
f
A
REF(+)
=
=
5V, V
=
T
T
J
MIN
REF(−)
to T
MAX
=
GND, and Speed Adjust pin uncon-
; all other limits T
=
=
T
+25˚C.
A
J
SymbolParameterConditionsTypicalLimitUnits
(Note 7)(Note 8)(Limits)
t
CONV
t
CRD
Mode 1 Conversion TimeCIN,
from Rising Edge of S /H
to Falling Edge of INT
CIWM Suffixes600750/900ns (max)
R
SA
Mode 2 Conversion TimeCIN,
=
18k375ns
CIWM Suffixes8501400ns (max)
=
18k530ns
SA
=
100 pF3060ns (max)
L
t
ACC1
Mode 2, R
Access Time (Delay from FallingMode 1; C
Edge of RD to Output Valid)
t
ACC2
Access Time (Delay from FallingMode 2; C
=
100 pF900t
L
+50ns (max)
CRD
Edge of RD to Output Valid)
t
SH
t
1H,t0H
Minimum Sample Time(
TRI-STATE Control (DelayR
from Rising Edge of RD
Figure 1
) ; (Note 9)250ns (max)
=
L
1k, C
=
10 pF
L
3060ns (max)
to High-Z State)
t
t
INTH
P
Delay from Rising Edge of RDC
to Rising Edge of INT
Delay from End of Conversion50ns (max)
L
=
100 pF
2550ns (max)
to Next Conversion
t
MS
t
MH
C
VIN
C
OUT
C
IN
Note 1: Absolute Maximum Ratingsindicatelimitsbeyondwhich damage to the device may occur.Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits, however. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditons.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (V
to 5 mA or less. The 20 mA package input current limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four.
Multiplexer Control Setup Time1075ns (max)
Multiplexer Hold Time1040ns (max)
Analog Input Capacitance35pF (max)
Logic Output Capacitance5pF (max)
Logic Input Capacitance5pF (max)
) at any pin exceeds the power supply rails (V
IN
IN
<
GND or V
>
V+) the absolute value of current at that pin should be limited
IN
www.national.com4
AC Electrical Characteristics (Continued)
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
the maximum derated power dissipation will be reached only during fault conditions. For these devices, T
tables below:
D
=
(T
)/θJAor the number given in the Absolute Maximum Ratings, whichever is lower. In most cases,
JMAX−TA
DeviceθJA(˚C/W)
ADC20461CIWM85
ADC20462CIWM82
ADC20464CIWM78
Note 5: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 6: See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in a current National Semicon-
ductor Linear Data Book for other methods of soldering surface mount devices.
Note 7: Typicals represent most likely parametric norm.
Note 8: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 9: Accuracy may degrade if t
is shorter than the value specified. See curves of Accuracy vs tSH.
SH
, θJAand the ambient temperature, TA. The maximum
JMAX
for a board-mounted device can be found from the
JMAX
www.national.com5
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