NSC 5962R8752501SCA, 5962R8752501S2A, 5962R8752501BDA, 5962R8752501SDA, 5962-8752501SDA Datasheet

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54AC74•54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop
General Description
The ’AC/’ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. In­formation at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition timeofthe positive-going pulse. After the Clock Pulse input threshold voltage has been passed, the Data in­put is locked out and information present will not be trans­ferred to the outputs until the next rising edge of the Clock Pulse input.
Asynchronous Inputs:
LOW input to S
D
(Set) sets Q to HIGH level LOW input to CD(Clear) sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on C
D
and SDmakes both Q and Q
HIGH
Features
n ICCreduced by 50
%
n Output source/sink 24 mA n ’ACT74 has TTL-compatible inputs n Standard Microcircuit Drawing (SMD)
— ’AC74: 5962-88520 — ’ACT74: 5962-87525
Logic Symbols
Pin Names Description
D
1,D2
Data Inputs
CP
1
,CP
2
Clock Pulse Inputs
C
D1,CD2
Direct Clear Inputs
S
D1,SD2
Direct Set Inputs
Q
1,Q1,Q2,Q2
Outputs
FACT®is a registered trademark of Fairchild Semiconductor Corporation.
DS100266-1
IEEE/IEC
DS100266-3
DS100266-2
August 1998
54AC74
54ACT74 Dual D-Type Positive Edge-Triggered Flip-Flop
© 1998 National Semiconductor Corporation DS100266 www.national.com
Connection Diagrams
Truth Table
(Each Half)
Inputs Outputs
S
D
CDCP D Q Q
LHXXHL
HLXXLH
LLXXHH
HH
N
HH L
HH
N
LLH
HHLXQ
0
Q
0
H=HIGH Voltage Level L=LOW Voltage Level X=Immaterial
N
=
LOW-to-HIGH Clock Transition
Q
0(Q0
)=Previous Q(Q) before LOW-to-HIGH Transition of Clock
Logic Diagram
Pin Assignment for DIP
and Flatpak
DS100266-4
Pin Assignment for LCC
DS100266-5
DS100266-6
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=
−0.5V −20 mA
V
I
=
V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to VCC+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=
−0.5V −20 mA
V
O
=
V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to VCC+ 0.5V
DC Output Source
or Sink Current (I
O
)
±
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
±
50 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
Junction Temperature (T
J
)
CDIP 175˚C
Recommended Operating Conditions
Supply Voltage (VCC)
’AC 2.0V to 6.0V ’ACT 4.5V to 5.5V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (VO) 0VtoV
CC
Operating Temperature (TA)
54AC/ACT −55˚C to +125˚C
Minimum Input Edge Rate (V/t)
’AC Devices V
IN
from 30%to 70%of V
CC
V
CC
@
3.3V, 4.5V, 5.5V 125 mV/ns
Minimum Input Edge Rate (V/t)
’ACT Devices V
IN
from 0.8V to 2.0V
V
CC
@
4.5V, 5.5V 125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recom­mend operation of FACT
®
circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
54AC
Symbol Parameter V
CC
T
A
=
Units Conditions
(V) −55˚C to +125˚C
Guaranteed
Limits
V
IH
Minimum High 3.0 2.1 V
OUT
=
0.1V
Level Input 4.5 3.15 V or V
CC
− 0.1V
Voltage 5.5 3.85
V
IL
Maximum Low 3.0 0.9 V
OUT
=
0.1V
Level Input 4.5 1.35 V or V
CC
− 0.1V
Voltage 5.5 1.65
V
OH
Minimum High 3.0 2.9 I
OUT
=
−50 µA Level Output 4.5 4.4 V Voltage 5.5 5.4
(Note 2) V
IN
=
V
IL
or V
IH
3.0 2.4 −12 mA
4.5 3.7 V I
OH
−24 mA
5.5 4.7 −24 mA
V
OL
Maximum Low 3.0 0.1 I
OUT
=
50 µA Level Output 4.5 0.1 V Voltage 5.5 0.1
(Note 2) V
IN
=
V
IL
or V
IH
3.0 0.5 12 mA
4.5 0.5 V I
OL
24 mA
5.5 0.5 24 mA
I
IN
Maximum Input 5.5
±
1.0 µA V
I
=
V
CC
, GND
Leakage Current
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