NSC 5962-7802302MFA, 5962-7802302MEA, 5962-7802302M2A Datasheet
DS26F31M
Quad High Speed Differential Line Drivers
General Description
The DS26F31 is a quad differential line driver designed for
digital data transmission over balanced lines. The DS26F31
meets all the requirements of EIA Standard RS-422 and
Federal Standard 1020. It is designed to provide unipolar differential drive to twisted-pair or parallel-wire transmission
lines.
The DS26F31 offers improved performance due to the use
of state-of-the-art L-FAST bipolar technology. The L-FAST
technology allows for higher speeds and lower currents by
utilizing extremely short gate delay times. Thus, the
DS26F31 features lower power, extended temperature
range, and improved specifications.
The circuit provides an enable and disable function common
to all four drivers. The DS26F31M features TRI-STATE
puts and logical OR-ed complementary enable inputs. The
inputs are all LS compatible and are all one unit load.
Connection and Logic Diagrams
16-Lead Dual-In-Line Package
The DS26F31M offers optimum performance when used
with the DS26F32 Quad Differential Line Receiver.
Features
n Military temperature range
n Output skew—2.0 ns typical
n Input to output delay —10 ns
n Operation from single +5.0V supply
n 16-lead ceramic DIP Package
n Outputs won’t load line when V
n Output short circuit protection
n Meets the requirements of EIA standard RS-422
n High output drive capability for 100Ω terminated
®
out-
transmission lines
DS26F31MQuad High Speed Differential Line Drivers
May 1999
=
0V
CC
DS009614-2
FIGURE 1. Logic Symbol
20-Lead Ceramic Leadless Chip Carrier (E)
DS009614-1
For Complete Military Product Specifications,
refer to the appropriate SMD or MDS.
Order Number DS26F31ME/883, DS26F31MJ/883, or
See NS Package Numbers E20A, J16A, or W16A
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS009614 www.national.com
Top View
DS26F31MW/883
DS009614-7
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Supply Voltage 7.0V
Input Voltage 7.0V
Output Voltage 5.5V
Distributors for availability and specifications.
Storage Temperature Range
Ceramic DIP −65˚C to +175˚C
Lead Temperature
Ceramic DIP (Soldering, 60 sec.) 300˚C
Maximum Power (Note 1) Dissipation at 25˚C
Operating Range
DS26F31M
Temperature −55˚C to +125˚C
Supply Voltage 4.5V to 5.5V
Note 1: Derate cavity package 10 mW/˚C above 25˚C.
Cavity Package 1500 mW
Electrical Characteristics (Notes 3, 4)
over operating range, unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
V
OH
V
OL
V
IH
V
IL
I
IL
I
IH
I
IR
I
OZ
Output Voltage HIGH V
Output Voltage LOW V
Input Voltage HIGH V
Input Voltage LOW V
Input Current LOW V
Input Current HIGH V
Input Reverse Current V
Off State (High Impedance) V
=
CC
=
CC
=
CC
=
CC
=
CC
=
CC
=
CC
=
Max V
CC
Output Current V
V
IC
I
OS
I
CCX
I
CC
t
PLH
Input Clamp Voltage V
Output Short Circuit V
Supply Current V
Input to Output V
=
CC
=
CC
=
CC
=
V
CC
=
CC
Load=(Notes 6, 7)
t
PHL
Input to Output V
=
CC
Load=(Note 6)
SKEW Output to Output V
=
CC
Load=(Notes 6, 7)
t
LZ
t
HZ
t
ZL
Enable to Output V
Enable to Output V
Enable to Output V
=
CC
=
C
10 pF
L
=
CC
=
C
10 pF
L
=
CC
Load=(Note 6)
t
ZH
Enable to Output V
=
CC
Load=(Note 6)
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation.
Note 3: Unless otherwise specified min/max limits apply across the −55˚C to +125˚C temperature range for the DS26F31M and across the O˚C to +70˚C range for
the DS26F31C. All typicals are given for V
Note 4: All currents into the device pins are positive; all currents outof the device pins are negative.All voltagesare referenced to ground unless otherwise specified.
Note 5: Only one output at a time should be shorted.
Note 6: C
Note 7: Skew is defined as the difference in propagation delays between complementary outputs at the 50%point.
L
=
30 pF, V
=
I
1.3V to V
=
CC
=
1.3V, V
O
=
5V and T
PULSE
25˚C.
A
=
0V to +3V (See AC Load Test Circuit for TRI-STATE Outputs).
=
Min, I
Min, I
−20 mA 2.5 3.2 V
OH
=
20 mA 0.32 0.5 V
OL
Min 2.0 V
Max 0.8 V
=
Max, V
Max, V
Max, V
Min, I
0.4V −0.10 −0.20 mA
I
=
2.7V 0.5 20 µA
I
=
7.0V 0.001 0.1 mA
I
=
I
=
2.5V 0.5 20 µA
O
=
0.5V 0.5 −20
O
−18 mA −0.8 −1.5 V
Max (Note 5) −30 −60 −150 mA
Max, All Outputs Disabled 50 mA
Max, All Outputs Enabled 40 mA
=
5.0V, T
5.0V, T
5.0V, T
5.0V, T
5.0V, T
5.0V, T
5.0V, T
25˚C, 10 15 ns
A
=
25˚C, 10 15 ns
A
=
25˚C, 2.0 4.5 ns
A
=
25˚C, 23 32 ns
A
=
25˚C, 15 25 ns
A
=
25˚C, 20 30 ns
A
=
25˚C, 23 32 ns
A
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