NSC 54F253LMQB, 54F253DMQB, 54F253DC Datasheet

TL/F/9505
54F/74F253 Dual 4-Input Multiplexer with TRI-STATE Outputs
November 1994
54F/74F253 Dual 4-Input Multiplexer with TRI-STATE
É
Outputs
General Description
É
outputs. It can select two bits of data from four sources using common select inputs. The output may be individually switched to a high impedance state with a HIGH on the respective Output Enable (OE
) inputs, allowing the outputs
to interface directly with bus oriented systems.
Features
Y
Multifunction capability
Y
Non-inverting TRI-STATE outputs
Y
Guaranteed 4000V minimum ESD protection
Commercial Military
Package
Package Description
Number
74F253PC N16E 16-Lead (0.300×Wide) Molded Dual-In-Line
54F253DM (Note 2) J16A 16-Lead Ceramic Dual-In-Line
74F253SC (Note 1) M16A 16-Lead (0.150×Wide) Molded Small Outline, JEDEC
74F253SJ (Note 1) M16D 16-Lead (0.300×Wide) Molded Small Outline, EIAJ
54F253FM (Note 2) W16A 16-Lead Cerpack
54F253LL (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13×reel. Use suffixeSCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix
e
DMQB, FMQB and LMQB.
Logic Symbols
TL/F/9505– 3
IEEE/IEC
TL/F/9505– 5
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
TL/F/9505– 1
Pin Assignment
for LCC
TL/F/9505– 2
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Unit Loading/Fan Out
54F/74F
Pin Names Description
U.L. Input I
IH/IIL
HIGH/LOW Output IOH/I
OL
I0a–I
3a
Side A Data Inputs 1.0/1.0 20 mA/b0.6 mA
I
0b–I3b
Side B Data Inputs 1.0/1.0 20 mA/b0.6 mA
S
0–S1
Common Select Inputs 1.0/1.0 20 mA/b0.6 mA
OE
a
Side A Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
OE
b
Side B Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
Za,Z
b
TRI-STATE Outputs 150/40(33.3)b3 mA/24 mA (20 mA)
Functional Description
This device contains two identical 4-input multiplexers with TRI-STATE outputs. They select two bits from four sources selected by common Select inputs (S
0,S1
). The 4-input mul-
tiplexers have individual Output Enable (OE
a
,OEb) inputs which, when HIGH, force the outputs to a high impedance (High Z) state. This device is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two select inputs. The logic equations for the outputs are shown below:
Z
a
e
OE
a
#
(I
0a
#
S
1
#
S
0
a
I
1a
#
S
1
#
S
0
a
I
2a
#
S
1
#
S
0
a
I
3a
#
S
1
#
S0)
Z
b
e
OE
b
#
(I
0b
#
S
1
#
S
0
a
I
1b
#
S
1
#
S
0
a
I
2b
#
S
1
#
S
0
a
I
3b
#
S
1
#
S0)
If the outputs of TRI-STATE devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. De­signers should ensure that Output Enable signals to TRI­STATE devices whose outputs are tied together are de­signed so that there is no overlap.
Truth Table
Select
Data Inputs
Output
Output
Inputs Enable
S0S1I0I1I2I
3
OE Z
X X XXXX H Z L L LXXX L L L L HXXX L H H L XLXX L L
H L XHXX L H L H XXLX L L L H XXHX L H H H XXXL L L H H XXXH L H
Address inputs S0and S1are common to both sections. H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Z
e
High Impedance
Logic Diagram
TL/F/9505– 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Storage Temperature
b
65§Ctoa150§C
Ambient Temperature under Bias
b
55§Ctoa125§C
Junction Temperature under Bias
b
55§Ctoa175§C
Plastic
b
55§Ctoa150§C
VCCPin Potential to
Ground Pin
b
0.5V toa7.0V
Input Voltage (Note 2)
b
0.5V toa7.0V
Input Current (Note 2)
b
30 mA toa5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
e
0V)
Standard Output
b
0.5V to V
CC
TRI-STATE Output
b
0.5V toa5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
ESD Last Passing Voltage (Min) 4000V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating Conditions
Free Air Ambient Temperature
Military
b
55§Ctoa125§C
Commercial 0
§
Ctoa70§C
Supply Voltage
Military
a
4.5V toa5.5V
Commercial
a
4.5V toa5.5V
DC Electrical Characteristics
Symbol Parameter
54F/74F
Units V
CC
Conditions
Min Typ Max
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
b
1.2 V Min I
IN
eb
18 mA
V
OH
Output HIGH 54F 10% V
CC
2.5 I
OH
eb
1mA
Voltage 54F 10% V
CC
2.4 I
OH
eb
3mA
74F 10% V
CC
2.5 V Min
I
OH
eb
1mA
74F 10% V
CC
2.4 I
OH
eb
3mA
74F 5% V
CC
2.7 I
OH
eb
1mA
74F 5% V
CC
2.7 I
OH
eb
3mA
V
OL
Output LOW 54F 10% V
CC
0.5 V Min
I
OL
e
20 mA
Voltage 74F 10% V
CC
0.5 I
OL
e
24 mA
I
IH
Input HIGH 54F 20.0
mA Max V
IN
e
2.7V
Current 74F 5.0
I
BVI
Input HIGH Current 54F 100
mA Max
V
IN
e
7.0V
Breakdown Test 74F 7.0
I
CEX
Output HIGH 54F 250
mA Max V
OUT
e
V
CC
Leakage Current 74F 50
V
ID
Input Leakage
74F 4.75 V 0.0
I
ID
e
1.9 mA
Test All Other Pins Grounded
I
OD
Output Leakage
74F 3.75 mA 0.0
V
IOD
e
150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current
b
0.6 mA Max V
IN
e
0.5V
I
OZH
Output Leakage Current 50 mA Max V
OUT
e
2.7V
I
OZL
Output Leakage Current
b
50 mA Max V
OUT
e
0.5V
I
OS
Output Short-Circuit Current
b
60
b
150
mA Max
V
OUT
e
0V
b
100
b
225 V
OUT
e
0V
I
ZZ
Bus Drainage Test 500 mA 0.0V V
OUT
e
V
CC
I
CCH
Power Supply Current 11.5 16 mA Max V
O
e
HIGH
I
CCL
Power Supply Current 16 23 mA Max V
O
e
LOW
I
CCZ
Power Supply Current 16 23 mA Max V
O
e
HIGH Z
3
Loading...
+ 5 hidden pages