NSC 54F251ALMQB, 54F251AFMQB, 54F251ADMQB, 54F251ADC Datasheet
TL/F/9504
54F/74F251A 8-Input Multiplexer with TRI-STATE Outputs
November 1994
54F/74F251A
8-Input Multiplexer with TRI-STATE
É
Outputs
General Description
The ’F251A is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one bit of data
from up to eight sources. It can be used as a universal function generator to generate any logic function of four variables. Both assertion and negation outputs are provided.
Features
Y
Multifunctional capability
Y
On-chip select logic decoding
Y
Inverting and non-inverting TRI-STATE outputs
Commercial Military
Package
Package Description
Number
74F251APC N16E 16-Lead (0.300×Wide) Molded Dual-In-Line
54F251ADM (Note 2) J16A 16-Lead Ceramic Dual-In-Line
74F251ASC (Note 1) M16A 16-Lead (0.150×Wide) Molded Small Outline, JEDEC
74F251ASJ (Note 1) M16D 16-Lead (0.300×Wide) Molded Small Outline, EIAJ
54F251AFM (Note 2) W16A 16-Lead Cerpack
54F251ALL (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Note 1: Devices also available in 13×reel. Use suffixeSCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix
e
DMQB, FMQB and LMQB.
Logic Symbols Connection Diagrams
TL/F/9504– 3
IEEE/IEC
TL/F/9504– 5
Pin Assignment for
DIP, SOIC and Flatpak
TL/F/9504– 1
Pin Assignment
for LCC
TL/F/9504– 2
TRI-STATEÉis a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Unit Loading/Fan Out
54F/74F
Pin Names Description
U.L. Input I
IH/IIL
HIGH/LOW Output IOH/I
OL
S0–S
2
Select Inputs 1.0/1.0 20 mA/b0.6 mA
OE
TRI-STATE Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA
I
0–I7
Multiplexer Inputs 1.0/1.0 20 mA/b0.6 mA
Z TRI-STATE Multiplexer Output 150/40 (33.3)b3 mA/24 mA (20 mA)
Z
Complementary TRI-STATE Multiplexer Output 150/40 (33.3)b3 mA/24 mA (20 mA)
Functional Description
This device is a logical implementation of a single-pole, 8position switch with the switch position controlled by the
state of three Select inputs, S
0,S1,S2
. Both assertion and
negation outputs are provided. The Output Enable input
(OE
) is active LOW. When it is activated, the logic function
provided at the output is:
Z
e
OE#(I
0
#
S
0
#
S
1
#
S
2
a
I
1
#
S
0
#
S
1
#
S
2
a
I
2
#
S
0
#
S
1
#
S
2
a
I
3
#
S
0
#
S
1
#
S
2
a
I
4
#
S
0
#
S
1
#
S
2
a
I
5
#
S
0
#
S
1
#
S
2
a
I
6
#
S
0
#
S
1
#
S
2
a
I
7
#
S
0
#
S
1
#
S2)
When the Output Enable is HIGH, both outputs are in the
high impedance (High Z) state. This feature allows multiplexer expansion by tying the outputs of up to 128 devices
together. When the outputs of the TRI-STATE devices are
tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the
maximum ratings. The Output Enable signals should be designed to ensure there is no overlap in the active LOW portion of the enable voltages.
Truth Table
Inputs Outputs
OE S
2
S
1
S
0
Z Z
HXXXZZ
L LLLI
0
I
0
LLLHI
1
I
1
L LHLI
2
I
2
LLHHI
3
I
3
LHLLI
4
I
4
L HLHI
5
I
5
LHHLI
6
I
6
L HHHI
7
I
7
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Z
e
High Impedance
Logic Diagram
TL/F/9504– 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b
65§Ctoa150§C
Ambient Temperature under Bias
b
55§Ctoa125§C
Junction Temperature under Bias
b
55§Ctoa175§C
Plastic
b
55§Ctoa150§C
V
CC
Pin Potential to
Ground Pin
b
0.5V toa7.0V
Input Voltage (Note 2)
b
0.5V toa7.0V
Input Current (Note 2)
b
30 mA toa5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
e
0V)
Standard Output
b
0.5V to V
CC
TRI-STATE Output
b
0.5V toa5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
b
55§Ctoa125§C
Commercial 0
§
Ctoa70§C
Supply Voltage
Military
a
4.5V toa5.5V
Commercial
a
4.5V toa5.5V
DC Electrical Characteristics
Symbol Parameter
54F/74F
Units V
CC
Conditions
Min Typ Max
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
b
1.2 V Min I
IN
eb
18 mA
V
OH
Output HIGH 54F 10% V
CC
2.5 I
OH
eb
1mA
Voltage 54F 10% V
CC
2.4 I
OH
eb
3mA
74F 10% V
CC
2.5
V Min
I
OH
eb
1mA
74F 10% V
CC
2.4 I
OH
eb
3mA
74F 5% V
CC
2.7 I
OH
eb
1mA
74F 5% V
CC
2.7 I
OH
eb
3mA
V
OL
Output LOW 54F 10% V
CC
0.5
V Min
I
OL
e
20 mA
Voltage 74F 10% V
CC
0.5 I
OL
e
24 mA
I
IH
Input HIGH 54F 20.0
mA Max
V
IN
e
2.7V
Current 74F 5.0
I
BVI
Input HIGH Current 54F 100
mA Max
V
IN
e
7.0V
Breakdown Test 74F 7.0
I
CEX
Output HIGH 54F 250
mA Max
V
OUT
e
V
CC
Leakage Current 74F 50
V
ID
Input Leakage
74F 4.75 V 0.0
I
ID
e
1.9 mA
Test All Other Pins Grounded
I
OD
Output Leakage
74F 3.75 mA 0.0
V
IOD
e
150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current
b
0.6 mA Max V
IN
e
0.5V
I
OZH
Output Leakage Current 50 mA Max V
OUT
e
2.7V
I
OZL
Output Leakage Current
b
50 mA Max V
OUT
e
0.5V
I
OS
Output Short-Circuit Current
b
60
b
150 mA Max V
OUT
e
0V
I
ZZ
Bus Drainage Test 500 mA 0.0V V
OUT
e
5.25V
I
CCL
Power Supply Current 15 22 mA Max V
O
e
LOW
I
CCZ
Power Supply Current 16 24 mA Max V
O
e
HIGH Z
3
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