Nokia 8270 Service Manual 12 nsd5schem
BB-RF Interface
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5
BB RF_DCT3
VR1VR1
VR1
VR2
VR3
VR4
VR5
VR7 VR7
VR7
5V
BVOLT BVOLT
BVOLT
VR1
VR2VR2
VR2
VR3VR3
VR3
VR4VR4
VR4
VR5VR5
VR5
VR7
5V5V
5V
BVOLT
RXIQ(3:0)
TXIQ(3:0)
TIF_EN
RIF_EN
CAFE_TX_GATE
TX_LIM_ADJ
TX_IF_AGC
TX_RF_AGC
TX_LIM
RF_TX_GATE_P
RX_IF_AGC
RX_GS
FILT_SEL_P
FILT_SEL_N
AFC
SYN_CLK
SYN_LE1
SYN_DAT
CLK19M2RF
PA_TEMP
RXIQ(3:0)RXIQ(3:0)
TXIQ(3:0)TXIQ(3:0)
TIF_ENTIF_EN
RIF_ENRIF_EN
CAFE_TX_GATECAFE_TX_GATE
TX_LIM_ADJTX_LIM_ADJ
TX_IF_AGCTX_IF_AGC
TX_RF_AGCTX_RF_AGC
TX_LIMTX_LIM
RF_TX_GATE_PRF_TX_GATE_P
RX_GS RX_GS
FILT_SEL_P FILT_SEL_P
FILT_SEL_N FILT_SEL_N
RX_IF_AGCRX_IF_AGC
AFCAFC
SYN_CLKSYN_CLK
SYN_LE1SYN_LE1
SYN_DATSYN_DAT
CLK19M2RFCLK19M2RF
PA_TEMPPA_TEMP
RXIQ(3:0)
TXIQ(3:0)
TIF_EN
RIF_EN
CAFE_TX_GATE
TX_LIM_ADJ
TX_IF_AGC
TX_RF_AGC
TX_LIM
RF_TX_GATE_P
RX_IF_AGC
RX_GS
FILT_SEL_P
FILT_SEL_N
AFC
SYN_CLK
SYN_LE1
SYN_DAT
CLK19M2RF
PA_TEMP
Issue 1 05/02 Nokia Corporation Page A-1
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5
Circuit Diagram of Baseband
SYN_CLK
SYN_DAT
SYN_LE1
TX_RF_AGC
TX_IF_AGC
TX_LIM
TX_LIM_ADJ
RX_GS
RX_IF_AGC
FILT_SEL_P
FILT_SEL_N
RF_TX_GATE_P
AFC
TIF_EN
RIF_EN
TXIQ(3:0)
RXIQ(3:0)
CLK19M2RF
CAFE_TX_GATE
SYN_CLK
SYN_DAT
SYN_LE1
TX_RF_AGC
TX_IF_AGC
TX_LIM
TX_LIM_ADJ
RX_GS
RX_IF_AGC
FILT_SEL_P
FILT_SEL_N
RF_TX_GATE_P
TIF_EN
RIF_EN
AFC
SYN_CLK
SYN_DAT
SYN_LE1
TX_RF_AGC
TX_IF_AGC
TX_LIM
TX_LIM_ADJ
RX_GS
RX_IF_AGC
FILT_SEL_P
FILT_SEL_N
RF_TX_GATE_P
AFC
TIF_EN
RIF_EN
MAD4
HF_MUTE
RESETX
CLK_EN
EAD_HEADINT
HOOKINT
CAFE_TX_GATE
CAFESIO(2:0)
TXD(7:0)
RXD(11:0)
IQSEL
CLK19M2O
CLK9M83
FBUS_TX
FBUS_RX
MBUS
STOP_CH
SLEEPCLK
VLIM
PURX
CCONT_INT
CCONTCSX
UIF_CCONT_SCLK
UIF_CCONT_SDIO
LCD_CD
LCD_RESETX
LCD_CS
BACKLIGHT
BUZZER
VIBRA
COL(4:0)
ROW(5:0)
CLK_EN
EAD_HEADINT
FBUS_TX
FBUS_RX
MBUS
BUZZER
CAFE_TX_GATECAFE_TX_GATE
CAFESIO(2:0)CAFESIO(2:0)
CLK19M2RF
LCD_RESETXLCD_RESETX
HF_MUTEHF_MUTE
RESETXRESETX
CLK_EN
HOOKINTHOOKINT
TXD(7:0)TXD(7:0)
RXD(11:0)RXD(11:0)
TXIQ(3:0)
RXIQ(3:0)
CLK19M2OCLK19M2O
CLK9M83CLK9M83
LCD_CDLCD_CD
LCD_CSLCD_CS
BACKLIGHTBACKLIGHT
BUZZER
COL(4:0)COL(4:0)
ROW(5:0)ROW(5:0)
IQSELIQSEL
VIBRAVIBRA
CAFE
HF_MUTE
RESETX
CLK_EN
HOOKINT
CAFE_TX_GATE
CAFESIO(2:0)
TXD(7:0)
RXD(11:0)
IQSEL
TXIQ(3:0)
RXIQ(3:0)
CLK19M2O
CLK9M83
CLK19M2RF
LCD_CD
LCDRSTX
LCD_CS
BACKLIGHT
BUZZER
VIBRA
COL(4:0)
UI
VPP_FLASH
VPP_CCONT
UIF_CCONT_SDIO
UIF_CCONT_SCLK
PWRONXROW(5:0)
FBUS / MBUS CONNECTOR
MBUS
J55
FBUS_RX
J56
J57
FBUS_TX
J58
E061
E062
E060
XEAR
XEAR
SGND
SGND
XMICP
XMICP
XMICN
XMICN
EAD
EAD
VREF VREF
VREF
VR6 VR6
VR6
VR1_SW
VPP_FLASH
VPP_CCONT
UIF_CCONT_SDIO
UIF_CCONT_SCLK
X050
SGND
6
XMICP
PWRONX
7
EAD_HEADINT
9
XEAR
8
XMICN
5
L_GND
4
V_IN
2
VPP_FLASH
BVOLT
L050
33R/100MHz
SYSTEM CONNECTOR
V050
RSA6.1EN
V051
RSA6.1EN
WDDIS
WD_DIS
EAD
EAD
VREF
VR6
VR1_SWVR1_SW
CLK_EN
STOP_CHSTOP_CH
SLEEPCLKSLEEPCLK
PWRONX
BTEMP
V_IN
VLIMVLIM
PURXPURX
BVOLT
BSI
BVOLT
BTEMP
VR1_SW
VPP_CCONT
V_IN
CAFE_TX_GATE
CLK_EN
STOP_CH
SLEEPCLK
VLIM
PURX
CCONT_INT
CCONTCSX
UIF_CCONT_SCLK
UIF_CCONT_SDIO
PWRONX
BSI
BTEMP
BVOLT
BSI
VPP_CCONT
CAFE_TX_GATE
CCONT_INTCCONT_INT
CCONTCSXCCONTCSX
UIF_CCONT_SCLKUIF_CCONT_SCLK
UIF_CCONT_SDIOUIF_CCONT_SDIO
BATTERY CONNECTOR
X052
FBUS_TX
FBUS_RX
VPP_FLASH
MBUS
XEAR
SGND
XMICP
L_GND
V_IN
WDDIS
1
2
3
4
5
6
7
8
9
10
11
FBUS_TX
FBUS_RX
MBUS
XEAR
SGND
XMIC
L_GND
CHRG_CTRL
VIN
VPP
WDDIS
FLASH CONNECTOR
PARTS PLACED ON PANEL
VR1
VR2
VR3
VR4
VR5
CCONT
X051
VBATT
BSI
BTEMP
GND
VR7
5V
PA_TEMP
VMAD
VBB
VR1
VR2
VR3
VR4
VR5
VR7
5V
PA_TEMP
VMAD
VBB
VR1
VR2
VR3
VR4
VR5
VR7
5V
PA_TEMP
VMAD
VBB
BVOLT
E050
E051
E052
E053
E056
E057
E054
Issue 1 05/02 Nokia Corporation Page A-2
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5
Circuit Diagram of MAD4
LCD_RESETX
HF_MUTE
BACKLIGHT
LCD_CS
STOP_CH
EEPROMSDA
EEPROMSCLK
LCD_CD
DATA(15:0)
SLEEPCLK
CCONT_INT
PURX
HOOKINT
EAD_HEADINT
TX_LIM
ROW(5:0)
UIF_CCONT_SDIO
CLK9M83
CLK19M2O
RXD(11:0)
MBUS
FBUS_TX
FBUS_RX
CLK19M2O
BLM11A601SPT
R123 1
Z100
/2 47R
/2 47R1R122
C123
D100
MAD4_V14_F741718B
LCD_RESETX
BACKLIGHT
TP100
TP101
TP102
EEPROMSDA
EEPROMSCLK
TP103
TP105
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
VBB
R100
220k
C100
12p
ROW(0)
ROW(1)
ROW(2)
ROW(3)
ROW(4)
ROW(5)
RXD(0)
RXD(1)
RXD(2)
RXD(3)
RXD(4)
RXD(5)
RXD(6)
RXD(7)
RXD(8)
RXD(9)
RXD(10)
RXD(11)
VBB
VBB
R125
R124
4k7
47k
2R123
/2 47R
2/2 47R
R122
R120
100R
C122
12p
12p
R126
220k
C120
150p
FBUS_TX’
FBUS_RX
R127
C121
R101
10k
C154
C150
33n
C151
33n
33n
TP106
O01
O02
O03
O04
O05
O06
O07
EAD_HEADINT’
TP110
TP111
TP112
TP113
TP114
UIF_CCONT_SDIO
TP115
VBB
C153
33n
CCONT_INT
CLK19M2O
CAFESIO(1)
C152
33n
A2
T10
P10
U11
T11
R11
P11
U12
T12
U13
T13
R13
U14
T14
U15
T15
U16
H15
E15
C16
N16
N17
M15
M16
A14
C13
B10
H14
N15
D10
R12
G14
M17
C17
F15
M3
M1
M2
L14
L15
J16
L17
J17
B3
A3
C4
N1
J3
A4
C5
B5
A5
H3
R2
G3
G2
H1
J1
K2
K3
L1
L3
L4
P2
R1
A9
D9
C9
A8
B8
D8
C8
A7
B7
C7
A6
B1
L2
P1
H4
P9
G1
D7
U5
K1
R4
P3
U7
mdP0GPIO0
mdP0GPIO1
mdP0GPIO2
mdP0GPIO3
mdP0GPIO4
mdP0GPIO5
mdP0GPIO7
mdP2GPIO0
mdP2GPIO1
mdP2GPIO2
mdP2GPIO3
mdMCUSDIO
mdMemDa0
mdMemDa1
mdMemDa2
mdMemDa3
mdMemDa4
mdMemDa5
mdMemDa6
mdMemDa7
mdMemDa8
mdMemDa9
mdMemDa10
mdMemDa11
mdMemDa12
mdMemDa13
mdMemDa14
mdMemDa15
ccSleepClk
ccInt
ccPURX
acHookInt
acHeadInt
acAccRxData
rfTXLim
teqDSPSerClk
tmTstMode
emEMU0
emEMU1
emJTDI
emJTSClk
emJTRstX
emJTMS
mdP1UIF0
mdP1UIF1
mdP1UIF2
mdP1UIF3
mdP1UIF4
mdP1UIF5
mdUIFSDIO
cfCDMAClk
cfSysClk
cfAData
cf2MDSerD
cfRXD0
cfRXD1
cfRXD2
cfRXD3
cfRXD4
cfRXD5
cfRXD6
cfRXD7
cfRXD8
cfRXD9
cfRXD10
cfRXD11
LEADVCC
LEADVCC
LEADVCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
ARMVCC
LEADGND
LEADGND
LEADGND
ARMGND
GND
GND
GND
GND
HF_MUTE
LCD_CS
STOP_CH
LCD_CD
MBUS’ FILT_SEL_N’
SLEEPCLK
PURX
HOOKINT
FBUS_RX
TX_LIM
SER_CLK
JTAG(1)
JTAG(2)
JTAG(3)
JTAG(4)
CLK9M83
VMAD
C155
33n
mdP1GPO0
mdP1GPO1
mdP1GPO2
mdP1GPO3
mdP1GPO4
mdP1GPO6
mdGPPDM0
mdGPPDM1
mdGPPDM2
mdGPPDM3
mdGPPDM4
mdTXIFAGC
mdTXRFAGC
mdRFTXPGate
mdMemAd0
mdMemAd1
mdMemAd2
mdMemAd3
mdMemAd4
mdMemAd5
mdMemAd6
mdMemAd7
mdMemAd8
mdMemAd9
mdMemAd10
mdMemAd11
mdMemAd12
mdMemAd13
mdMemAd14
mdMemAd15
mdMemAd16
mdMemAd17
mdMemAd18
mdMemAd19
mdMemAd20
mdMemAd21
mdRFTXCGate
mdRFSLE2
mdRFSLE1
mdRFSData
mdModeSel
mdBandSel
mdLoByteSelX
mdVibraPWM
mdBuzzPWM
mdAccTxData
mdDSPSerFSync
mdCContCSX
mdVCTCXOEn
mdRXIFAGC
md2CFSerD
mdCAFETXGate
mdCAFEFSync
mdROM1SelX
mdROM2SelX
mdRAMSelX
mdEEPROMSelX
mdMemWrX
mdMemRdX
mdRXGS
mdRFSClk
mdTXD0
mdTXD1
mdTXD2
mdTXD3
mdTXD4
mdTXD5
mdTXD6
mdTXD7
mdP0UIF0
mdP0UIF1
mdP0UIF2
mdP0UIF3
mdP0UIF4
mdJTDO
mdLCDCS
mdUIFSClk
mdResetX
mdDSPXF
mdAFC
mdIQSel
GND
GND
GND
GND
GND
GND
GND
E3
D1
RIF_EN’
D2
D3
C1
TIF_EN
J4
G16
D17
TX_LIM_ADJ’
D16
FILT_SEL_P’
D15
B15
TX_IF_AGC’
A15
TX_RF_AGC’
C14
B14
RX_GS’
C2
U10
T9
R9
U9
T8
R8
P8
U8
T7
R7
P7
U6
T6
R6
T5
R5
U4
T4
U3
T3
U2
T1
SYN_CLK
E16
G15
F17
SYN_LE1
F16
SYN_DAT
E17
B12
A12
D11
C11
B11
A11
A10
C10
L16
K17
K14
K15
K16
XIECD
E2
XIECLOCK
E1
F2
VIBRA
F1
BUZZER
G4
FBUS_TX’
H2
DSP_SER_FSNC
J2
JTAG(0)
K4
CCONTCSX
J14
J15
UIF_CCONT_SCLK
H17
RESETX
H16
CLK_EN
G17
RX_IF_AGC’
A16
N3
B17
IQSEL
C6
CAFESIO(0)
B13
CAFE_TX_GATE
B6
CAFESIO(2)
C12
MEM(0)
T17
R16
MEM(1)
R17
VLIM
P15
MEM(2)
P16
MEM(3)
P17
F3
N2
R10
R14
A13
B9
B4
TP132
J130
TP131
O08
O09
O10
O11
O12
O13
TXD(0)
TXD(1)
TXD(2)
TXD(3)
TXD(4)
TXD(5)
TXD(6)
TXD(7)
COL(0)
COL(1)
COL(2)
COL(3)
COL(4)
TP133
TP134
TP140
TP141
TP143
TP144
TP145
TP146
TP147
ADD(0)
ADD(1)
ADD(2)
ADD(3)
ADD(4)
ADD(5)
ADD(6)
ADD(7)
ADD(8)
ADD(9)
ADD(10)
ADD(11)
ADD(12)
ADD(13)
ADD(14)
ADD(15)
ADD(16)
ADD(17)
ADD(18)
ADD(19)
ADD(20)
ADD(21)
MEM(3)
MEM(2)
MEM(1)
MEM(0)
R143
10k
CAFESIO(0)
CAFESIO(2)
R142
R131
100R
R134 10k
2k2R144
R145 2k2
2k2R135
D130
2
1
10k
TC7S00F
4
&
5= VBB3= GND
R136 2k2
R133
R146 1k0
R140
R141
560RR137
10R
C134
C141
C144
10n
10n 10n
1n0
C131
10n
18k
47k
C140
10n
C145
C135
10n
C136
10n
D140
TC7SL08FU
1
2
C138
C146
10n
100p
&
4
VBB5=
GND3=
RIF_EN
TIF_EN
TX_LIM_ADJ
FILT_SEL_P
FILT_SEL_N
TX_IF_AGC
TX_RF_AGC
RF_TX_GATE_P
RX_GS
ADD(21:0)
SYN_CLK
SYN_LE1
SYN_DAT
TXD(7:0)
COL(4:0)
VIBRA
BUZZER
CCONTCSX
UIF_CCONT_SCLK
RESETX
RESETX
CLK_EN
RX_IF_AGC
AFC
IQSEL
CAFE_TX_GATE
VLIM
RPX
MEM(3:0)
CAFESIO(2:0)
Issue 1 05/02 Nokia Corporation Page A-3
PAMS Technical Documentation Schematics / Layouts 8270 NSD-5
Circuit Diagram of Memory
EEPROMSDA
EEPROMSCLK
R162
VBB
VBB
10k
D180
AT24C1024C1-10C1-2.7
EEPROM 128Kx8
2
0
A1
131071
5
SDA
6
SCL
7
WP
GND4= VBB8=
C180
33n
ADD(1)
ADD(2)
ADD(3)
ADD(4)
ADD(5)
ADD(6)
ADD(7)
ADD(8)
ADD(9)
ADD(10)
ADD(11)
ADD(12)
ADD(13)
ADD(14)
ADD(15)
ADD(16)
ADD(17)
ADD(18)
ADD(19)
ADD(20)
MEM(0)
MEM(3)
MEM(2)
VBB
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
M28W320BT100ZB6T
D8
0
C8
B8
C7
A8
B7
C6
A7
A3
C3
B2
A2
C2
A1
B1
C1
D1
B6
B5
A6
C5
20
D7
_E
F8
_G
B3
_W
B4
_RP
A5
_WP
E7
F7
D5
E5
F4
D3
E3
F2
D6
E6
F6
D4
E4
F3
D2
E2
D160
FLASHM 2Mx16
0
A
2097151
DATA IXO
F5= VBB
A4= VPP_FLASH
E1=
VBB
E8,F1= GND
C160
D170
K6F4008U2E-EF70
ADD(0)
ADD(1)
ADD(2)
ADD(3)
ADD(4)
ADD(5)
ADD(6)
ADD(7)
ADD(8)
ADD(9)
ADD(10)
ADD(11)
ADD(12)
ADD(13)
ADD(14)
ADD(15)
ADD(16)
ADD(17)
ADD(18)
MEM(1)
VPP_FLASH
C161
33n
33n
MEM(3)
MEM(2)
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
R175
0R
VBB
SRAM 512Kx8
A1
0
A2
B2
A4
B4
C4
A5
B5
A6
H1
H2
H3
H4
H5
H6
G5
G4
F4
F3
G3
A3
B3
G2
C3
B6
C6
F6
G6
B1
C1
F1
G1
18
_CS1
CS2
_WE
_OE
DNU
A
524287
DATA I/O
0
VBBVBB
C170
100n
VBBE1,D6=
GNDD1,E6=
RPX
ADD(21:0)
MEM(3:0)
DATA(15:0)
ADD(21)
Issue 1 05/02 Nokia Corporation Page A-4
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