Nokia 6310 Service Manual 3 npe 4 system bb

Programmes After Market Services
NPE-4 Series Cellular Phones

2 - Broadband System

Original ãNokia Corporation. Page 2-1
NPE-4
2 - Broadband System PAMS Technical Documentation
Table of Contents
Introduction ......................................................................................................................................
Abbreviations .................................................................................................................................... 5
Environmental specification ......................................................................................................... 7
Absolute maximum ratings .................................................................................................... 7
Normal and extreme voltages ............................................................................................... 7
Temeperature conditions ........................................................................................................8
Humidity and water resistance ............................................................................................. 8
Vibration and bump ................................................................................................................. 8
EMC / ESD immunity ............................................................................................................... 8
Technical specifications ................................................................................................................. 8
UEM .............................................................................................................................................. 8
Reset sequence .................................................................................................................. 8
No supply ............................................................................................................................. 10
Backup .................................................................................................................................. 11
Power off ............................................................................................................................ 11
Reset .................................................................................................................................... 11
Power on ............................................................................................................................. 11
Sleep .................................................................................................................................... 11
Protection mode ...............................................................................................................12
DC characteristics ................................................................................................................... 12
Charging .................................................................................................................................... 15
Battery ........................................................................................................................................ 18
UPP (Universal Phone Processor) ........................................................................................ 19
Bluetooth ................................................................................................................................... 21
Ul .................................................................................................................................................. 21
LCD cell ............................................................................................................................... 21
LCD Backlight .................................................................................................................... 23
Keyboard light ................................................................................................................... 24
LED driver circuit .............................................................................................................. 24
Vibra .................................................................................................................................... 24
Buzzer ................................................................................................................................. 24
Keypad ................................................................................................................................ 25
IR-module .................................................................................................................................. 25
SIM .............................................................................................................................................. 25
Memory description ....................................................................................................................... 26
Read cycle ................................................................................................................................. 27
Write cycle ................................................................................................................................ 27
Power saving signal (PS) ........................................................................................................ 28
Memory block ........................................................................................................................... 30
Block locking ............................................................................................................................ 30
Read while write (RWW) ....................................................................................................... 31
Burst mode ................................................................................................................................ 32
5
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Flash programming ................................................................................................................. 32
MCU boot .................................................................................................................................. 33
Flash identifiers ....................................................................................................................... 33
First word ........................................................................................................................... 33
Second word ...................................................................................................................... 33
Third word .......................................................................................................................... 33
Fourth word ....................................................................................................................... 33
Fifth word ............................................................................................................................ 34
Absolute maximum ratings (AMD 64bit) ........................................................................... 34
Absolute maximum ratings (INTEL 64bit) .......................................................................... 34
HW Interfaces .................................................................................................................................. 35
Keypad interface ...................................................................................................................... 35
LCD interface ............................................................................................................................ 36
SIM interface ............................................................................................................................ 37
Ostrich ........................................................................................................................................ 38
JTAG interface .......................................................................................................................... 38
BT module interface ................................................................................................................ 39
SW interface ...................................................................................................................... 39
BT102 flash programming ............................................................................................. 39
HW interface ..................................................................................................................... 40
Baseband - RF interface ........................................................................................................ 42
Digital signals ................................................................................................................... 42
Analogue signals ..............................................................................................................44
Voltage supplies and references .................................................................................. 48
Accessory interfaces ............................................................................................................... 49
MBus ........................................................................................................................................... 49
FBus ............................................................................................................................................. 50
Baseband EMC strategy ................................................................................................................ 50
EMC design ............................................................................................................................... 51
SIM and keypad ................................................................................................................52
ESD test ...................................................................................................................................... 52
Conducted and radiated immunity tests ............................................................................ 53
TDMA noise ............................................................................................................................... 53
Baseband testing ............................................................................................................................ 53
Test Points .......................................................................................................................................... 53
List of Figures
Figure 1 NPE-4 Baseband block diagram ............................................................................ 6
Figure 2 UEM state disgram .................................................................................................... 9
Figure 3 LCD worst case test image ...................................................................................... 13
Figure 4 Baseband power distribution ................................................................................. 15
Figure 5 Charging configuration ............................................................................................ 15
Figure 6 Detection of charger ................................................................................................. 16
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List of Figures (continued)
Figure 7 UEM charging state diagram, PWM mode only ................................................ 17
Figure 8 Charging scenario where the battery is abruptly removed ............................ 18
Figure 9 Mechanical layout of DCT-3 battery .................................................................... 19
Figure 10 UPP architecture ........................................................................................................ 20
Figure 11 Complete overview of LCD module ....................................................................... 22
Figure 12 LCD module ................................................................................................................. 23
Figure 13 LED driver circuit for display and key light ......................................................... 24
Figure 14 NPE-4 IR connectivity ............................................................................................. 25
Figure 15 UPP, UEM and SIM connections ............................................................................ 26
Figure 16 Basic reading (random access) ............................................................................... 27
Figure 17 Write waveform (random access) ......................................................................... 28
Figure 18 The data is compared by using an XOR-function ............................................. 29
Figure 19 The comparison shows more unequal bits .......................................................... 30
Figure 20 Burst mode reading from the flash ....................................................................... 32
Figure 21 NPE-4 keypad ............................................................................................................ 35
Figure 22 Placement of SIM pins (phone bottom view) ..................................................... 37
Figure 23 SW interface diagram ............................................................................................... 39
Figure 24 BT102 Flash programming ...................................................................................... 39
Figure 25 BT102 HW interface .................................................................................................. 40
Figure 26 XEAR connection .......................................................................................................51
Figure 27 XMIC connection ....................................................................................................... 52
List of Tables
Table 1 Absolute max. ratings ............................................................................................... 7
Table 2 Temperature conditions for NPE-4 ...................................................................... 8
Table 3 UEM regulator outputs and state in SLEEP ........................................................ 12
Table 4 NPE-4 current consumption from VFLASH during SLEEP mode .................. 13
Table 5 LCD current consumption ........................................................................................ 23
Table 6 Absolute max. ratings for AMD 64Mbit .............................................................. 34
Table 7 Absolute max. ratings for Intel 64Mbit ............................................................... 34
Table 8 LCD module pin-out to PWB .................................................................................. 36
Table 9 SIM connector interface .......................................................................................... 37
Table 10 Ostrich interface ........................................................................................................ 38
Table 11 JTAG interface levels ................................................................................................. 38
Table 12 BT - BB interface description ................................................................................. 40
Table 13 Digital signals ............................................................................................................. 43
Table 14 Analoge signals .......................................................................................................... 44
Table 15 Regulators and references ....................................................................................... 48
Table 16 MBus interface .......................................................................................................... 50
Table 17 FBus interface ............................................................................................................ 50
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PAMS Technical Documentation 2 - Broadband System

Introduction

This Chapter specifies the baseband module for the NPE-4 program. The baseband mod­ule includes the baseband engine chipset, The UI components and the acoustical parts for the transceiver.
NPE-4 is a hand-portable GSM900/GSM1800 phone for the classic segment, having the DCT4 generation baseband- and RF circuitry. The key drivers for this product are GPRS data transmission and short time to market.
The mechanical solution is based on the NPE-3 phone, modified with a new A-cover design. The acoustical design is very similar to that implemented in NPE-3.
NPE-4 is having the DCT3 system connector and supports accordingly most DCT3 acces­sories. The battery interface is the one known from DCT3 phones and NPE-4 will support both Nickel- and Lithium batteries.
New features in NPE-4 project is Bluetooth wireless data and audio connection and GPRS for TCP/IP protocol data transmission.

Abbreviations

BSI Battery Size Indicator NO_SUPPLY UEM state where UEM has no supply what so ever VBAT Main battery voltage V
VBACK Backup battery voltage V_BU
BACK_UP UEM state where UEM has backup voltage RESET UEM state where regulators are enabled RTC UEM internal Real Time Clock VRTC Regulator voltage for RTC PWR_OFF UEM state where phone is off SLEEP UEM power saving state controlled by UPP SLEEPX SLEEP control signal from UPP PWRONX Signal from power on key. '1' = key pressed. VCHAR Charger input voltage
MSTR+
COFF+
, V
MSTR-
, V_BU
COFF-
Master Reset threshold level (2.1 V / 1.9 V)
Backup battery threshold level (3.1 V / 2.8 V)
VCHAR
DET
Charger detection threshold level
UEM Universal Energy Management UPP Universal Phone Processor IMD In-Mould Decoration
Original ãNokia Corporation. Page 2-5
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2 - Broadband System PAMS Technical Documentation

Technical Summary

PA Supply
RF Supplies
RF RX/TX
IRDA
EAR
MIC
BUZZO
VIBRA
M
Battery
UEM
Baseband
DLIGHT KLIGHT
SLEEPCLK
32kHz
BB
Supplies
MBus/FBus External Audio Charger connection
CBUS/
DBUS
UI
UPP
MEMADDASIMIF
SIM FLASH
13MHz
HAGAR
26MHz
CBUS USART
Bluetooth
DCT3 System connector
Figure 1 NPE-4 baseband block diagram
A draft block diagram is shown in Figure 1 NPE-4 baseband block diagram.
The baseband module contains 2 ASICs namely the Universal Energy Management (UEM) and the Universal Phone Processor (UPP). The baseband module furthermore contains the Bluetooth module. The baseband is based on the DCT4 engine program.
The UEM supplies both the baseband module as well as the RF module with a series of voltage regulators. The RF module is supplied with regulated voltages 4.75 V and 2.78 V and the baseband module with 2.78 V and 1.80 V. The UEM is furthermore supplying the baseband SIM interface with a programmable voltage of either 1.8 V or 3.0 V and the core of the UPP is supplied with a programmable voltage of 1.0 V, 1.3 V, 1.5 V or 1.8 V.
The UEM contains a series of PWM sourced drivers. The individual PWM signals are gen­erated internally within the digital part of the UEM and distributed to the drivers. The
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buzzer driver receives a PWM signal where both frequency and duty-cycle are pre-set by register writings. For the vibra, a set of frequencies can be chosen. The frequencies are 64 Hz, 128 Hz, 258 Hz and 520 Hz and the duty cycle 2.9 % to 96.9 %. LCD and keyboard light LED drivers receive a PWM signal of 128 Hz where the duty-cycle can be pro­grammed by setting a 4-bit register.
The UEM also contains an IR driver supporting 9600 bps to 1152 kbps, semi duplex. This driver works as a level shifter on the RX and TX lines to and from the UPP.
The UEM contains a real-time clock sliced down from the 32768 Hz crystal oscillator. The 32768 Hz clock is fed to the UPP as a sleep clock.
The communication between the UEM and the UPP is done on the bi-directional CBUS and DBus. The CBUS is controlled by the MCU and can operate at a speed of maximum 1 MHz. The DBus is controlled by the DSP and can operate at a maximum speed of 13 MHz. Both processors are located in the UPP.

Environmental Specifications

Absolute maximum ratings

Table 1: Absolute maximum ratings
Parameter Rating Remarks
Supply voltage, VBAT -0.3 V - 5.5 VDC Supply voltage for UEM
Charger input voltage, VCH -0.3 V - 16 VDC Conditions set by UEM. Input
clamped @16 VDC.
, Hardware cut-off voltage)
, Upper charger limit)

Normal and extreme voltages

Nominal voltage: 3.6 V (VBAT, Main battery voltage)
Lower extreme voltage: 2.9 V (V
Higher extreme voltage 5.4 V (VBAT
-0.3 – 20 VDC
pk
COFF-
LIM2+
Conditions set by UEM.
Minimum guarantied operating voltage 3.04 V (DCT4 Engine minimum cut-off voltage)
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2 - Broadband System PAMS Technical Documentation

Temperature Conditions

Table 2: Temperature conditions for NPE-4
Environmental condition Ambient temperature Remarks
Normal operation
Reduced performance
No operation or storage
Long term storage conditions
-25 ° C … +55 °C
+55 °C … +70 °C
-40 °C > T > 85 °C

Humidity and water resistance

The baseband module will comply with the SPR4 Operating Conditions.

Vibration and bump

The baseband module will comply with the SPR3 Mechanical Functionality.

EMC / ESD immunity

The baseband module will comply with the SPR4 Operating Conditions. See also base­band EMC strategy in section Baseband EMC Strategy on page Baseband EMC Strategy.

Technical Specifications

0 °C … +40 °C
Specifications fulfilled
Operational for short periods only
No storage. An attempt to operate may
damage the phone permanently
Condition is without battery
The following chapters describe the NPE-4 baseband module in overview. If further infor­mation is needed, check with the references at the end of the Specification section Ref­erences and/or with references mentioned in the individual chapters.
UEM
The UEM is one of the two ASICs in the baseband module.
Reset sequence
The functional behaviour of the UEM can be divided into 7 different states. Since the UEM controls the regulated power distribution of the phone, each of these states affects the general functionality of the phone:
No supply
•Backup
•Power off
•Reset
•Power on
•Sleep
•Protection
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Figure 2 UEM state diagram
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2 - Broadband System PAMS Technical Documentation
The text below explains the state diagram. The symbol 'ä' means that the voltage rises and 'æ' that the voltage drops. '®' Means the result of the conditions set on the left most side.
VBAT < V
VBAT < V
VBAT ä V
VBAT > V
VBAT ä V
and VBACK > V_BU
MSTR
and VBACK < V_BU
MSTR
. VBACK < V_BU
MSTR+
. DELAY1 elapses ® Go to RESET
MSTR
. VBACK > V_BU
MSTR+
COFF
COFF
PWRONX = '0' or VCHAR ä VCHAR
VBAT > V
® Go to DELAY2
COFF+
DELAY2 elapses ® Go to DELAY3
VBAT > C
. DELAY3 elapses ® Go to DELAY4
OFF+
DELAY4 elapses ® Go to PWR_ON
SLEEPX = '0' ® Go to SLEEP
SLEEPX = '1' ® Go to PWR_ON
® Go to BACK_UP
COFF
® Go to NO_SUPPLY
COFF
® Go to DELAY1
® Go to DELAY1
or ALARM = '1' ® Go to DELAY1
DET+
VBAT æ V
No change
VBAT > V
PWRONX ä detection during DELAY2 ® Go to PWR_OFF
Watchdog elapses (approx. 100 ms) ® Go to PWR_OFF
Thermal shutdown ® Go to PWR_OFF
PwrKeyWatchdog (4 sec.) elapses ® Go to PWR_OFF
The different states of the UEM are explained further below:
No supply
In the NO_SUPPLY mode the UEM has no supply voltage (VBAT < V V_BU tery is either disconnected or both discharged to a low voltage level.
The UEM will recover from NO_SUPPLY into RESET mode if the VBAT voltage level rises above the V
and VBAT > V
COFF-
® Stay in PWR_OFF
MSTR
). This mode is due to the fact, that both the main battery and the backup bat-
COFF-
level by either reconnecting the main battery or charge it to such level.
MSTR+
® Go to PWR_OFF
MSTR-
and VBACK <
MSTR
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Backup
In BACK_UP mode the main battery is either disconnected or has a low voltage level (VBAT < V
and VBACK > V_BU
MSTR-
COFF+
).
The regulator VRTC that supplies the real time clock is disabled in BACK_UP mode. Instead the unregulated backup battery voltage VBACK supplies the output of the VRTC. All other regulators are disabled and the phone has no functionality.
The UEM will recover from BACK_UP mode into RESET mode if VBAT rises above V
Power off
In order for the UEM to be in PWR_OFF mode, it must have supply voltage (VBAT > V
The regulator VRTC regulator is enabled and supplying the RTC within the UEM. The UEM will enter RESET mode after a 20 ms delay whenever one of the below listed conditions is logically true:
The UEM will enter PWR_OFF from all other modes except NO_SUPPLY and BACK_UP if the internal watchdog elapses.
Reset
).
MSTR+
The power button is activated
Charger connection is detected
RTC alarm is detected
MSTR+
.
When the UEM enters RESET mode from PWR_OFF mode the watchdog is enabled. If the VBAT fails to rise above the power-up voltage level V
elapses, the UEM will enter PWR_OFF mode. Otherwise after a 200 ms delay the regula­tor VFLASH1 will be enabled and after a additional delay of 500 ms the regulators VANA, VIO, VCORE and VR3 will be enabled. All other regulators i.e. VFLASH2, VSIM, VR1, VR2 and VR4 – VR7 are software controlled and disabled by default. After an additional delay of 20 ms the UEM enters PWR_ON mode.
Power on
In PWR_ON the UEM is fully functional in the sense that all internal circuits is powered up or can be by means of software. The UEM will enter PWR_OFF mode if VBAT drops below V
PWR_OFF mode if either of the watchdogs Operational State Machine (approx. 100 ms), Security (32 sec.) or Power Key (4 sec.) elapses or if any of the regulators triggers the thermal protection circuitry
Sleep
The UEM can be forced into SLEEP mode by the UPP by setting the input SLEEPX low for more than 60 ms. This state is entered when the external UPP activity is low (phone in
(3.1 V) before the watchdog
COFF+
for a period of time longer than 5 ms. The UEM will furthermore enter
COOF-
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sleep) and thereby lowering the internal current consumption of the UEM. The regulator VANA is disabled and VR1 – VR7 are either disabled or in low quiescent mode.
From SLEEP the UEM enters PWR_ON if SLEEPX goes high, PWR_OFF mode if watchdog elapses or BACK_UP mode if VBAT drops below V
MSTR-
.
Protection mode
The UEM has two separate protection limits for over temperature conditions, one for the charging switch and one for the regulators. The temperature circuitry measures the on­chip temperature. In case of charging over temperature, the circuit turns the charging switch off. In case of over temperature in any of the regulators, the UEM powers off.

DC characteristics

The figures in the following table reflect the specifications of the voltage and current regulators within the UEM.
Table 3: UEM regulator outputs and state in sleep
Regulator Tar get Output Voltage [V] Output Current [mA]
Min Typ Max Min Max
VR1A, VR1B RF 4.6 4.75 4.9 0 10 Off
6
VR2
VR3 RF 2.70 2.78 2.86 0.1 20 Off
2
VR4
VR5, VR6
VR7 RF 2.70 2.78 2.86 0.1 45 Off
VrefRF01 RF 1.334 1.35 1.366 - 0.1 On
VrefRF02
VIO
VSIM
VANA BB 2.70 2.78 2.86 0.005 80 Off
VCORE
VFLASH1 BB 2.70 2.78 2.86 0.005
VFLASH2
2
1
2
2
3
5
RF 2.70 2.78 2.86 0.1 100 Off or Low Iq
RF 2.70 2.78 2.86 0.1 50
0.1
RF 2.70 2.78 2.86 0.1 50
0.1
RF 1.323 1.35 1.377 - 0.1 On or Off
BB 1.72 1.8 1.88 0.005
0.005
BB 1.745
2.91
BB 1.000
1.235
1.425
1.710
0.974
1.215
1.410
1.692
BB 2.70 2.78 2.86 0.005 40 On or Off
1.8
3.0
1.053
1.3
1.5
1.8
1.053
1.3
1.5
1.8
1.855
3.09
1.106
1.365
1.575
1.890
1.132
1.365
1.575
1.890
0.005
0.005
0.005
0.005
0.005
0.005
70 85 100 120
0.005
150
0.500
25
0.500
70 85 100 120
200 200 200 200
70
1.5
UEMSLX = '0'
Off
Off
Low Iq
Low Iq
Low Iq
Low Iq
4
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1) Controlled by MCU writing to UEM references register.
2) The second current value indicates the maximum possible output current of the regulator when in low quiescent mode.
3) The output voltages are split into two different current categories. The upper part is the lower range of output current, and the lower part is the higher range of output current.
4) UEMSLX is slave to SleepX from the UPP. Sets the UEM into sleep mode.
5) Condition in sleep-mode depends on MCU writings to UEM regulator registers solely.
6) Condition in sleep-mode depends on DSP writings to UEM register.
Due to the low output current from the VFLASH1 regulator during sleep, the following table with estimated current consumption drawn from the regulator in sleep mode was made.
Table 4: NPE-4 current consumption from VFLASH1 during Sleep mode
Consumer Max current
1
LCD
Audio area
- XMIC
- XEAR
- DLR-3P
Bluetooth 8
UEM
- 2 x slow ADC
- BSI
IR 5
Total 482
376 mA All figures are estimates @25 °C
60 1 1
2 29
Unit
Note
1) Maximum current measured on 10 samples.
The current consumed by the LCD has been measured by vendor using worst case normal mode displayed image as shown in Figure 3.
Figure 3 LCD worst case test image
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Under normal conditions, the battery powers the baseband module. The battery voltage VBAT is regulated by individual regulators located within the UEM. These regulators sup­ply the different parts of the phone. 8 regulators are dedicated to the RF module of the phone, and 6 to the baseband module.
The VSIM regulator is able to deliver both 1.8 and 3.0 Vdc and thus supporting two dif­ferent SIM technologies. A register internally in the UEM controls the output of VSIM and can be written to by the MCU via the CBUS. The regulator VCORE is likewise adjust­able and controlled by register writings by the MCU. VCORE supplies the core of the UPP and can be adjusted on the fly by the MCU if DSP capacity is inadequate. Higher VCORE supply (1.8 V) results in faster core operations in the UPP.
The regulator VFLASH2 supplies audio circuitry and is controlled by the MCU
The regulators VANA, VFLASH1 and VIO are solely controlled by the UEM and cannot be en-/disabled by MCU writings. Furthermore, VFLASH1 and VIO are both ON, though in low quiescent mode when the phone is in sleep mode. An output current of 500 mA can be drawn from the VIO regulator and 1.5 mA from the VFLASH1 regulator. VIO supplies the UPP, FLASH and LCD, VFLASH1 supplies LCD, DLR-3 cable, IRDA and the Bluetooth module. VANA is supplying analogue parts internally in the UEM as well as the baseband audio circuitry and pull-up resistors on the input of the UEM slow AD converters.
When the plug and play DLR-3 cable is connected to the phone, it must be supplied by the phone with 2.78 Vdc / 25 mA. This is delivered via a switch from VFLASH1. The switch is controlled by the MCU and the control signal originates from a general IO pin on the UPP.
The regulators VR1A, VR1B, VR2 – VR7 and IPA1 – IPA4 are all controlled by the DSP via the DBus. VR3 – VR7 are controlled by the UEM as well and are disabled in sleep regard­less of DSP writings.
VBAT is furthermore distributed, unregulated, to the RF power-amplifier and the BT102 Bluetooth module as well as filters in the baseband module.
The CHACON module in the UEM controls the charging of the main battery. Furthermore it contains a 3.2 Vdc regulator for charging of the backup battery and a 1.8 Vdc regulator supplying the internal real time clock.
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Baseband
UEM
RF Regulators
Boomer
VR1A VR1B
VR2-7
6
SIM
VSIM
Battery
VCORE
VANA
VFLASH1
VFLASH2
VBAT
Bluetooth
PA Supply
Baseband Regulators
RTC
CHACON
System Connecter
Figure 4 Baseband power distribution
VIO
UPP
FLASH
LCD
Backup
battery
DLR-3
switch
IRDA

Charging

The charging of the main battery is controlled by the UEM. External components are needed in order to sense charging current and voltage that are needed by the Energy Management (EM) software and to protect against EMC into the baseband area. The charger is connected to the phone via the DCT3 bottom connector and routed from here to the UEM via the PWB.
Transceiver
0R22
VBATREGS
1u10n
UEM
VCHARINVCHAROUT
CHACON
PWM
VCHAR
1n
10k
33R/100MHz
10k
10n
VCHAR
1.5A
CHRG_CTRL
GND
Figure 5 Charging configuration
Original ãNokia Corporation. Page 2-15
Charger
Filter
cap.
Zmin. 20k
Pull-
down
100k
1000uF
max.
NPE-4
2 - Broadband System PAMS Technical Documentation
Connecting a charger to the telephone creates a voltage, VCH, on the UEM VCHAR input. When the VCH level is detected to rise above the VCH
threshold (2.0 Vdc) by CHACON,
DET
charging starts. Level crossing detection of the VCHAR line is used to generate synchro­nizing pulses for UEM’s state machine for control of rectifier type chargers, e.g. ACP-7.
Figure 6 Detection of charger / generation of charger synchronization pulses
In case the main battery is fully discharged and the UEM subsequently is without power i.e. in NO_SUPPLY or BACKUP mode, the start-up charging circuitry is in control, giving the possibility to detect a charger and engage charging. If the VBAT level is detected to be lower than the master reset voltage (V
with a constant current of 100 mA until VBAT exceeds V
) the CHACON will charge the battery
MSTR-
. When this happens, from
MSTR+
a charging point of view, normal PWM charging situation resumes. A PWM signal is gen­erated by the digital part of the UEM, which sources the CHACON. The frequency of the signal can be either 1 Hz or 32 Hz. If the connected charger is of a 2-wire kind e.g. ACP­7, the PWM signal has the frequency 1 Hz. If the charger on the other hand is a 3-wire type e.g. ACP-9, the switch is left on permanently and the 32 Hz PWM control signal routed to the charger in order to produce a constant voltage. Figure 7 shows a state dia­gram of the PWM charge situation.
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Figure 7 UEM charging state diagram, PWM mode only
In order to protect the phone from damage resulted by over voltage in the case that the battery is abruptly removed when charging is ongoing, the charger switch is closed immediately. This is detected by means of VBAT that will rise fast above VBAT
LIM1,2+
when the battery is removed. A scenario like this can be seen in Figure 8.
Original ãNokia Corporation. Page 2-17
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