Glossary of Terms..................................................................................................................................... 5
Bluetooth .......................................................................................................................................... 27
USB ..................................................................................................................................................... 30
Test Pattern ...................................................................................................................................... 36
Test Points............................................................................................................................................... 38
Main board A side of PWB ...............................................................................................................38
Main board B side of PWB ...............................................................................................................39
Front End........................................................................................................................................... 47
Power Amplifier............................................................................................................................... 48
ADSPApplication DSP (expected to run high level tasks)
ARMAdvanced RISC Machines
BB Baseband
BC02Bluetooth module made by CSR
CCPCompact Camera Port
CDSPCellular DSP (expected to run low level tasks)
COF Chip on foil
COG Chip On Glass
CSRCambridge Silicon Radio
CSTN Color Super Twisted Nematic
CTSIClock Timing Sleep and Interrupt block of Tiku
DCT4.5 Digital Core Technology, generation 4.5
DSP Digital Signal Processor
EMCElectro Magnetic Compatibility
ESDElectro Static Discharge
FCIFunctional Cover Interface
FRFull Rate
FSTNFilm compensated Super Twisted Nematic
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GSMGlobal System Mobile
HWHardware
IFInterface
IHFIntegrated Hands Free
IMEIInternational Mobile Equipment Identity
IRInfrared
IrDaInfrared Data Association
LCDLiquid Crystal Display
LDOLow Drop Out
LEDLight Emitting Diode
LPRFLow Power Radio Frequency
MCUMicroprocessor Control Unit
NTCNegative temperature Coefficient, temperature sensitive resistor
used as an temperature sensor.
PAPower Amplifier (RF)
PDAPersonal Digital Assistant
PDRAMProgram/Data RAM (on chip in Tiku)
PhoenixSW tool of DCT4.x
PUPGeneral Purpose IO (PIO), USARTS and Pulse Width Modulators
PWBPrinted Wired Board
PopPort
TM
BB4.x system connector. It includes: USB, Stereo headset, Fbus.
RTCReal Time Clock, small circuitry that keeps track of updating the
clock counter and the calendar. To keep it update without (or
empty) battery, an alternative power source can be used: small
battery or large capacitor.
SARAMSingle Access RAM
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SIMSubscriber Identification Module
SWSoftware
SWIMSubscriber / Wallet Identification Module
SPRStandard Product Requirements
STISerial Trace Interface
TCXOTemperature controlled Oscillator
TikuFinnish for Chip, Successor of the UPP (Universal Phone
Processor), Official Tiku3G
UEMEUniversal Energy Management Enhanced
UIUser Interface
USBUniversal Serial Bus
UPPUniversal Phone Processor
UPP_WD2Communicator version of DCT4 system ASIC
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Baseband Module Introduction
This chapter describes the baseband module for the RH-12/RH-28 program. The baseband module includes the baseband engine chipset, the UI components and acoustical
parts of the transceiver.
The RH-12/RH-28 is a hand-portable GSM900/GSM1800/GSM1900 phone for the Smart
Classic segment, having the DCT4.5 generation baseband- and RF circuitry. The key driver
for this product is the implementation of EDGE, introducing true multimedia capability
from WCDMA in GSM single mode.
RH-12/RH-28 is equipped with the DCT4 connector, supporting most of the DCT4 accessories. The battery interface is relative new consisting of only 3 connections. Standard
battery will be the BL-5C battery with 850mAh.
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Features
The HW specific features of the RH-12/RH-28 phone:
•Monoblock phone with easy exchangeable covers.
•Tripleband Engine (900, 1800, 1900), US variant (850, 1800, 1900)
•E-GPRS MSC 5 (2+2)
•FR, EFR, AMR codecs
•Integrated Camera and Colour Display 128x128
•MMS (Multi Media Messaging), Java MIDP, SyncML & xHTML
•Connectivity accessories: DCV-14, DKU-2, DTL-4 and HDA-10.
•Accessory covers: X-press on covers.
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Environmental Specifications
Normal and extreme voltages
Following voltages are assumed as normal and extreme voltages for used battery:
Table 1: Normal and extreme voltages
VoltageVoltage [V]Condition
General Conditions
Nominal voltage3,700
Lower extreme voltage3,1451
Higher extreme voltage
(fast charging)
HW Shutdown Voltages
Vmstr+2,1 ± 0,1Off to on
Vmstr-1,9 ± 0,1On to off
SW Shutdown Voltages
Sw shutdown3,1In call
Sw shutdown3,2In idle
Min Operating Voltage
Vcoff+3,1 ± 0,1Off to on
Vcoff-2,8 ± 0,1On to off
1
ADC settings in the SW might shutdown the phone above this value.
2
During fast charging of an empty battery, the voltage might exceed this value. Voltages between
4.20 and 4.60 might appear for a short while.
4,2302
Temperature conditions
•Operational temperature range (all specifications met within this range):
–5°C.. +55°C (stationary use)
•Functional temperature range (reduced performance):
–30°C.. +70°C
•Storage temperature range:
–30°C.. +85°C
Temperatures at –10°C, +25°C and +55°C are used for the cpk analysis.
The baseband module complies with the SPR4 Operating Conditions.
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Humidity
Relative humidity range is 5...95%.
The BB module is not protected against water. Condensed or splashed water might cause
malfunction. Any submerge of the phone will cause permanent damage. Long-term high
humidity, with condensation, will cause permanent damage because of corrosion.
The baseband module complies with the SPR4 Operating Conditions.
Vibration
The baseband module complies with the SPR4 Operating Conditions.
ESD strength
Standard for electrostatic discharge is IEC 61000-4-2 and level 4 requirements are fulfilled.
The baseband module complies with the SPR4 Operating Conditions.
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Technical Specifications
UEME
UEME is the Universal Energy Management Enhanced IC for digital hand portable
phones. In addition to energy management, the UEME functionality performs all baseband mixed–signal functions.
The different states of the UEME are explained below.
No supply
In the NO_SUPPLY mode the UEME has no supply voltage (VBAT < VMSTR and
VBACK<V_BUCOFF-). This mode is due to the fact, that both the main battery and the
backup battery are either disconnected or both discharged to a low voltage level.
The UEME will recover from NO_SUPPLY into the RESET mode, if the VBAT voltage level
rises above the VMSTR+ level, by either reconnecting the main battery or charging it to
such level.
Backup
In the BACK_UP mode the main battery is either disconnected or has a low voltage level
(VBAT < VMSTR- and VBACK > V_BUCOFF+).
The regulator VRTC that supplies the real time clock is disabled in the BACK_UP mode.
Instead the unregulated backup battery voltage VBACK supplies the output of the VRTC.
All other regulators are disabled and the phone has no functionality.
The UEME will recover from the BACK_UP mode into the RESET mode if VBAT rises above
VMSTR+.
Power off
In order for the UEME to be in the PWR_OFF mode, it must have supply voltage (VBAT >
VMSTR+).
The VRTC regulator is enabled and supplying the RTC within the UEME. The UEME will
enter the RESET mode after a 20 ms delay whenever one of the below listed conditions is
logically true:
•The power button is activated.
•Charger connection is detected.
•RTC alarm is detected.
The UEME will enter PWR_OFF from all other modes except NO_SUPPLY and BACK_UP if
the internal watchdog elapses.
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Reset
When the UEME enters the RESET mode from the PWR_OFF mode the watchdog is
enabled. If the VBAT fails to rise above the power-up voltage level VCOFF+ (3.1 V), before
the watchdog elapses, the UEME will enter the PWR_OFF mode. Otherwise, after a 200
ms delay the regulator VFLASH1 will be enabled and after an additional delay of 500 _s,
the regulators VANA, VIO, VCORE and VR3 will be enabled. All other regulators i.e.
VFLASH2, VSIM, VR1, VR2 and VR4 – VR7 are software controlled and disabled by
default. After an additional delay of 20 ms, the UEME enters the PWR_ON mode.
Power on
In PWR_ON the UEME is fully functional in the sense that all internal circuits are powered up or can be by means of software. The UEME will enter the PWR_OFF mode if VBAT
drops below VCOOF- for a period of time longer than 5 _s. The UEME will furthermore
enter the PWR_OFF mode if either of the watchdogs Operational State Machine (approx.
100 _s), Security (32 sec.) or Power Key (4 sec.) elapses or if any of the regulators triggers
the thermal protection circuitry.
Sleep
The UEME can be forced into the SLEEP mode by the Tiku by setting the input SLEEPX low
for more than 60 _s. This state is entered when the external Tiku activity is low (phone in
sleep) and thereby lowering the internal current consumption of the UEME. The regulator
VANA is disabled and VR1 – VR7 are either disabled or in low quiescent mode. From
SLEEP the UEME enters PWR_ON if SLEEPX goes high, the PWR_OFF mode if watchdog
elapses or the BACK_UP mode if VBAT drops below VMSTR-.
Protection mode
The UEME has two separate protection limits for over temperature conditions, one for
the charging switch and one for the regulators. The temperature circuitry measures the
onchip temperature. In case of charging over temperature, the circuit turns the charging
switch off. In case of over temperature in any of the regulators, the UEME powers off.
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DC Characteristics
The figures in the following table reflect the specification of the voltage and current regulators within the UEME.
Table 2: UEME Regulator Output and State in Sleep
Voltage (V)Current (mA)
Name
MinNomMaxMax
VANA2.702.782.868025uA minimum for stability.
VFLASH12.612.782.95701.515uA minimum for stability. Con-
VIO1.721.801.881500.535uA minimum for stability. Con-
VCORE1.411.501.592000.215uA minimum for stability.
VAUX11.745
2.91
VAUX22.702.782.86700.515uA minimum for stability.
VAUX32.702.782.86100.515uA minimum for stability.
VSIM1.745
2.91
VR1A/B4.604.754.9010-4Disabled in Sleep mode. The max-
1.80
3.0
1.80
3.00
1.855
3.09
1.855
3.09
500.51Voltage level is set by MCUSW.
250.5-5uA minimum for stability.
Sleep
Max
Filter Comment
Controlled by the UEME. Disabled
in Sleep mode.
trolled by the UEME.
trolled by the UEME.
MCUSW is setting the voltage.
imum current is for 1 regulator
active. If both are used, maximum 5mA each.
VR22.70
(2.61)
VR32.702.782.8620-4100uA minimum for stability.
VR42.702.782.86500.16100uA minimum for stability.
VR52.702.782.86500.17100uA minimum for stability.
VR62.702.782.86500.17100uA minimum for stability.
VR72.702.782.8645-7100uA minimum for stability.
2.78
(2.78)
2.86
(2.95)
100-5100uA minimum for stability.
Active during (Sleepmode).
Controlled by the UEME.
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Power Distribution
The connection of the miscellaneous power connection can be seen in the following
overview.
•DSP Co-processors (DCT and Motion Estimator) on both DSP
•Corona EDGE hardware accelerator
•Serial flash interface (SFI001)
•2G Body logic, as in UPP-WD2
•4Mb of pdram.
•Traffic controller for memory interface (dct4 flash/sram, sdram)
•General purpose USARTs
•SIM card interface
•2nd SIM interface (used for MMC)
2
C interface (used for FCI)
•I
•GSM coder
•Interface control for: keyboard, LCD, Camera, audio and UEME control
•Accessory interfaces: IrDa and LPRF (Bluetooth)
•Handling of RF-BB interface
•I/O voltage = 1.8V, Core voltage = 1.5V
•TI 15C035 process (Tiku version 1.11)
•288 pins uBGA, 0.5mm pitch, 12 mm x 12 mm package (Tiku version 1.11)
The Brain consists of 5 sections; the ARM925 Mega-Module, (consisting of the ARM9
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MCU, Cache memory, Parallel LCD Controller, and Traffic Controller), C-DSP Lead 3
Mega-Module, A-DSP Lead 3 Mega-Module, PDRAM, and PDA Peripherals.
The ARM-Mega-Module has a Traffic controller, which provides the interface between
the MCU, external memories, LCD controller, and internal busses. It also processes the
data packages for memory access.
The PDA Peripherals consists of Camera Compact Port (CCP) interface, Multi-Media Card
(MMC), IR, USB, and Display interfaces.
Memory Block
For the MCU, TIKU includes ROM, 2 kbytes, that is used mainly for boot code of MCU.
For the program memory, 4Mbit (256K x 16bit, organized as 8 banks of 64Kb) PDRAM is
integrated. RAM is mainly for MCU purposes. The MCU can also store a code into the
external flash memory, which consist of one NOR flash and one NAND flash. The size of
the NOR flash is 128Mbit (8Mbit x16bit) and it’s used for primary application code. The
secondary flash is a NAND flash, which is used for slow accessible data such as user-settings, pictures, ringtones etc. (non speed dependent code). The size of the NAND flash is
64Mbit (4096K x 16 bit).
Memory
The external memory interface consists of three different type of memory, used for different purposes.
NOR Flash
The NOR flash is used as the primary data storage. Here the MCU sw package is stored.
Furthermore, the memory is capable of handling burst mode (multiplexed address/databus) and memory blocking, which is controlled by TIKU.
NAND Flash
The NAND flash is used as the secondary data storage, mainly used for user specific data
like sounds, games, pictures and other applications. This device also stores language
package.
SDRAM
The SDRAM is used as a data handling memory.
The SDRAM interface to TIKU is different than the 24 lines multiplexed data/address bus
used for the flash memory. First the address is set up then the data is latched out in a
normal asynchronous/synchronous way. In the synchronous mode, the data is clocked
out at a maximum frequency at 133MHz.
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Charging
The RH-12/RH-28 program is conform to the global NMP Charger Interface.
This comprehensive interface ensures future proofing should new chargers become available.
Charging is controlled by the UEME and external components are needed for EMC,
reverse polarity and transient protection of the input to the baseband module. The
charger connection is through the system connector interface. The DCT4.5 baseband is
designed to support DCT3 chargers from an electrical point of view. Both 2- and 3-wire
type chargers are supported. 3-wire chargers are treated as 2-wire (PopPortTM specifications).
The operation of the charging circuit has been specified in such a way as to limit the
power dissipation across the charge switch and to ensure safe operation in all modes.
Figure 2: Charging
CHARGER
Filter
cap.
VBATBB
TRANSCEIVER
10nF
1uF
0R22
VCHAROUT
VBATREGS
Charger
CHACON
UEME
Section
VCHARIN
Feedthrough cap
27pF
SMF16A
GNDGNDGND
GND
GND
1,5A
1uF
GND
Connecting a charger creates voltage on VCHAR input. When VCHAR input’s voltage
level is detected to rise above the VCHDET+ threshold by CHACON, the charging starts.
The VCHARDET signal is generated to indicate the presence of the charger. However,
detection output signal must be gated always to a logical ‘0’ when MSTRX=‘0’, in order
not to force logical high level to the UEME’s internal blocks that are not supplied at the
time. Level crossing detection of the VCHAR line is used to generate synchronizing pulses
for UEME’s state machine for control of rectifier type chargers. The VCHARDET output
gives a logical ‘1’ when the VCHAR input is detected to be above the VCHDET+ level and
‘0’ when the VCHAR input level is below VCHDET.
Figure 3: Detection of charger / generation of charger synchronisation pulses
GND
1000uF
max
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In case the main battery is fully discharged and the UEME subsequently is without
power, i.e. in NO_SUPPLY or BACKUP mode, the start-up charging circuitry is in control,
giving the possibility to detect a charger and engage charging. If the VBAT level is
detected to be lower than the master reset voltage (VMSTR-) the CHACON will charge
the battery with a constant current of 100 mA until VBAT exceeds VMSTR+. When this
happens, from a charging point of view, normal PWM charging situation resumes. A
PWM signal is generated by the digital part of the UEME, which sources the CHACON.
The frequency of the signal can be either 1 Hz or 32 Hz. If the connected charger is of a
2-wire kind, e.g. ACP- 7, the PWM signal has the frequency of 1 Hz. If the charger on the
other hand is a 3-wire type, e.g. ACP-9, the switch is left on permanently and the 32 Hz
PWM control signal routed to the charger in order to produce a constant voltage.
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Battery
Type: BL-5C
Technology: Li-Ion. 4.2V charging. 3.1V cut-off
Capacity: 850 mA/h (BSI=75K)
The battery is a Li Ion based standard cell with LiMnO chemistry.
This type of battery has a three-pin connector (BTEMP is not used).
Figure 4: BL-5C Battery
Table 3: BSI Levels BL-5C Battery
ModeBSI (kOhm /Description
MinTypeMax
Normal75Used for calculating the Capacity (BL5-C = 850mA)
Service3.23.33.4Pull-down resistor in battery. Used for fast power-up in pro-
duction (LOCAL mode), R/D purposes or in aftersales, 1% tolerance resistors shall be used.
Test6.76.86.9Pull-down resistor in battery, used in production for testing
purposes. 1% tolerance resistors shall be used.
Banned<3.2
Inside the battery, an over-temperature and an over-voltage protection circuit are implemented.
Care should be taken with the temperature. If the battery is charged above 60 degrees
Celsius, overheating might occur.
Interfaces
FM-Radio
The FM radio circuitry is implemented using a highly integrated radio IC, TEA5767HN.
The MCU SW controls the FM radio circuitry through serial bus interface.
The stereo output is fed to the UEME on one of the microphone inputs.
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The antenna of the FM Radio is created with the headset. The wires of the headset are
used as poles of the antenna.
Only version TEA5767HN-VF1 and newer can be used. The previous versions have a 2.78V
digital interface and need level shifters.
While W/R (WRITE/READ) is HIGH the TIKU can transmit data to the TEA5767. At the rising edge of the Bus clock, the register shifts and accepts the stable bit. At clock low the
TIKU writes the following bit. A tuning function is started when the W/R signal changes
from HIGH to LOW. Was a search tuning requested sent, the IC autonomously starts
searching the FM band. Search direction and search stop level can be chosen. Was a station with a fieldstrength equal or higher than this stop level found, the tuning system
stops and the Found Flag bit is set to “HIGH”. Was during search a band limit reached,
the tuning system stops at the band limit and the Band Limit flag bit is set to high. Also
the Found Flag is set to high in this case.
While Write/Read is “LOW” the Tiku EDGE can read data. At the rising edge of the BUS
Clock, data will be shifted out of the register. This data is available from the point where
the bus clock is HIGH until the next rising edge of the clock occurs.
Interface to Engine
GENIO8
GPIO22
GPIO24
GPIO25
FMCtrlDa
FMCtrlClk
FMWrEn
FMClk
VIO
GND
Figure 5: FM Radio schematic
TEA5767
SDA
SCL
W/R
Clk
VAFL
VAFR
Ant
VDIG
GND
UEMETIKU
Filter
L1
VFLASH1
1U
MIC3NR
MIC3PR
MIC3N
MIC3P
C1
C2
C3
C4
1
14
Tomahawk
IrDA
The RH-12/RH-28 phone supports data connectivity via the Infra Red link. The IR interface is integrated into the TIKU and the main external component is the IR module. The
datarate supported will be 1.152Mbit.
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Interface to Engine
This interface receives data from and transmits data to peripheral equipment. It transforms serial data to parallel data for the MCU or DSP and vice versa. The IAccIF IR interface is divided into two blocks, MIR and FIR.IR is a UART-based block for baud rates in
the range 9600 bit/s to 115.2 kbit/s,and FIR is for the 1.152 Mbit/s rate. Both parts have
the same physical connections so they cannot be used simultaneously. The shut down pin
SD can power off the module.
The maximum distance in the RH-12/RH-28 phone configuration is approximately 20
centimetres.
The SIR block (9600 bit/s to 115.2 kbit/s):
•Supports IrDA format with speeds up to 115.2 kbit/s
•Supports Phonet format, having all the same baud rates (9600 bit/s – 115.2kbit/s)
as Fbus.
The FIR block (1.152 Mbit/s):
•Supports IrDA format with baud rate 1.152 Mbit/s.
•Both these blocks are sub-divided into IR transmitter and IR receiver. Interconnection details are shown in the following figure and table.
Figure 6: IRDA Interconnections between Tiku and UEME
UEME
VIO
VFLASH1
Tiku EDGE
IRSD(GenIO23)
IrRx (GPIO 0)
IrTx (GPIO 1)
VBATT
IR Module
LEDA
V
LOGIC
Vdd
LEDC
GND
SD
RxD
TxD
Table 4: IRDA connections between Tiku EDGE and the IR module
NameI/OEngine connectionDescription
TXDOTIKUGPIO1: [IRTx]Transmitted data output to IR Module
RXDITIKUGPIO0: [IRRx]Received data input from IR Module.
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SDOTIKUGenIO23: [IRSD] IR Module shut down.
VLOGICOUEMEVIOSupply voltage for digital parts, 1.8 V.
VCCOUEMEVFLASH1IR Module supply voltage, 2.78 V.
LEDAOVBATTIR LED Anode supply voltage.
Camera
The RH-12/RH-28 phone is equipped with a VGA resolution camera with an active area
of 660H x 492V. Pictures delivered to engine are standard VGA (640 x 480). This camera
is able to transfer up to 30 frames per second in the viewfinder mode and 15 frames per
second in full resolution mode (VGA). Full resolution pictures are in RGB 5:6:5 or YUV
4:2:2 (10 bits raw sensor resolution). The camera used is a Mirage-1 TCM8100MD module.
Mounting
The camera is placed physically almost inside the antenna on the backside of the phone
PWB. The camera fixture (spring type, see the figure below) is located between the RF
shielding cans. Shielding is done in a combination of metalized plastic housing of the
camera module and ground connected spring/clip fixture.
Experience shows that good shielding is necessary. The metalized housing and the spring/
clip will shield the camera. The hole for the lens is kept as small as possible to avoid
direct EMC entrance into camera module by lens opening.
Interface to Engine
The camera is connected to the TIKU via a dedicated differential camera bus called CCP.
The control of the camera is routed through normal-type general I/O ports. The camera
uses 2 different supplies; analog and digital supply.
Spring/clip fixture
Figure 7: Camera Module Mounting
Lens
Camera module
(metalized plastic)
Camera connector
CMOS
sensor
Springs
PWB
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Figure 8: Camera Interface
CameraTIKU
100R
100R
4k7
C1
CIFDaP
E4
CIFDaN
D2
CIFClkP
F4
CIFClkN
L
GenIO26 (SDA (I2C) CAM)
4
L
GenIO25 (SCI (I2C) CAM)
7
K3
GenIO24 CAMClk)
L
GenIO27 CAMVCtrl)
3
CCPDATAP
CCPDATAN
CCPCLKP
CCPCLKN
SDA
SCL
EXTCLK
XSHUTDOWN
1
3
1
2
1
0
9
7
6
5
4
VIO
CCP(0)
CCP(1)
CCP(2)
CCP(3)
4k74k7
3p3
1
DGND
VDIG
DGND
VANA
AGND
SHIELD
4
1
1
8
3
2
100n100n
1
600R/100MHz
600/100MHz
1
VCORE
3
1
VFLASH1
3
27p27p
Power supply to the camera module doesn't need to be shut down when the camera is in
the idle mode. The camera uses very low stand-by current (1 mA in current spec).
UEME
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SIM
The UEME contains the SIM interface logic level shifting. The SIM interface can be programmed to support 3V and 1.8V SIMs.
The SIM interface is powered up when the SIMCardDet signal indicates, ”card in”. This
signal is derived from the BSI signal.
Interface to Engine
Figure 9: TIKU/UEME SIM Interface Connections
SIM
C5C6C7
C1C2C3
C8
C4
From Battery
type contact
UEME
SIMIF Block
SIMData
SIMClk
SIMRst
VSIM
BSI
GNDGND
Data
SIMClk
SIMIO
UEME Dig.
Logic
Tiku
Data
SIMClk
SIMIO
UIF Block
UEMInt
CBusDa
CBusEnX
CBusClk
The internal clock frequency from the CTSI Block is 13 MHz in GSM.
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Figure 10: SIM Interface Data
MMC
The RH-12/RH-28 phone is equipped with a standard MMC card connector. The MMC
card is physically placed under the battery, on top of the BB shielding can. The MMC card
can be replaced when the phone is powered off, and the b-cover and battery are
removed. The RH-12/RH-28 phone is able to accept all known high and dual voltage
types of MMC cards. Only limitation is a maximum current withdrawal of 150 mA, where
the maximum current class of MMC cards is 200mA.
Table 5: VMMC power specifications
NameVoltage (V)Current (mA)Filter Comment
MinNomMaxMax
VMMC2.762.852.941501
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Mounting
The MMC card is mounted as shown in the figure below, seen from the backside of the
phone, with the b-cover and battery removed. The MMC card slides in from the right
side.
Figure 11: MMC Card Placement
Interface to Engine
The MMC card is connected to the engine at UEME. MMC uses the dedicated MMC/secondary SIM (SWIM) card interface.
As it can be seen in the figure below, the MMC card uses an external regulator VMMC
as supply.
Tiku EDGE
GPIO15
GPIO17
GPIO19
GPIO16
GPIO18
Figure 12: MMC Card Engine Interface
UEME
GEN18i01
GEN18i02
GEN18i03
GEN18i04
GEN18i05
GENIO28i01
GENIO28i02
GENIO28i03
Level shifters
LDO
Voltage
regulator
2,85V
MMC Clock
MMC Cmd
MMC Data
MMC Card
Bluetooth
The Bluetooth solution for the RH-12/RH-28 phone is a single chip solution designed by
CSR.
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Interface to Engine
Figure 13: BT HW Interface
Vbatt (3 - 5,4V)
2,8V LDO
PURX
ENABLE
BB 4.5
Power Management
The external BT regulator is enabled by PURX, witch is an internal UEME reset signal. This
signal is high whenever the phone is powered on, which also is the case in sleep.
This means that the BC02 module power is always on. Due to this, the modules use sw
power down, witch results in a constant current consumption of approx. 100µA, when
the BC02 module is in sleep.
Host and Bluetooth module interface can be logically divided into audio, user data and
control interfaces.
User audio at 8 ksamples/s is exchanged between the host and the Bluetooth module on
a PCM connection. (Optionally, the audio data can be multiplexed on a logical UART
channel).
Accessorey Interface (ACI)
ACI (Accessory Control Interface) is a point-to-point, Master-Slave, bi-directional serial
bus. ACI supports the following features:
•The identification of accessory type is provided
•The insertion and removal detection of an accessory device
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•Providing power to the accessory: 200mW Power out
•Reference voltage to the accessory
The insertion / removal detection is provided by the HeadInt input.
Figure 14: ACI schematics
Phone Board
Tomahawk
ACI Accessory
Cbypass
GND
Ccom
56K
GND
GND
ACI ASIC
Authentication
Comm.
Logic
RC
Clock
EEPROM
I/O
Logic
GND
TIKU
ARM
IRQ
FIQ
CBUS
PUP
ACI BlockRX
UEME
HeadInt
Comp.
TX
Level
Shifter
Vhead
VAUX2
Vflash1
VFLASH1
HEADINT
VOUT
120k
ACI
GND
GND
The Vout pin on the PopPortTM provides external power to accessories. The Vout is supplied by VAUX2 and can be controlled by the UEME. VAUX2 is short circuit protected.
Table 6: Vout specifications
Voltage (V)Current (mA)
Name
MinNomMaxMax
Sleep
Max
VAUX22.702.782.86700.51
FBUS
More intelligent accessories can use the serial FBUS connection.
These devices can use Vout as the power supply and ACI for identification.
FBUS is an asynchronous data bus having separate TX and RX signals. Default bit rate of
the bus is 115.2 Kbit/s. FBUS is mainly used for controlling the phone in the production
and for interface to PC via serial cables. Tiku can also support fast bus. This is FBUS with
a bitrate of 1.2Mbit.
Filter Comment
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Fbus is using the same pins as the USB connection.
Table 7: Fbus signals
Voltage (V)
NameName
MinNomMax
FBUS RXVIH1.952.783.000.7*VFLASH1
VIL00.200.830.3*VFLASH1
FBUS TXVOH1.952.783.000.7*VFLASH1
VOL00.200.830.3*VFLASH1
Rise Time12.5nsFor Rx and Tx signals
Comment
USB
The Nokia USB device solution is supported using the Wireless 2 Function Controller
(W2FC) core. This core is included in the TIKU ASIC. The core completes several USB functions automatically and is controlled by the ARM9 MCU.
NUT provides the interface between the ASIC's 1.8 V bus and the 3.3 V USB bus. In addition, NUT is capable of transmitting and receiving Fbus signals to and from the Fbus
UART in Tiku.
Nokia USB Transceiver (NUT) is fully compliant with the Universal Serial Bus Specification Rev. 1.1.
NUT is able to transmit and receive serial data at full-speed (12 Mbit/s).
The USB signal ESD protection and line matching resistance, and USB pull-up resistor is
included to the USB ASIP. This component also includes ESD protection for VOUT and ACI
system connector pins.
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Figure 15: USB Circuit
UI Interface
Display Unit
Hardware Interface:
The Display Unit interface is a parallel interface consisting of the following:
A 24-pin connector as shown in the figure below provides the interface between the Display Unit and the Engine PWB.
Internally, the TIKU DIF block has interfaces with the VIA bus and the secondary DMA
controller.
Interconnection details are shown in the figure below.
•8-bit data bus (DISPDATA(7:0))
•Write enable WRX
•Read enable RDX
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Figure 16: Display Unit Connections
Tiku
UEME
LED Drivers
DIFDa[7:0]
Display Unit
WRX
RDX
A0
TE
RESETX
VIO
VFLASH1
P_S
VLED1+
VLED2+
VLED3+
VLED-
CSX
GND
GND
GND
GND
Keyboard and Navigator
The RH-12/RH-28 phone consists of a mainboard with interface to the UI board. The
connection between the main board and the UI board is via a board-to-board connector.
The signals on the board-to-board connector are:
•Signals for LED's
•Signals for numeric Keypad and navigation key
The UI board is the base for the keyboard, which includes a five-way navigation key.
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Figure 17: Keyboard layout with special keys for Navi_Up, Navi_Down and Navi_Select
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Table 8: Keyboard allocation Tiku GPIO
Keypad matrix and
Navigation key
Navigation
Key
KeypadColumn 0TikuGPIO 2Tiku, Keyboard interface KDI in the UIF block,
LeftTiku-Separate controllines (Special keys) for
UpGPIO 6
Right-
DownGPIO 7
SelectGPIO 13
GND-
Column 1GPIO 3
Column 2GPIO 4
Column 3GPIO 5
Row 0GPIO 8
Row 1GPIO 9
Row 2GPIO 10
Tiku connectionDescription
Navi_Up, Navi_Down and Navi_Select.
Navi_Left and Navi_Right are connected to the
keyboard matrix
Multiple-keypress:
The RH-12/RH-28 phone will implement multiple keypress. By multiple keypress we
mean the ability to detect that the user has pressed several keys simultaneously. The
incitement for implementing this functionality is mainly the support for Java and the
requirements set by games.
UI software is capable of supporting multiple keypress, while core SW will have to incorporate this feature into the keyboard driver.
With the current implementation, the design supports 2 simultaneously arbitrarily
pressed keys in the keyboard matrix, together with any combination of Navi_Up,
Navi_Select and Navi_Down (The special keys).
LED Driver
The RH-12/RH-28 phone UI module has 2 sets of LED's:
Row 3GPIO 11
Row 4GPIO 12
•3 pcs. for LCD – LED: White
•2 pcs. for Keyboard (prepared for 4) – LED: White, sidefiring
Both groups are individual controllable by the PWM output signal from UEME ASICs
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Figure 18: . LED driver block
Vbat
Vibra
Dlight
UEME
TK11851L
LCD
Keypad
configuration
is optional
Intensity Control:
LEDs are controlled by the PWM output from UEME UI block. The PWM controls can be
adjusted in 8-bit step (256). The TK11851L contains a sleep mode. This mode is achieved
when the Dlight signal is low.
A vibra-alerting device is used to generate a vibration signal for an incoming call. The
vibra is placed in the top of the phone. It is placed in the D-cover next to the microphone.
The vibra is electrically connected to the PWB by spring contacts.
The vibra is controlled from the UEME by a PWM (Pulse Wide Modulated) square wave
signal.
IHF-speaker
Alerting tones and/or melodies are generated by an Internal HandsFree speaker, which is
controlled by a PWM signal from the UEME.
The ringer melodies will be optimised in MCU so the main frequency of any given melody
is shifted to near the resonant peak. Sound hole is placed in the D-cover The IHF is electrically connected to the PWB by spring contacts.
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RF Interface
The interface between baseband and the RF section is shown below:
RH-12/RH-28 has adopted the two-row test pattern layout. The basic test pads
(FBUS_TX, FBUS_RX, VPP, MBUS & GND) have a defined location, while optional signals
can be on either side of the test pads. The ‘DAI_CLK’ is included as an optional signal.
For specific test pad placement, please see the figure below.
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Figure 20: Production Test Pattern
1: TXD / FBUS_Tx
2: RXD / FBUS_Rx
123
456
3: DAI_CLK
4: VPP
5: SCK / MBUS
6: GND
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Test Points
See the following two figures for an indication as to where some of the test points can
be found.
Main board A side of PWB
STJRxD
GENTEST0/STJTxD
J471
VBAT
J473
J470
SDRCKE
J402
SDRAd0
SDRDa0
J416
J417
GENTEST1/STJClk
EMU1
EMU0
J488
J487
JTD0
J483
JClk_rst
J484
JTRst
J485
J481
J489
GND
J482
JTDI
VCC
JTMS
J480
JTClk
J486
J472
J474
GND
DBusClk
DBusEn1X
J410
J407
SleepX
J403
DBusDa
MMICS0X
J420
MMIDa0
CBusEnX
CBusClk
J412
CBusDa
J413
UEMInt
PURX
J408
J404
J411
J414
SleepClk
J401
J418
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Main board B side of PWB
J306
IHF1
J307
IHF0
VBAT
J100
J101
BSI
FMCtrlDa
FMWrEn
USBRxP
J110
USB6Z
USBRx
J108
USBRxM
J107
J109
Vpu
USBSuspend
J113
J104
D+/RXD
D-/TXD
USBTx
USBSE
J111
J112
J106
J105
FCI Int
J318
FCI sda
FCI scl
J317
J316
J356
J358
FMCtrlClk
FMClk
J359
J357
FCI supply
J315
J319
GND
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RF Module Introduction
The RF module performs the necessary high frequency operations of the EGSM900/
GSM1800/GSM1900 triple band (EDGE) engine in the RH-12/RH-28 product. The
EGSM900 is rematched to GSM850 in the RH-28 product.
Both, the transmitter and receiver have been implemented by using direct conversion
architecture, which means that the modulator and demodulator operate at the channel
frequency.
The core of the RF is an application-specific integrated circuit, Helgo. Another core component is a power amplifier module, which includes two amplifier chains, one for
GSM850/EGSM900 and the other for GSM1800/GSM1900.
Other key components include:
•26 MHz VCTCXO for frequency reference
•3296-3980 MHz SHF VCO (super high frequency voltage controlled oscillator)
•front end module comprising a RX/TX switch and two RF bandpass SAW filters
•three additional SAW filters
The control information for the RF is coming from the baseband section of the engine
through a serial bus, referred later on as RFBus. This serial bus is used to pass the information about the frequency band, mode of operation, and synthesizer channel for the RF.
In addition, exact timing information and receiver gain settings are transferred through
the RFBus. Physically, the bus is located between the baseband ASIC called UPP and
Helgo. Using the information obtained from UPP, Helgo controls itself to the required
mode of operation and further sends control signals to the front end and power amplifier
modules. In addition to the RFBus, there are still other interface signals for the power
control loop and VCTCXO control and for the modulated waveforms.
The RF circuitry is located on the top side of the 8 layer PWB.
EMC leakage is prevented by using a metal cans. The RF circuits are separated to three
blocks:
•FM radio
•PA, front end module, LNA and 1900 band SAWs
•Helgo RF IC, VCO, VCTCXO, baluns and balanced filters
The RF transmission lines constitute of striplines and microstriplines after PA.
The baseband circuitry is located on the one side of the board, which is shielded with a
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meallized frame and ground plane of the UI-board.
RF Frequency Plan
RF frequency plan is shown below. The VCO operates at the channel frequency multiplied
by two or four, depending on the frequency band of operation. This means that the baseband-modulated signals are directly converted up to the transmission frequency and the
received RF signals directly down to the baseband frequency.
Figure 21: RF Frequency Plan
DC Characteristics
Regulators
The transceiver baseband section has a multi-function analog ASIC, UEM, which contains
among other functions six pieces of 2.78 V linear regulators and a 4.8 V switching regulator.
All regulators can be controlled individually by the 2.78 V logic directly or through a control register.
The use of the regulators can be seen in the power distribution diagram, which is presented in the Figure Power Distribution Diagram below.
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The seven regulators are named VR1 to VR7. VrefRF01 and VrefRF02 are used as the reference voltages for the Helgo, VrefRF01 (1.35V) for the bias reference and VrefRF02
(1.35V) for the RX ADC (analog-to-digital converter) reference.
The regulators (except for VR7) are connected to the Helgo. Different modes of operation
can be selected inside the Helgo according to the control information coming through
the RFBus.
Table 9: List of the needed supply voltages
Volt. SourceLoad
VR1PLL charge pump (4.8 V)
VR2TX modulators, VPECTRL3s (ALC), driver
VR3VCTCXO, synthesizer digital parts
VR4Helgo pre-amps, mixers, DtoS
VR5dividers, LO-buffers, prescaler
VR6LNAs, Helgo baseband (Vdd_bb)
VR7VCO
VrefRF01ref. Voltage for Helgo
VrefRF02ref. Voltage for Helgo
VbattPA
Typical Current Consumption
The table below shows the typical current consumption in different operation modes.
Table 10: Typical current consumption in different operation modes
EGSM900: 3700...3840 MHz (4 x RX freq)
GSM1800: 3610...3760 MHz (2 x RX freq)
GSM1900: 3860...3980 MHz (2 x RX freq)
86 dB
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RF Block Diagram
The block diagram of the RF module can be seen in the following figure. The detailed
functional description is given in the following sections.
Figure 23: RF Block Diagram
HELGO
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Frequency Synthesizers
The VCO frequency is locked by a PLL (phase locked loop) into a stable frequency source
given by a VCTCXO, which is running at 26 MHz. The frequency of the VCTCXO is in turn
locked into the frequency of the base station with the help of an AFC voltage, which is
generated in UEM by an 11 bit D/A converter. The PLL is located in Helgo and it is controlled through the RFBus.
The required frequency dividers for modulator and demodulator mixers are integrated in
Helgo.
The loop filter filters out the comparison pulses of the phase detector and generates a DC
control voltage to the VCO. The loop filter determines the step response of the PLL (settling time) and contributes to the stability of the loop.
The frequency synthesizer is integrated in Helgo except for the VCTCXO, VCO, and the
loop filter.
Receiver
Each receiver path is a direct conversion linear receiver. From the antenna the received
RF signal is fed to a front-end module where a diplexer first divides the signal to two
separate paths according to the band of operation: either lower, GSM850/EGSM900 or
upper, GSM1800/GSM1900 path.
Most of the receiver circuitry is included in Helgo.
Transmitter
The transmitter consists of two final frequency IQ-modulators and power amplifiers, for
the lower and upper bands separately, and a power control loop. The IQ-modulators are
integrated in Helgo, as well as the operational amplifiers of the power control loop. The
two power amplifiers are located in a single module with power detector. In the GMSK
mode the power is controlled by adjusting the DC bias levels of the power amplifiers.
Front End
The front end features include:
•Antenna 50 ohm input
•RX GSM850/EGSM900 balanced output
•RX GSM1800 balanced output
•RX GSM1900 single ended output
•TX GSM850/GSM900 single ended 50 ohm input
•TX GSM1800/GSM1900 single ended 50 ohm input
•3 control lines from the Helgo
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Figure 24: Front End
Power Amplifier
The power amplifier features include:
•50 ohm input and output, GSM850/EGSM900 and GSM1800/GSM1900
•Internal power detector
•GMSK and EDGE mode
Figure 25: Power Amplifier
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RF ASIC Helgo
The RF ASIC features include
•Package uBGA108
•Balanced I/Q demodulator and balanced I/Q modulator
•Power control operational amplifier, acts as an error amplifier
•The signal from VCO is balanced, frequencies 3296 to 3980 MHz
•Low noise amplifiers (LNAs) for GSM850/EGSM900 and GSM1800 are integrated
The Helgo can be tested by test points only.
AFC function
AFC is used to lock the transceiver’s clock to the frequency of the base station.
Antenna
The antenna for RH-12/RH-28 is a triple band antenna.
Two versions:
•RH-12 GSM900/GSM1800/GSM1900
•RH-28 GSM850/GSM1800/GSM1900
Antenna concept: Flex print on substrate covered with decorated label
The antenna also works as cover for the IHF-speaker (Internal Handsfree Speaker). The
IHF sound chamber and the camera are sealed with a rubber gasket (part of the
antenna).
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