LCDReset
Reserved SDRAM AD13
AVVideoCTRL
SDRAMxCS2
MMCDaDir1-3
25
10
53
54
22
78
9
70
69
11
75
3
52
4
76
50
82
12
74
5
8
77
73
79
80
15
6
83
13
0
0201
I2C PULL UP RESISTORS VIO
3k3 R2853
VIO
R28523k3
11
49
7
84
72
31
32
37
14
39
81
2
47
48
82
84
85
83
20
85
68
14
6
8
7
Place near RAPU
47R
R2856
genio72
genio39
DigiMICClk
DigiMIC_Data
HACPAEn
1
2
3
0
AUDIOTEST(5:0)
CLK
FrameSync
DOUT
DIN
genio82
genio83
genio84
genio85
12
genio25 MMCCardDet
MMC(15:0)
16
15
SDRAMCTRL(17:0)
SDRAMxCS2
SDRCKE2
genio6
genio34
Not use if I2C is in use
Not use if I2C is in use
Not use if I2C is in use
Not use if I2C is in use
Not use if I2C is in use
11
15
7
12
13
10
1
2
6
9
8
4
3
5
0
CBUSENX_IN
BUSMODE
SLEEPCLK
FM_AUDIO_PR
FM_AUDIO_NR
FM_AUDIO_PL
FM_AUDIO_NL
I2SMOSI
I2SMISO
I2SSCLK
I2SWS
SleepClk
I2C2SDA
I2C2SCL
ReferenceClkSysClk192
FMRADIO(20:0)
I2C2SDA
I2C2SCL
FMIRQgenio23
1
0
ACI(7:0)
ACIRX
ACITX
genio31
genio32
0
1
4
5
2
3
I2C2SDA
I2C2SCL
AV(5:0)
ConnDet
AVPAEn
BufferSleep
AVVideoCTRL
genio37
genio14
11
10
15
9
8
14
20
13
12
TCLKretRXDa0
ETM(20:0)
ETMDa8
ETMDa9
ETMDa10
ETMDa11
ETMDa12
ETMDa13
ETMDa14
ETMDa15
2
3
1
Emint0
BootModeSel
LDOPowerDown
LCD_CS
WRX
LCD_TE
LCD_RESX
MESSI5
MESSI6
MESSI7
MESSI8
RDX
LCD_D/CX
ROW4
ROW5
ROW4
ROW5
MESSI4
11
MESSI3
ROW1
MESSI1
MESSI2
ROW1
19
4
0
0
9
4
2
17
14
24
20
5
8
9
13
0
12
10
28
6
1
23
8
10
13
8
13
1
2
18
12
7
12
3
15
14
6
5
15
4
14
7
20
22
1
2
25
26
3
11
27
11
16
17
18
10
3
19
7
15
6
21
16
29
21
9
5
30
LCD(99:0)
genio26genio26
genio35genio35
genio24genio24
genio61genio61
genio60genio60
genio59genio59
genio58genio58
genio62genio62
ROW6
COL0
ExpanderInt
DISPCDataLCD5
DISPCDataLCD6
DISPCDataLCD7
DISPCDataLCD16
DISPCPCLK
DISPCHSYNC
DISPCVSYNC
DISPCACBIAS
COL5
VISSI(27:0)
DISPCDataLCD0
DISPCDataLCD1
DISPCDataLCD2
DISPCDataLCD3
DISPCDataLCD4
LCDResetgenio9
KEYB(15:0)
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
COL1
COL2
COL3
COL4
20
7
Near RAPU
0
47R
R2857
2
8
4
9
21
BTH_CLK_REQ
5
10
3
6
11
22
1
HostWakeUp
PURX
SleepClk
SleepX
genio20
PURX
SleepClk
SleepX
BT(23:0)
BTCTS
BTRTS
BTUARTIn
BTUARTOut
BTWakeUp
BTH_Clk_Req
BTResetX
BTPCMClk
BTPCMSync
BTPCMIn
BTPCMout
genio85
genio47
genio48
genio49
genio50
genio53
genio54
genio82
genio83
genio84
7
8
9
genio22 FlashINT
FlsCS1X
MEMCONT(9:0)
VPPLock
0201
0201
0201
020111NA
C2850
10p0
9
8
GND
GND
R2854
47R
12
17
10p0
C2851
NA
47R
R2855
19
15
14
20
13
10
16
LedFlashStrobe
TXP
LedFlashInt
genio87
TxMask
"Cam1Clock -> noisy signal "
Cam1Clk
genio1
genio18
genio19
CCP(20:0)
Cam_Reg_1V8
Cam_Reg_2V8
LedFlashEn
2nd_Cam_ShutdownX
I2C0SCLgenio28
genio4343
56
17
16
27
28
86
87
1
18
19
genio56
genio17
Cam_ShutdownXgenio16
I2C0SDAgenio27
"Cam0Clock -> noisy signal "
Cam0Clkgenio86
Out
InIn
Out
4
3
Near RAPU
47R
R2858
7
0
WLAN_CLK_REQ
2
5
6
8
1
genio74
RX2
genio75
genio76
genio77
genio73
SleepClk
"Data -> noisy signal "SPI_MISO
CLK_REQ
SQCLKIP
SPI_CSX
"Data -> noisy signal "SPI_MOSI
WLANENABLE
WLAN_IRQ
WLAN(15:0)
"Clock -> noisy signal "SPI_Clk
16
12
13
USBChargeINTgenio4
USBSyncClk
genio52 ULPICS
9
3
7
10
1
11
5
MMCDaDir3
MMCDaDir2
MMCDaDir0genio69
SDMMCLSSHutDn
MMCCmdDirgenio70
INT_MMC(13:0)
MMCFbClk
MMCDaDir1genio11genio11
genio78
genio79
genio80
genio81
3
6
13
5
4
11
12
10
Mic3Rn
Mic3RP
Mic3LN
Mic3LP
AUDIO(13:0)
LineInLP
LineInLN
LineInRP
LineInRN
0
1
I2C0SCL
genio27
genio28
I2C0(1:0)
I2C0SDA
genio15
GENIO(99:0)
genio0
genio3
genio2
genio5
genio6
genio7
genio8
genio9
genio10
genio11
genio12
genio13
genio14
GND
BASEBAND SHIELD
A2800
040-056208
ASSEMBLY
Bypass for CPU
100n
Bypass for CPU
100n
C2821
/2 100n
VIO
GND
2
VIO
VIO
GNDGND
2
C2811
/2 100n
VIO
GNDGND
GNDGND GND
VIO
C2818
2
GND
/2 100n1
C2818
/2 100n2
C2817
/2 100n
GND
VIO
GND
C2810
2/2 100n1
C2810
/2 100n
1/2 100n
C2820
VIO
VIO
GND
VIO
VIO
VIO
C2816
GND
/2 100n1
GND
C2811
1/2 100n
C28162C2817
1/2 100n/2 100n/2 100n
GND
2
C2814C2814
1/2 100n
VIO
GND
VIOVIO
VIO
VIO
C2820
/2 100n
C2821
1/2 100n2
0201
REMOVE
RAPU 2.0
0201
0
15
17
70
71
72
81
6
4
2
R2805
3k3
6
15
12
13
11
10
3
7
1
2
16
1
33
0
8
1
55
58
8
3
4
12
2
10
25
1
2
R2801
100R
3
2
74
75
76
3
4
86
87
82
0
7
11
10
1
7
4
40
78
79
6
11
3k3
R2804
37
0
6
21
3
5
0
9
2
0
46
41
47
0
1
5
77
6
69
68
2
31
3
29
24
1
35
5
6
60
0
1
61
62
19
4
27
44
45
36
0
5
57
56
1
2
28
4
8
49
50
51
22
3
7
2
0
1
0
20
9
32
VIO
80
4
3
4
5
2
66
67
VIO
4
30
2
3
13
14
65
34
6
7
8
17
9
2
84
14
5
20
63
19
4
0
23
16
7
7
26
DISPC_VSYNC
Y4
Y5
GenIO23
GenIO22
Y6
Y7
DISPC_DATA_LCD7
DISPC_DATA_LCD14
Y8
DISPC_DATA_LCD0
Y9
CBusClk
Y15
Y16
ETMDa7
Y17
ETMDa5
ETMCtrl
Y18
GenIO69
Y19
GenIO75
Y20
Y21
GenIO13
GenIO25
Y3
GenIO46
W21
GenIO5
W22
W3
DISPC_DATA_LCD13
W4
DISPC_DATA_LCD16
GenIO3
Y10
Y11
GenIO0
Y13
CCPStrbP1
Y14
CCPStrbN1
U8
DISPC_DATA_LCD10
DISPC_DATA_LCD15
U9
V20
GenIO39
V21
GenIO37
GenIO74
V22
DISPC_DATA_LCD17
V3
V4
DISPC_DATA_LCD11
W20
GenIO11
I2C2SCL
U16
U17
GenIO1
U20
GenIO65
U21
EarDataR
U22
GenIO71
DISPC_DATA_LCD5
U3
GenIO8
U4
U7
DISPC_DATA_LCD4
GenIO7
T4
T7
GenIO17
GenIO2
U10
U11
GenIO86
GenIO43
U12
U13
CCPStrbN0
U14
CCPStrbP0
I2C2SDA
U15
GenIO18
R7
T13
GenIO87
GenIO31
T17
T20
EarDataL
T21
PMARP
MicData
T22
T23
GenIO12
T3
GenIO26
GenIO33
R17
GenIO9
R2
R20
GenIO47
PMARN
R21
GenIO48
R22
GenIO14
R3
GenIO20
R4
GenIO76
P17
SleepX
P21
P22
AudioClk0
GenIO35
P23
P3
GenIO10
RFBusClk
P4
GenIO82
P7
GenIO16
R1
GenIO38
N17
N20
PURX
GenIO73
N22
N23
GenIO40
RFBusEn1X
N3
RFBusDa
N4
N7
GenIO79
GenIO50
N9
M2
DRXIN
M20
SIMIOCtrl1
M21
SIMIODa1
ULPIData2
M22
M3
DRXIP
GenIO84
M4
GenIO85
M7
N1
GenIO81
L20
SIMClk1
L21
ULPIData4
GenIO60
L22
L23
GenIO6
VREFP
L3
L4
VREFN
L7
GenIO83
GenIO45
M17
GenIO41
K17
K20
ULPIClock
ULPIDir
K21
GenIO57
K23
RXIP
K3
RXQP
K4
K7
DRXQP
GenIO58
L17
GenIO55
J17
J2
RXIN
ULPIData1
J20
J21
ULPIData0
GenIO34
J22
TXQN
J3
J4
RXQN
DRXQN
J7
G7
GenIO78
G9
RX2
GenIO42
H12
H17
GenIO62
H20
ULPIData3
ULPINxt
H21
H3
TXQP
IREF
H4
GenIO36
G15
G17
GenIO56
RFClkN
G2
ULPIStp
G20
G21
GenIO61
G23
GenIO52
RFClkP
G3
TXIN
G4
E4
HissiData0N
ULPIData6
F20
ULPIData5
F21
TXIP
F4
G11
GenIO51
TxCClk
G12
G13
GenIO29
G14
GenIO64
HissiClkP
D3
D4
HissiData0P
D5
HissiData1P
EMU1
D6
SleepClk
D7
E20
ULPIData7
SMPSClk
E21
E22
GenIO59
ExtSysClkReq
D10
D11
GenIO49
D13
GenIO32
D14
TMAct
GenIO27
D15
D16
GenIO28
D19
GenIO53
D20
GenIO54
C14
TxCDa
C2
HissiClkN
HissiData2N
C3
C4
HissiData2P
C5
HissiData1N
C6
EMU0
TXA
C7
C8
RXDa0
GenIO63
B14
RXDATAClk
B2
GenIO67
B21
B6
SysClk384
GenIO68
B9
C1
TXP
C11
GenIO80
GenIO30
C13
AC10
GenIO72
AC16
SysClk192
ETMDa6
AC17
ETMClk
AC18
AC3
DISPC_ACBIAS
GenIO21
AC9
JTDI
B1
B13
GenIO4
ETMDa1
AB18
AB22
GenIO77
AB3
DISPC_DATA_LCD1
DISPC_DATA_LCD6
AB4
DISPC_DATA_LCD9
AB6
AB7
DISPC_DATA_LCD3
AB9
INT0
JTMS
AC1
DISPC_PCLK
AA7
AA8
GenIO15
AA9
DISPC_DATA_LCD2
AB1
JTDO
CCPDaP1
AB14
AB15
CCPDaN1
ETMDa4
AB16
CBusEn1X
AB17
ETMDa2
AA17
ETMDa3
AA18
AA19
ETMDa0
GenIO70
AA21
AA3
DISPC_DATA_LCD12
AA4
GenIO19
DISPC_HSYNC
AA5
DISPC_DATA_LCD8
AA6
A20
RX1
TXReset
A3
TxCDaCtrl
A8
GenIO24
AA10
AA11
GenIO44
AA12
CCPDaP0
CCPDaN0
AA13
AA16
CBusDa
RAPUYAMA_V1.11_PR_RITSA_BGA401
D2800
JTRSTn
A1
GenIO66
A19
A2
JTClk
2
0
52
53
1
9
1
15
16
38
10
48
6
1
42
11
1
54
0
7
39
0
5
6
7
73
3
4
5
64
5
6
1
18
16
17
27R
R2803
100R
R2802
12
8
9
18
59
13
5
GND
1
5
0
85
83
100n
C2841 and C2803 combined to one 0203
0203/1
0402
C2806 and C2807 combined to one 0203
0203/1
0203/2
0203/2
0203/1
Internal LDO
100n
Bypass for CPU
100n
0402
0402
0203/2
Bypass for CPU
100n
Bypass for CPU
GND
Bypass for CPU
0203/2
0203/1
C2826
18p
2
C2825
/2 100n1
C2825
/2 100n
2X100n
/2 100n2
C2806
VCORE
GND
VCORE
100n
C2801
VCORE
GNDGND
VIO
/2 100n2
C2824
VRFC
VIO
GND
C2823
2u2
VIO
VIO
GND
GND
VIO
VIO
GND
C2830
2u2
/2 100n1
C2824
GND
GNDGND
C2806
2X100n
/2 100n1
VRFC
2
2X100n
C2841
/2 100n
VIO
C2800
100n
GND
VRFC
100n
GND
VIO
C2802
VIO
VIO
GND
C2841
2X100n
/2 100n1
GND
VCORE
T8
VDDSTACK
VDD5
T9
U1
VCCQ_POP2
VSS
U2
U23
VSS
VDDS3
V23
VSS
Y12
Y23
VDD_POP12
R16
R8
VDDSRAMOUT
VDD5
R9
VDDS_1_4
T1
VDDRAM
T10
T11
VSS
VDDSTACK
T12
T14
VSS
T15
VDD
VSS
T16
VDDS1
T2
VSS
VSS
P2
VSS
P20
P8
VDD5
P9
VSS
R10
VSS
VDD
R11
R12
VDD
VDD
R13
VDD
R14
R15
VDD
VDD
VDD3
M16
VDDSTACK
M8
M9
VDD5
N15
VDD3
N16
VSS
N2
VDDS_1_1
N21
VDDS8
VDD5
N8
VCCQ_POP1
P1
P15
VSS
P16
VSS
K8
VDDSTACK
VSS
K9
VCC_POP3
L1
VSS
L15
VDD3
L16
L2
VSS
L8
VDD5
L9
VSS
VSSASUB
M1
M15
VDD3
VDD2
VSS
J13
VSS
J14
VDD3
J15
VDD3
J16
J8
VDD4
J9
VDDSTACK
K1
VDD_POP11
VSS
K15
VSS
K16
K2
VSS
K22
H16
VSS
H2
VSS
H22
VSS
H23
VDD_POP10
VDDARX
H7
VSS
H8
H9
VDDA18V1
VDDATX
J1
VDD2
J10
J11
VDDSTACK
J12
VSSATX
G1
VSS
VDDS9
G10
VSS
G16
G8
VSS
VDD_POP13
H1
H10
VSS
VSS
H11
H13
VDDRAM
VDD3
H14
H15
VDD3
VDDS9
VDDS9
D9
E1
VDD_POP9
VSSAPLLStack
E2
VDDS12
E23
E3
VDDAPLLStack
VSSARX
E5
VDDA_ACS
F1
F2
VSSA_ACS
F2
2
VSS
VDD_POP8
F23
F3
C22
VSS
VDD_POP7
C23
VSS
C9
VDDS_1_3
D1
D12
VDDA18V2
D17
VSS
D18
VDDS5
VSS
D21
VSENSE
D22
VDDS12
D23
D8
VSSA
B7
VSS
VSS
B8
C10
VSS
VDDS10
C12
VSS
C15
C16
VSS
C17
VSS
C18
VDDS5
VSS
C19
VSS
C21
VDDS2
AC8
VCC_POP2
B10
VSS
B12
VSS
B15
VSS
B18
VSS
B19
VDDS6
B22
VSS
B23
IFORCE
VDDA
B3
B4
VSS
B5
VSS
AB2
AB5
VSS
AB8
VSS
VPP_POP
AC11
VSSRX2
AC12
AC13
VCC_POP1
VDDS7
AC15
AC4
VSS
AC5
VCCQ_POP4
VDDS2
AC6
AC7
VDD_POP2
A9
VDDS_1_2
VCCQ_POP3
AA1
AA14
VSSRX1
VDDS7
AA15
AA2
VSS
AA20
VSS
AA22
VSS
AA23
VDD_POP12
AB10
VSS
VSS
AB13
VDD_POP4
A13
VSS
A15
VDD_POP5
A16
VDDS6
VDDS6
A17
A18
VDD_POP6
A21
VDDS6
A22
VPP2
VPP1
A23
VDD_POP1
A4
VDDS4
A5
A7
A10
VDD_POP3
A12
14
43
4
SCL2
CCP0_SP
CCP0_DP
CCP0_DN
CCP1_DP
SDA2
CCP1_SN
CCP1_SP
CCP1_DN
Flash_Int
21
CCP0_SN
0
EMInt1
R23
EMINT(3:0)
RFCLK(1:0)
HISSI(8:0)
CCP(20:0)
USB(20:0)
INT_SIM(5:0)
CBUS(3:0)
RFCONV(20:0)
TXC(2:0)
TXP
6
4
2
0
10
8
Y2
SDRAD14
Y22
SDRXCS2
M23
V1
FlsWEX
FlsOEX
V2
FlsADVX
W1
FlsClk
W2
W23
SDRAD13
Y1
CE1MMX
FlsCS0X
AC23
B11
SDRCLKX
B16
NC
SDRLDQS2
B17
B20
SDRUDQS2
NC
C20
D2
SDRLDQS
G22
NC
J23
SDRCKE2
AB23
NC
SDRAM_TEMP_SENSE
AC14
AC19
MMCDa2
AC2
NC
MMCDa3
AC20
MMCDa0
AC21
NC
AC22
NC
SDRCLK
A11
A14
NC
SDRUDQS
A6
FlsRstX
AB11
FlsWaitX
AB12
MMCDa1
AB19
AB20
MMCClk
AB21
MMCCmd
INT_MMC(13:0)
Traceability pad
BB5.44 have defined 6-pin test pad pattern
J2060
1
2
3
4
5
6
R2060
A1
A3
GNDB2
C1
C3
GND
1
4
6
6
5
7
ESDA14V2-4BF3
GND
GND
X2060
JTAG(6:0)
ETM(20:0)
RXD0
RXD1
ACI(7:0)
CLK2
TXD
CLK
GND
IP4302CX2LF
R2061
6
34
30
29z
1
0
I2C1SDA
I2C1SCL
genio29
genio30
I2C1(1:0)
0
2
1
CBusClk
BusDa
CBusEn1X
TXP2
RFCTRL(11:0)
WLAN_Enable
0
5
2
1
RX2
RX1
TXA
TXReset
7
0
3
1
4
6
ExtSysClkReq
SysClk192
PUSL(15:0)
PURX
SleepClk
SleepX
SysClk384
0
1
I2C2SDA
I2C2SCL
I2C2(1:0)
15
16
RXDATAClk
RXDa0
DIG_AUDIO(8:0)
13
14
SDRAd14
SDRAM_AD(15:0)
SDRAd13
8
4
5
0
6
1
2
3
7
I2C0SCL
I2C2SDA
I2C2SCL
ALSINTgenio68
ProxEnable
ProxInt
SENSORS(15:0)
MRInt
AccInt1
I2C0SDA
6
J1100
ALS
Agumon
4
SCL
SDA
5
INT
6
C1100
100n
GND
TSL2563CL
N1100
1
Vdd
2
GND
3
ADR_SEL
ALSINT
I2C2SCL
I2C2SDA
GND
4
5
VAUX2
GND
GND
RC-filter for display EMI.
D5
D3
Data2
VLED1-
VDDI
WRX
LCDTE
RESX
D0
D2
D4
D6
CSX
RESX
TE
D/CX
GND
TE
Data1
WRX
RDX
Data0
CS1 for main display
Data5
3
Data3
Data4
Data6
Data7
D7
GND
VLED2-
LEDOUT
VDD
D1
VLED2+
VLED1+
D/CX
RDX
MAIN DISPLAY (Piccadilly2) connector
EMC
1
16
0
C2457
6p8
100R
0
R2450
GND
GND
C2452
100n
C2455
100n
9
GND
GND
GND
5
2
20
21
22
23
24
GND
3
4
5
6
7
8
1
10
11
12
13
14
15
16
17
18
19
C2454
X2450
27p
VAUX1
L2451
120R/100MHz
7
26
C2453
27p
6
C2456
EMC
6p8
C2451
18p
2
30
GND
VIO
120R/100MHz
L2450
1
27
28
29
4
DISPCACBIASDISPCACBIAS
DISPCDataLCD16
DISPCDataLCD16
DISPCDataLCD2DISPCDataLCD2
DISPCDataLCD1
DISPCDataLCD1
DISPCDataLCD0
DISPCDataLCD0
LED(6:0)
LCDReset
LCDReset
LCD_WRX
SetCurrDS
DISPCPCLK
DISPCHSYNCDISPCHSYNC
DISPCDataLCD6
DISPCDataLCD6
DISPCDataLCD7DISPCDataLCD7
DISPCDataLCD4DISPCDataLCD4
DISPCDataLCD5
DISPCDataLCD5
DISPCDataLCD3
DISPCDataLCD3
DISPCVSYNC
DISPCVSYNC
A2
DM0d
AB16
AB17
GNDB12,H22,K2,K22,AA22=
GND1B4,B7,B10,B15,B18,C22,E2,F22,H2=
GND2L2,P2,U2,AA2,AB5,AB8,AB13=
P1,U1,AA1,AC5=
VCC
A1
NC
A11
CKd
A13
A14
A16
DM1d
A17
A19
NC
AC16
NC
A20
A21
A22
NC
A23
NC
A3
A5
A6
DM2d
A8
A9
AB1
NC
AB10
NC
_RPo
AB11
AB12
RDY0o
NC
AB14
NC
AB15
NC
AC7
NC
AB18
NC
NC
AB19
NC
AB2
AB20
NC
AB21
BA0d
NC
AB22
NC
AB23
INT0o
AB9
AC1
NC
RDY1o
AC10
NC
AC11
AC12
NC
NC
AC14
AC15
NC
NC
NC
B2
AC17
AC18
NC
NC
AC19
NC
AC2
AC20
NC
AC21
BA1d
NC
AC22
AC23
NC
INT1o
AC9
M2
M1
AB4
AC4
AB6
AC6
AB7
E22
N2
N1
R2
R1
T2
T1
AB3
AC3
B1
NC
_CKd
B11
B13
B14
B16
DQS1d
B17
B19
NC
0
B20
DQS0d
B21
NC
B22
B23
NC
B3
B5
B6
DQS2d
B8
B9
DM3d
C1
C2
DQS3d
D1
D2
D22
D23
12
W23
E23
F1
F2
G1
G2
G22
G23
J1
J2
CKEd
J22
NC
J23
_WEd
K23
L22
_CASd
L23
_RASd
M22
_CSd
M23
VCC2L1,AC8,AC13=
N22
N23
P22
P23
R22
R23
T22
T23
U22
U23
V1
_WEo
_OEo
V2
V22
V23
W1
_AVDo
W2
CLKo
W22
VCC3
COMBO 32Mx32 DDR
DDR
128Mx16 M3
43470S2
NAND
DDR
Data I/O
NAND
Ad
D3000
Addr/ Data Bus
K5W2G1GACI-AL60
A12,H23,K1,Y23,AA23=
VCC1A4,A7,A10,A15,A18,C23,E1,F23,H1=
A1
NC
_CE1o
Y1
Y2
_CE0o
NC
Y22
COMBO 32Mx32 DDR
128Mx16 M3
43470S2|NONET
D3000
K5W2G1GACI-AL60
USB(20:0)
Diff Impedance 90Ohm
0201
Pins E4 and E2 must be connected to the battery with separate wires
USB charger
detection to
EM ASIC
C3300
100n
VCC
F3
F4
VBUS
F5
XTAL1
F6
i.c.
GNDGND
D6
STP
E1
CHRG_DET_EN_N
E2
FAULT
REG3V3
E3
DIR
E5
REG1V8
E6
CHRG_DET_POL
F1
F2
CHRG_DET
C2
RREF
CHIP_SEL_N
C3
C4
TEST_N
C6
DATA7
DP
D1
D3
ID
PSW
D4
D5
NXT
DATA5
A6
DATA0
B1
B2
VCC(IO)
CHIP_SEL
B3
B4
CFG1
B5
VCC(IO)B6DATA6
C1
DM
GNDC5,D2,E4=
D3300
ISP1707AET
DATA1
A1
A2
DATA2
A3
DATA3
A4
CLOCK
DATA4
A5
R3367
ERJ2BWFR068X
SENSE
CURRENT 1
23
4
0
5
100n
C3316
VIO
GND
C3322
4u7
C3304
GND
4u7
16
10n
C3310
GND
8
GND
GND
GND
GND
2.0A
F3300
VIO
GND
27p
C3330
NA
GND
D-
D+
ID
GND
GND
A1
A2
B1
B2
X3300
VBUS
Z3300
USBULC6-2F3
GND
GND
VBAT
Vchar
GND
V3301
MAZA062029JN
GND
N3300
IP4387CX4_LF
KA
10u
C3365
GND
C3303
NA
GND
100n
R3348
10k
L3305
1uH
C3312
1u0
J3300
C3314
/2 1u52
C3313
VBUS
GND
C3313
1/2 1u5
4u7
GND
C3301
GND
Z3301
VIO
11
10
9
12
GND
D1
PGND
PGND
D2
PGND
D3
OTG
D4
CSIN
E1
E2
AUXPWR
VREF
E3
E4
CSOUT
B1
PMID
PMID
B2
B3
PMID
SDA
B4
SW
C1
C2
SW
SW
C3
C4
STAT
BQ24151YFFR
N3301
VBUS
A1
A2
VBUS
BOOT
A3
A4
SCL
1k0
GNDGND
R3300
12k
R3302
1
0
7
GND
1
7
6
5
4
3
2
SLOWAD(6:0)
"Charger det."
"Separate wire from R3367 pin1 to N2201 pin E2"
F3B2, B5
100n
C3306
VIO
VBAT
GNDGND
C3307
100n
"Vbus to ISP"
"ID pullup"
NoteDP_clean
NoteDM_clean
Noisy_CLK ULPI_CLK
PUSL(15:0)
I2C2(1:0)
DP_Dirty
DM_dirty
Near to digimic
7
6
VDigiMic
C2116
27p
GND
GND
VDD
5GND
GND
B2100
DSMO-431-5P-25
1
L/R
2
CLK3DATA
4
C2115
100n
J2101
Mic_CLK
Mic_Data
DIG_AUDIO(8:0)
Customer Care / Service Operations / Training and Vendor Development
Condential Copyright © 2007 NOKIA Only for training purposes Version: 1.0 | 26.1.2009 | 5630 | Board version: 2PP_05s | | Page 3(9)