PRELIMINARY PRODUCT INFORMATIONPRELIMINARY DATA SHEET
DATA SHEET
MOS INTEGRATED CIRCUIT
µµµµ
PD70F3040, 70F3040Y
V850/SV1
TM
32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
The µPD70F3040 and µPD70F3040Y are products that substitute flash memory for the mask ROM of the
PD703039, 703040, 703041 and µPD703039Y, 703040Y, 703041Y, respectively. Since the µPD70F3040 and
µ
70F3040Y can be read and written while mounted on the board, these products are ideal for evaluation during
system development, multiple-version small-scale production or quick product release.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
V850/SV1 User’s Manual Hardware: U14462E
V850 Family
FEATURES
Pin compatible with
•
For mass production, these can be replaced by a mask ROM version.
•
PD70F3040 → µPD703039, 703040, 703041
µ
PD70F3040Y → µPD703039Y, 703040Y, 703041Y
µ
PD703039, 703040, 703041, 703039Y, 703040Y, and 703041Y
µ
TM
User’s Manual Architecture: U10243E
ORDERING INFORMATION
Part NumberPackage
PD70F3040GM-UEU
µ
PD70F3040YGM-UEU
µ
DIFFERENCES BETWEEN V850/SV1 PRODUCTS
Internal ROMInternal RAMI2CV
µ
PD70F3040None
µ
PD70F3040Y
µ
PD703039None
µ
PD703039Y
µ
PD703040None
µ
PD703040Y
µ
PD703041None
µ
PD703041Y
The information contained in this document is being issued in advance of the production cycle for the
device. The parameters for the device may change before final production or NEC Corporation, at its own
discretion, may withdraw the device prior to its production.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Connect to VSS in normal operation mode.
SCL0, SCL1, SDA0, and SDA1 are valid only for the µPD70F3040Y.
2.
Preliminary Data Sheet U14622EJ1V0DS00
SS
DD
V
V
P105/RTP05
P106/RTP06
P107/RTP07
P150/RTP10
P151/RTP11
P152/RTP12
P153/RTP13
P154/RTP14
P155/RTP15
µµµµ
PD70F3040, 70F3040Y
PIN IDENTIFICATION
A16 to A21:Address BusP120 to P127:Port 12
AD0 to AD15:Address/Data BusP130 to P137:Port 13
ADTRG:AD Trigger InputP140 to P147:Port 14
ANI0 to ANI15:Analog InputP150 to P157:Port 15
ASCK0, ASCK1:Asynchronous Serial ClockP160 to P167:Port 16
ASTB:Address StrobeP170 to P177:Port 17
AVDD:Analog Power SupplyP180 to P187:Port 18
REF
AV
:Analog Reference VoltageP190 to P197:Port 19
AVSS:Analog GroundPWM0 to PWM3:Pulse Width Modulation
BVDD:Bus Interface Power SupplyRD:Read
BVSS:Bus Interface GroundRESET:Reset
CLKOUT:Clock OutputRTP00 to RTP07,:Real-time Output Port
CLO:Clock Output (divided)RTP10 to RTP17
CSYNCIN:Csync InputRTPTRG0, RTPTRG1: RTP Trigger Input
DSTB:Data StrobeR/W:Read/Write Status
HLDAK:Hold AcknowledgeRXD0, RXD1:Receive Data
HLDRQ:Hold RequestSCK0 to SCK4:Serial Clock
HSOUT0, HSOUT1: Hsync OutputSCL0, SCL1:Serial Clock
INT CP 80 to IN T CP 83 ,: Interrupt Request from PeripheralsSDA0, SDA1:Serial Data
INTCP90 to INTCP93,SI0 to SI4:Serial Input
INTP0 to INTP6,SO0 to SO4:Serial Output
INTTCLR8,TCLR8:Timer Clear
INTTI8, INTTI9TI000, TI001, TI010,: Timer Input
KR0 to KR7:Key ReturnTI011, TI2 to TI11
LBEN:Lower Byte EnableTO0 to TO7, TO80,:Timer Output
NMI:Non-Maskable Interrupt RequestTO81, TO10, TO11
P00 to P07:Port 0TXD0, TXD1:Transmit Data
P10 to P15:Port 1UBEN:Upper Byte Enable
P20 to P27:Port 2VDD:Power Supply
P30 to P37:Port 3VPP:Programming Power Supply
P40 to P47:Port 4VSOUT:Vsync Output
P50 to P57:Port 5VSS:Ground
P60 to P65:Port 6WAIT:Wait
P70 to P77:Port 7WRH:Write Strobe High Level Data
P80 to P87:Port 8WRL:Write Strobe Low Level Data
P90 to P96:Port 9X1, X2:Crystal for Main System Clock
P100 to P107:Port 10XT1, XT2:Crystal for Subsystem Clock
P110 to P113:Port 11
8-bit I/O port
Input/output mode can be specified in 1-bit units.
RTP17
I/ONoPort 16
8-bit I/O port
Input/output mode can be specified in 1-bit units.
HSOUT1
I/OYesPort 17
8-bit I/O port
Input/output mode can be specified in 1-bit units.
KR7
I/ONoPort 18
8-bit I/O port
Input/output mode can be specified in 1-bit units.
–
I/ONoPort 19
8-bit I/O port
Input/output mode can be specified in 1-bit units.
–
(4/4)
Remark
PULL: On-chip pull-up resistor
Preliminary Data Sheet U14622EJ1V0DS009
µµµµ
PD70F3040, 70F3040Y
1.2 Non-Port Pins
Pin NameI/OPULLFunctionAlternate Function
A16 to A21OutputNoAddress bus 16 to 21P60 to P65
AD0 to AD7P40 to P47
AD8 to AD15
ADTRGInputYesA/D converter external t ri gger i nputP05/INTP4
ANI0 to ANI7InputNoP70 to P77
ANI8 to ANI15InputNo
ASCK0P15/SCK1
ASCK1
ASTBOutputNoExternal address strobe signal outputP94
DD
AV
REF
AV
SS
AV
DD
BV
SS
BV
CLKOUTOutput–Internal system clock output–
CLOOutputNoCLO output signalP123
CSYNCINInputNoCsync si gnal inputP164
DSTBOutputNoExternal data strobe signal outputP93/RD
HLDAKOutputNoBus hold acknowledge outputP95
HLDRQInputNoBus hold request inputP96
HSOUT0Hsync signal output before compensationP166
HSOUT1
INTCP80 to
INTCP83
INTCP90 to
INTCP93
INTP0 to INTP3External interrupt request i nput (anal og noi se elimination)P01 to P04
INTP4P05/ADTRG
INTP5
INTP6
I/ONoAddress/data multiplexed bus 0 to 15
P50 to P57
Analog input to A/D converter
P80 to P87
InputYesBaud rate clock input for UART0 and UART1
P25/SCK3
––Posi t i ve power supply for A/D converter and ports used for
alternate functions
Input–Reference voltage input for A/D c onv erter–
––Ground potenti al f or A/D converter and ports used for alternate
functions
––Posi t i ve power supply for bus interface and ports used for
alternate functions
––Ground potenti al f or bus interface and ports used for alternat e
functions
OutputNo
Hsync signal output af ter compensationP167
InputNoExt ernal capture input for CC80 to CC83P130 to P133
InputNoExt ernal capture input for CP90 to CP93P140 to P143
InputYes
External interrupt request i nput (di gi tal noise elimination)
P06/RTPTRG0
External interrupt request i nput (di gi tal noise elimination
supporting remote controller)
P07
(1/4)
–
–
–
–
Remark
PULL: On-chip pull-up resistor
10Preliminary Data Sheet U14622EJ1V0DS00
µµµµ
PD70F3040, 70F3040Y
Pin NameI/OPULLFunctionAlternate Function
(2/4)
INTTCLR8InputNoP135/TCLR8
INTTI8P134/TI8
INTTI9
KR0 to KR7InputYesKey return inputP170 to P177
LBENOutputNoLower byte enabl e signal output for external data busP90/WRL
NMIInputYesNon-maskable interrupt request inputP00
PWM0 to PWM3OutputNoOutput of PWM channels 0 to 3P160 to P163
RDOutputNoBus read strobe si gnal outputP93/DSTB
RESETI nput–System reset input–
RTP00 to RTP07P100 to P107
RTP10 to RTP17
RTPTRG0YesP06
RTPTRG1
R/WOutputNoExternal read/write status outputP92/WRH
RXD0P13/SI1
RXD1
SCK0P12/SCL0
SCK1P15/ASCK0
SCK2P22/SCL1
SCK3
SCK4
SCL0P12/SCK0
SCL1
SDA0P10/SI0
SDA1
SI0P10/SDA0
SI1P13/RXD0
SI2P20/SDA1
SI3
SI4
SO0P11
SO1P14/TXD0
SO2P21
SO3
SO4
TCLR8InputNoExternal clear input for TM 8P135/INTTCLR8
InputNo
OutputYesReal-time output port
Input
InputYesSerial receive data input for UART0 and UART1
I/O
I/OYesSerial clock I/O for I
I/OYesSerial transmit/receive data I/O for I
Input
Output
YesSerial clock I/O for CSI0 to CSI3 (3-wire mode)
YesSerial receive data input for CSI0 to CSI3 (3-wire mode)
YesSerial transmi t data output for CSI0 to CSI3
External interrupt request i nput (di gi tal noise elimination)
P144/TI9
P150 to P157
RTP external trigger input
No
NoVariable-lengt h CSI4 serial clock I/ OP122
2
C0 and I2C1
(
PD70F3040Y)
µ
2
C0 and I2C1
(
PD70F3040Y)
µ
NoVariable-length CS I4 serial receive data input (3-wire mode)P120
NoVariable-length CS I4 serial transmit data outputP121
P146
P23/SI3
P25/ASCK1
P22/SCK2
P20/SI2
P23/RXD1
P24/TXD1
Remark
PULL: On-chip pull-up resistor
Preliminary Data Sheet U14622EJ1V0DS0011
µµµµ
PD70F3040, 70F3040Y
Pin NameI/OPULLFunctionAlternate Function
(3/4)
TI000External count clock input/ external capture trigger input for TM0P30
TI001External capture trigger input for TM0P31
TI010External count clock input/ external capture trigger input for TM1P32
TI011External capture trigger input for TM1P33
TI2External count clock input for TM2P26/TO2
TI3External count clock input for TM3P27/TO3
TI4External count clock input for TM4P36/TO4/A15
TI5
TI6External count clock input for TM6P124/TO6
TI7External count clock input for TM7P125/TO7
TI8External count clock input for TM8P134/INTTI8
TI9External count clock input for TM9P144/INTTI9
TI10External count clock i nput for TM10P126/TO10
TI11
TO0Pulse s ignal output for TM0P34
TO1Pulse s ignal output for TM1P35
TO2Pulse s ignal output for TM2P26/TI2
TO3Pulse s ignal output for TM3P27/TI3
TO4Pulse s ignal output for TM4P36/TI4
TO5
TO6Pulse s ignal output for TM6P124/TI6
TO7Pulse s ignal output for TM7P125/TI7
TO80Pulse signal output 0 for TM 8P136
TO81Pulse signal output 1 for TM 8P137
TO10Pulse signal output for TM 10P126/TI10
TO11
TXD0P14/SO1
TXD1
UBENOutputNoHigher byte enable signal output f or external data busP91
DD
V
PP
V
VSOUTOutputNoVsync signal outputP165
SS
V
WAITInputNoExternal WAIT signal i nput–
WRHHigher byte write strobe signal output for external data busP92/R/W
WRL
Input
Output
OutputYesSerial transmit data output f or UA RT0 and UART1
––Posi t i ve power supply pin–
––High voltage application pin for program write/veri fy–
––Ground potenti al–
OutputNo
Yes
External count clock i nput for TM5P37/TO5
No
External count clock i nput for TM11P127/TO11
Yes
Pulse signal output for TM5P37/TI5
No
Pulse signal output for TM11P127/TI11
P24/SO3
Lower byte write strobe signal output for external data busP90/LBEN
Remark
PULL: On-chip pull-up resistor
12Preliminary Data Sheet U14622EJ1V0DS00
µµµµ
PD70F3040, 70F3040Y
Pin NameI/OPULLFunctionAlternate Function
(4/4)
X1Input–
X2–
XT1Input–
XT2–
Remark
PULL: On-chip pull-up resistor
NoResonator connec tion for main system clock
NoResonator connec tion for subsystem clock
–
–
Preliminary Data Sheet U14622EJ1V0DS0013
µµµµ
PD70F3040, 70F3040Y
1.3 Pin I/O Circuits, I/O Buffer Supply, and Recommended Connection of Unused Pins
Table 1-1 shows the input/output circuit type of each pin and the recommended connection of unused pins.
For the input/output configuration of each type, refer to Figure 1-1.
Table 1-1. Types of Pin I/O Circuit and Recommended Connection of Unused Pins (1/2)
PinAlternate FunctionI/O Circ ui t
P00NMI
Type
5-WV
Power Supply
P01 to P04INTP0 to INTP3
P05INTP4/ADTRG
P06INTP5/RTPTRG0
P07INTP6
P10SI0/SDA010-F
V
P11SO010-E
P12SCK0/SCL010-F
P13SI1/RXD05-W
P14SO1/TXD010-E
P15SCK1/ASCK010-F
P20SI2/SDA110-F
V
P32, P33TI010, TI011
P34, P35TO0, TO15-A
P36TI4/TO4
5-W
P37TI5/TO5
P40 to P47AD0 to AD75BV
P50 to P57AD8 to AD155BV
P60 to P65A16 to A215BV
P70 to P77ANI0 to ANI79AV
P80 to P87ANI8 to ANI159AV
P90LBEN/WRL
5BV
P91UBEN
P92R/W/WRH
P93DSTB/RD
P94ASTB
P95HLDAK
P96HLDRQ
P100 to P107RTP00 to RTP0710-EV
P110 to P113–5V
P120SI45-KV
I/O Buffer
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
Recommended Connection Method
Input:Independently connect t o VDD or V
SS
via a resistor
Output:Leave open
Input:Independently connect t o BVDD or BV
via a resistor
Output:Leave open
Connect to AV
SS
Input:Independently connect t o BVDD or BV
via a resistor
Output:Leave open
Input:Independently connect t o VDD or V
SS
via a resistor
Output:Leave open
SS
SS
14Preliminary Data Sheet U14622EJ1V0DS00
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