NEC UPC2749TB-E3, UPC2749TB, UPC2749T-E3, UPC2749T Datasheet

DATA SHEET

BIPOLAR ANALOG INTEGRATED CI RCUIT

µµµµ

PC2749TB

3 V, SUPER MINIMOLD SILICON MMIC

WIDEBAND AMPLIFIER

FOR MOBILE COMMUNICATIONS

DESCRIPTION

The µPC2749TB is a silicon monolithic integrated circuit designed as amplifier for mobile communications. This

IC is packaged in super minimold package which is smaller than conventional minimold.

The µPC2749TB has compatible pin connections and performance to µPC2749T of conventional minimold

version. So, in the case of reducing your system size, µPC2749TB is suitable to replace from µPC2749T.

This IC is manufactured using NEC’s 20 GHz fT NESATTM lll silicon bipolar process. This process uses silicon
nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and
prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.

FEATURES

• High-density surface mounting : 6-pin super minimold package

• Supply voltage : V

• Noise figure : NF = 4.0 dB TYP. @ f = 1.9 GHz

• Upper limit operating frequency : f

APPLICATION

• GPS receiver

• Wireless LAN

ORDERING INFORMATION

Part Number Package Marking Supplying Form

µ

PC2749TB-E3 6-pin super minimold C1U Embossed tape 8 mm wide.

Remark

To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:

PC2749TB)

µ

CC

= 2.7 to 3.3 V

u

= 2.9 GHz TYP. @ 3 dB down below from gain at f = 0.9 GHz

1, 2, 3 pins face to perforat i on side of the tape.
Qty 3 kp/reel.

The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.

Document No. P13489EJ2V0DS00 (2nd edition)
Date Published May 1999 N CP(K)
Printed in Japan

Caution Electro-static sensitive devices

The mark shows major revised points.

1998, 1999©

PIN CONNECTIONS

(Top View) (Bottom View)

3

µµµµ

PC2749TB

Pin No. Pin Name

1 INPUT

4

4

3

2GND

2

1

PRODUCT LINE-UP (TA = +25°C, VCC = 3.0 V, ZL = ZS = 50

Part No.

PC2749T 6-pin minimold

µ

PC2749TB

µ

Remark

Notice

Typical performance. Please refer to

The package size distinguishes between minimold and super minimold.

f

(GHz)

2.9 –6.0 16 4.0 6.0

C1U

u

5

6

O(sat)

P

(dBm)

5

6

P

G

(dB)

2

1

NF

(dB)

)

ΩΩΩΩ

ELECTRICAL CHARACTERISTICS

CC

I

(mA)

6-pin super minimold

in detail.

SYSTEM APPLICATION EXAMPLE

EXAMPLE OF GPS RECEIVER

3GND
4OUTPUT
5GND
6V

Package Marking

CC

C1U

Pre Amp. Unit RF Unit

RF Amp. Mixer

B.P.F. B.P.F. IF Filter

µµ

LNA

PC2749T/TB PC2749T/TB

VCO

To know the associated products, please refer to each latest data sheet.

IF Amp.

PLL

Loop Filter

2

Data Sheet P13489EJ2V0DS00

PIN EXPLANATION

µµµµ

PC2749TB

Pin

Pin Name

No.

1 INPUT – 0.82 Signal input pin. A internal

4 OUTPUT – 2.87 Signal output pin. A internal

6VCC2.7 to 3.3 – Power supply pin. This pin

2
3
5

GND 0 – Ground pin. This pi n s houl d

Applied
Voltage (V)

Pin
Voltage

Note

(V)

Function and Applications Internal Equivalent Circ ui t

matching circuit, configured
with resistors, enables 50
connection over a wide band.
This pin must be coupled to
signal source with capac i t or
for DC cut.

matching circuit, configured
with resistors, enables 50
connection over a wide band.
This pin must be coupled to
next stage with capaci tor for
DC cut.

should be externally equipped
with bypass capacit y to
minimize ground impedance.

be connected to system
ground with minimum
inductance. Ground pattern
on the board should be
formed as wide as possible.
All the ground pins must be
connected together with wide
ground pattern to decrease
impedance difference.

Ω

6

CC

V

Ω

1

IN

3 5

2

GNDGND

4

OUT

Pin voltage is measured at V

Note

CC

= 3.0 V.

Data Sheet P13489EJ2V0DS00

3

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Conditions Ratings Unit

µµµµ

PC2749TB

Supply Voltage V
Total Circuit Current I
Power Dissipation P

Operating Ambient Temperature T
Storage Temperature T
Input Power P

CC

CC

stg

TA = +25 °C 4.0 V
TA = +25 °C 15 mA

D

Mounted on doublesided copper clad

A

50 × 50 × 1.6 mm epoxy glass P WB (T

A

in

TA = +25 °C 0 dBm

= +85°C)

40 to +85 °C

−

55 to +150 °C

−

200 mW

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol MIN. TYP. MAX. Unit
Supply Voltage V
Operating Ambient Temperature T

ELECTRICAL CHARACTERISTICS (TA = +25 °C, VCC = 3.0 V, ZS = ZL = 50

Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Circuit Current I
Power Gain G
Maximum Output Level P
Noise Figure NF f = 1.9 GHz – 4.0 5.5 dB
Upper Limit Operating Frequency f

Isolation ISL f = 1.9 GHz 25 30 – dB
Input Return Loss RL
Output Return Loss RL

CC

A

CC

P

O(sat)

u

out

2.7 3.0 3.3 V
40 +25 +85 °C

−

)

ΩΩΩΩ

No Signal 4.0 6.0 8.0 mA
f = 1.9 GHz 13.0 16.0 18.5 dB
f = 1.9 GHz, Pin = –6 dBm –9.0 –6.0 – dBm

3 dB down below flat gain at

2.5 2.9 – GHz

f = 0.9 GHz

in

f = 1.9 GHz 7 10 – dB
f = 1.9 GHz 9.5 12.5 – dB

STANDARD CHARACTERISTICS FOR REFERENCE (TA = +25 °C, VCC = 3.0 V, ZS = ZL = 50

)

ΩΩΩΩ

Parameter Symbol Test Conditions Reference Value Unit

Power Gain G

P

f = 0.9 GHz 14.5 dB
Noise Figure NF f = 0.9 GHz 3.2 dB
3rd Order Intermodulation Distort i on IM

Gain 1 dB Compression Output

P

O(1 dB)

3

out

P

= –20 dBm

1

= 1.900 GHz, f2 = 1.902 GHz

f

–33 dB c

f = 1.9 GHz –12.5 dBm
Level

4

Data Sheet P13489EJ2V0DS00

TEST CIRCUIT

1 000 pF

C

3

µµµµ

PC2749TB

V

CC

6

50Ω

IN

1 000 pF

EXAMPLE OF APPLICATION CIRCUIT

V

CC

1 000 pF

C

3

6

50Ω

IN

1

C

1 000 pF

1

2, 3, 5

1

C

1

4

2

C

50Ω

OUT

1 000 pF

2, 3, 5

1 000 pF

C

5

6

4

4

C

1

4

1 000 pF

2

C

1 000 pF

50Ω

OUT

2, 3, 5

The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.

CAPACITORS FOR THE VCC, INPUT AND OUTPUT PINS

CC

1 000 pF capacitors are recommendable as bypass capacitor for V

pin and coupling capacitors for input/output

pins.

Bypass capacitor for VCC pin is intended to minimize VCC pin’s ground impedance. Therefore, stable bias can be

supplied against VCC fluctuation.

Coupling capacitors for input/output pins are intended to minimize RF serial impedance and cut DC.

To get a flat gain from 100 MHz up, 1 000 pF capacitors are assembled on the test circuit. [Actually, 1 000 pF
capacitors give flat gain at least 10 MHz. In the case of under 10 MHz operation, increase the value of coupling
capacitor such as 2 200 pF. Because the coupling capacitors are determined by the equation of C = 1/(2 πfZs).]

Data Sheet P13489EJ2V0DS00

5