The µPC2749TB is a silicon monolithic integrated circuit designed as amplifier for mobile communications. This
IC is packaged in super minimold package which is smaller than conventional minimold.
The µPC2749TB has compatible pin connections and performance to µPC2749T of conventional minimold
version. So, in the case of reducing your system size, µPC2749TB is suitable to replace from µPC2749T.
This IC is manufactured using NEC’s 20 GHz fT NESATTM lll silicon bipolar process. This process uses silicon
nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and
prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.
FEATURES
• High-density surface mounting: 6-pin super minimold package
• Supply voltage: V
• Noise figure: NF = 4.0 dB TYP. @ f = 1.9 GHz
• Upper limit operating frequency: f
APPLICATION
• GPS receiver
• Wireless LAN
ORDERING INFORMATION
Part NumberPackageMarkingSupplying Form
µ
PC2749TB-E36-pin super minimoldC1UEmbossed tape 8 mm wide.
Remark
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
PC2749TB)
µ
CC
= 2.7 to 3.3 V
u
= 2.9 GHz TYP. @ 3 dB down below from gain at f = 0.9 GHz
1, 2, 3 pins face to perforat i on side of the tape.
Qty 3 kp/reel.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P13489EJ2V0DS00 (2nd edition)
Date Published May 1999 N CP(K)
Printed in Japan
The package size distinguishes between minimold and super minimold.
f
(GHz)
2.9–6.0164.06.0
C1U
u
5
6
O(sat)
P
(dBm)
5
6
P
G
(dB)
2
1
NF
(dB)
)
ΩΩΩΩ
ELECTRICAL CHARACTERISTICS
CC
I
(mA)
6-pin super minimold
in detail.
SYSTEM APPLICATION EXAMPLE
EXAMPLE OF GPS RECEIVER
3GND
4OUTPUT
5GND
6V
PackageMarking
CC
C1U
Pre Amp. UnitRF Unit
RF Amp.Mixer
B.P.F.B.P.F.IF Filter
µµ
LNA
PC2749T/TBPC2749T/TB
VCO
To know the associated products, please refer to each latest data sheet.
IF Amp.
PLL
Loop Filter
2
Data Sheet P13489EJ2V0DS00
PIN EXPLANATION
µµµµ
PC2749TB
Pin
Pin Name
No.
1INPUT–0.82Signal input pin. A internal
4OUTPUT–2.87Signal output pin. A internal
6VCC2.7 to 3.3–Power supply pin. This pin
2
3
5
GND0–Ground pin. This pi n s houl d
Applied
Voltage (V)
Pin
Voltage
Note
(V)
Function and ApplicationsInternal Equivalent Circ ui t
matching circuit, configured
with resistors, enables 50
connection over a wide band.
This pin must be coupled to
signal source with capac i t or
for DC cut.
matching circuit, configured
with resistors, enables 50
connection over a wide band.
This pin must be coupled to
next stage with capaci tor for
DC cut.
should be externally equipped
with bypass capacit y to
minimize ground impedance.
be connected to system
ground with minimum
inductance. Ground pattern
on the board should be
formed as wide as possible.
All the ground pins must be
connected together with wide
ground pattern to decrease
impedance difference.
Ω
6
CC
V
Ω
1
IN
35
2
GNDGND
4
OUT
Pin voltage is measured at V
Note
CC
= 3.0 V.
Data Sheet P13489EJ2V0DS00
3
ABSOLUTE MAXIMUM RATINGS
ParameterSymbolConditionsRatingsUnit
µµµµ
PC2749TB
Supply VoltageV
Total Circuit CurrentI
Power DissipationP
No Signal4.06.08.0mA
f = 1.9 GHz13.016.018.5dB
f = 1.9 GHz, Pin = –6 dBm–9.0–6.0–dBm
3 dB down below flat gain at
2.52.9–GHz
f = 0.9 GHz
in
f = 1.9 GHz710–dB
f = 1.9 GHz9.512.5–dB
STANDARD CHARACTERISTICS FOR REFERENCE (TA = +25 °C, VCC = 3.0 V, ZS = ZL = 50
)
ΩΩΩΩ
ParameterSymbolTest ConditionsReference ValueUnit
Power GainG
P
f = 0.9 GHz14.5dB
Noise FigureNFf = 0.9 GHz3.2dB
3rd Order Intermodulation Distort i onIM
Gain 1 dB Compression Output
P
O(1 dB)
3
out
P
= –20 dBm
1
= 1.900 GHz, f2 = 1.902 GHz
f
–33dB c
f = 1.9 GHz–12.5dBm
Level
4
Data Sheet P13489EJ2V0DS00
TEST CIRCUIT
1 000 pF
C
3
µµµµ
PC2749TB
V
CC
6
50Ω
IN
1 000 pF
EXAMPLE OF APPLICATION CIRCUIT
V
CC
1 000 pF
C
3
6
50Ω
IN
1
C
1 000 pF
1
2, 3, 5
1
C
1
4
2
C
50Ω
OUT
1 000 pF
2, 3, 5
1 000 pF
C
5
6
4
4
C
1
4
1 000 pF
2
C
1 000 pF
50Ω
OUT
2, 3, 5
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
CAPACITORS FOR THE VCC, INPUT AND OUTPUT PINS
CC
1 000 pF capacitors are recommendable as bypass capacitor for V
pin and coupling capacitors for input/output
pins.
Bypass capacitor for VCC pin is intended to minimize VCC pin’s ground impedance. Therefore, stable bias can be
supplied against VCC fluctuation.
Coupling capacitors for input/output pins are intended to minimize RF serial impedance and cut DC.
To get a flat gain from 100 MHz up, 1 000 pF capacitors are assembled on the test circuit. [Actually, 1 000 pF
capacitors give flat gain at least 10 MHz. In the case of under 10 MHz operation, increase the value of coupling
capacitor such as 2 200 pF. Because the coupling capacitors are determined by the equation of C = 1/(2 πfZs).]
Data Sheet P13489EJ2V0DS00
5
ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD
For more information on the use of this IC, refer to the following application note: USAGE AND APPLICATIONS
OF 6-PIN MINI-MOLD, 6-PIN SUPER MINI-MOLD SILICON HIGH-FREQUENCY WIDEBAND AMPLIFIER MMIC
(P11976E).
6
Data Sheet P13489EJ2V0DS00
TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25 °C)
CIRCUIT CURRENT vs.
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
10
No signal
8
OPERATING AMBIENT TEMPERATURE
10
8
µµµµ
PC2749TB
No signal
CC = 3.0 V
V
6
CC (mA)
4
Circuit Current I
2
0
01234
Supply Voltage VCC (V)Operating Ambient Temperature TA (°C)
INSERTION POWER GAIN vs. FREQUENCYINSERTION POWER GAIN vs. FREQUENCY
25
20
P (dB)
Insertion Power Gain G
15
10
5
VCC = 3.0 V
VCC = 2.7 V
VCC = 3.3 V
6
4
Circuit Current ICC (mA)
2
0
–60 –40 –200+20 +40 +60 +80 +100
25
20
P (dB)
Insertion Power Gain G
TA = +25 °C
15
10
TA = +85 °C
5
TA = –40 °C
VCC = 3.0 V
0
0.10.31.03.0
Frequency f (GHz)
NOISE FIGURE vs. FREQUENCY
6
VCC = 2.7 V
5
4
3
Noise Figure NF (dB)
2
1
0.10.31.03.0
VCC = 3.0 V
VCC = 3.3 V
Frequency f (GHz)
0
0.11.00.33.0
Data Sheet P13489EJ2V0DS00
Frequency f (GHz)
7
0
–10
–20
–30
Isolation ISL (dB)
–40
ISOLATION vs. FREQUENCY
INPUT RETURN LOSS, OUTPUT RETURN
LOSS vs. FREQUENCY
0
–10
(dB)
out
(dB)
in
–20
–30
Output Return Loss RL
Input Return Loss RL
–40
RL
µµµµ
PC2749TB
VCC = 3.0 VVCC = 3.0 V
out
RL
in
–50
0.10.31.03.0
Frequency f (GHz)Frequency f (GHz)
OUTPUT POWER vs. INPUT POWEROUTPUT POWER vs. INPUT POWER
0
–5
–10
(dBm)
out
f = 1.9 GHz
VCC = 3.0 V
VCC = 3.3 V
VCC = 2.7 V
–15
–20
Output Power P
–25
–30
–40 –35 –30 –25 –20 –15 –10–50
Input Power P
in
(dBm)
SATURATED OUTPUT POWER vs. FREQUENCY
0
Pin = –6 dBm
–5
(dBm)
O (sat)
VCC = 3.3 V
VCC = 3.0 V
–10
VCC = 2.7 V
–15
–20
Saturated Output Power P
–25
0.10.31.03.0
Frequency f (GHz)
–50
0.10.31.03.0
0
VCC = 3.0 V
f = 1.9 GHz
TA = +85 °C
–5
TA = –40 °C
–10
(dBm)
out
TA = –40 °C
TA = +25 °C
–15
TA = +25 °C
–20
Output Power P
TA = +85 °C
–25
–30
–40 –35 –30 –25 –20 –15 –10–50
Input Power Pin (dBm)
THIRD ORDER INTERMODULATION DISTORTION
vs. OUTPUT POWER OF EACH TONE
(1) Observe precautions for handling because of electro-static sensitive devices.
(2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired oscillation).
All the ground pins must be connected together with wide ground pattern to decrease impedance difference.
(3) The bypass capacitor should be attached to VCC line.
(4) The DC cut capacitor must be attached to input pin.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions. For soldering methods and
conditions other than those recommended below, contact your NEC sales representative.
Soldering MethodSoldering ConditionsRecommended Condi tion Symbol
Infrared ReflowPackage peak temperature: 235 °C or below
Time: 30 seconds or less (at 210 °C)
Count: 3, Exposure limi t: None
VPSPackage peak temperature: 215 °C or below
Time: 40 seconds or less (at 200 °C)
Count: 3, Exposure limi t: None
Wave SolderingSoldering bath temperature: 260 °C or below
Time: 10 seconds or less
Count: 1, Exposure limi t: None
Partial HeatingPin temperature: 300 °C
Time: 3 seconds or less (per side of device)
Exposure limit: None
After opening the dry pack, keep it in a place below 25 °C and 65 % RH for the allowable storage period.
Note
Note
Note
Note
Note
IR35-00-3
VP15-00-3
WS60-00-1
–
Caution Do not use different soldering methods together (except for partial heating).
For details of recommended soldering conditions for surface mounting, refer to information document
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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