NEC PD789800 User Manual
User’s Manual
PD789800 Subseries
µ
µ
µµ
8-Bit Single-Chip Microcontrollers
PD789800
µµµµ
PD78F9801
µµµµ
Document No. U12978EJ3V0UD00 (3rd edition)
Date Published February 2003 N CP (K)
Printed in Japan
1998, 2003
[MEMO]
2
User’s Manual U12978EJ3V0UD
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static
electricity as much as possible, and quickly dissipate it once, when it has occurred.
Environmental control must be adequate. When it is dry, humidifier should be used. It is
recommended to avoid using insulators that easily build static electricity. Semiconductor devices
must be stored and transported in an anti-static container, static shielding bag or conductive
material. All test and measurement tools including work bench and floor should be grounded.
The operator should be grounded using wrist strap. Semiconductor devices must not be touched
with bare hands. Similar precautions need to be taken for PW boards with semiconductor
devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is
provided to the input pins, it is possible that an internal input level may be generated due to
noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS
devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down
circuitry. Each unused pin should be connected to V
to have a possibility of being an output pin. All handling related to the unused pins must be
judged device by device and related specifications governing the devices.
or GND with a resistor, if it is considered
DD
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until
the reset signal is received. Reset operation must be executed immediately after power-on for
devices having reset function.
FIP and EEPROM are trademarks of NEC Electronics Corporation.
Windows and Windows NT are either registered trademarks or trademarks of Microsoft Corporation in the
United States and/or other countries.
PC/AT is a trademark of International Business Machines Corporation.
HP9000 Series 700 and HP-UX are trademarks of Hewlett-Packard Company.
SPARCstation is a trademark of SPARC International, Inc.
Solaris and SunOS are trademarks of Sun Microsystems, Inc.
User’s Manual U12978EJ3V0UD
3
These commodities, technology or software, must be exported in accordance
with the export administration regulations of the exporting country.
Diversion contrary to the law of that country is prohibited.
•
The information in this document is current as of September, 2002. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without the prior
•
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
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or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
•
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
•
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redundancy, fire-containment and anti-failure features.
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The "Specific" quality grade applies only to NEC Electronics products developed based on a customerdesignated "quality assurance program" for a specific application. The recommended applications of an NEC
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systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support).
"Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
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(Note)
(1) "NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
(2) "NEC Electronics products" means any product developed or manufactured by or for NEC Electronics
(as defined above).
M8E 02. 11-1
4
User’s Manual U12978EJ3V0UD
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
Electronics product in your application, pIease contact the NEC Electronics office in your country to
obtain a list of authorized representatives and distributors. They will verify:
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Device availability
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Ordering information
•
Product release schedule
•
Availability of related technical literature
•
Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
•
Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
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Santa Clara, California
Tel: 408-588-6000
800-366-9782
Fax: 408-588-6130
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Novena Square, Singapore
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Fax: 6250-3583
User’s Manual U12978EJ3V0UD
J02.11
5
Major Revisions in This Edition
Page Contents
Deletion of CU-type and GB-3BS type packagesThroughout
Deletion of indication “under development” for
p. 21 Modification of operating ambient temperature when flash memory is written in
p. 27 Addition of outline of timer in
pp. 29, 31 to 33 Modification of handling of REGC and VPP pins
pp. 35, 36 Correction of address values in
µµµµ
(
PD78F9801)
p. 75 Modification of
pp. 98, 103,
105, 106,
108 to 112,
115 to 117, 120,
125, 127 to 130
p. 162 Modification of
p. 164 Addition of
p. 167 Addition of
p. 184 Addition of
pp. 191 to 199 Revision of contents of flash memory programming as
pp. 210 to 218 Addition of
p. 219 Addition of
p. 220 Addition of
pp. 221 to 228 Revision of
pp. 233, 234 Addition of the revision contents in 3rd edition in
CHAPTER 8 USB FUNCTION
• Modification of chapter composition
• Standardization of buffer name indications as receive token bank, receive data bank, and transmit data
banks 0 and 1
• Addition of image diagrams for reception and transmission
• Addition of register value for SETUP reception
• Modification of description on data handshake packet receive mode register (URXMOD)
• Addition of description on packet receive status register (RXSTAT) and modification of read-only bit
• Addition of
• Addition of
• Modification of description of bit 1 (DNAEN) of handshake packet transmit reservation register (HTXRSV)
• Change of contents of
• Addition of
• Correction of incorrect flag name in
• Addition of description on USB reset/Resume detection interrupt (INTUSBRE)
• Addition of
Register
Deletion of embedded software and addition of notes on target system design
Figure 5-3 External Circuit of System Clock Oscillator (b) External clock
for token packet receive result store register (TRXRSL)
Note
Caution
Table 8-4 List of Sources of Interrupts from USB Function
8.7 USB Function Control
Figure 10-1 Block Diagram of Regulator and USB Driver/Receiver
in
Remark
Caution 3
12.2.2 STOP mode (3) Cautions on STOP instruction execution
CHAPTER 16 ELECTRICAL SPECIFICATIONS
CHAPTER 17 PACKAGE DRAWING
CHAPTER 18 RECOMMENDED SOLDERING CONDITIONS
APPENDIX A DEVELOPMENT TOOLS
1.7 Functions
Figure 3-1 Memory Map (
for data packet transmit reservation register (DTXRSV)
8.5.2 Remote wakeup control operation
8.6 Interrupt Request from USB Function
Table 11-1 Interrupt Source List
on watchdog timer interrupt to
PD78F9801
µ
µµµµ
PD789800)
Figure 11-2 Format of Interrupt Request Flag
14.1 Flash Memory Characteristics
APPENDIX C REVISION HISTORY
and
1.1 Features
Figure 3-2 Memory Map
and
Cautions
The mark shows major revised points.
6
User’s Manual U12978EJ3V0UD
INTRODUCTION
Readers This manual is intended for users who wish to understand the functions of the
PD789800 Subseries and who design and develop its application systems and
µ
programs.
Target products:
•µPD789800 Subseries: µPD789800 and µPD78F9801
Purpose This manual is intended to give users an understanding of the functions described in
the Organization below.
Organization Two manuals are available for the µPD789800 Subseries:
This manual and the Instruction Manual (common to the 78K/0S Series).
PD789800 Subseries
µ
User’s Manual
• Pin functions
• Internal block functions
• Interrupts
• Other internal peripheral functions
• Electrical specifications
How to Read This Manual It is assumed that the readers of this manual have general knowledge in the fields of
electrical engineering, logic circuits, and microcontrollers.
• To understand the overall functions of the
→ Read this manual in the order of the CONTENTS.
• How to read register formats
→ The name of a bit whose number is enclosed in angle brackets (< >) is reserved
in the assembler and is defined in the C compiler by the header file sfrbit.h.
• To learn the detailed functions of a register whose register name is known
→ See APPENDIX B REGISTER INDEX.
• To learn details of the instruction functions of the 78K/0S Series
→ Refer to 78K/0S Series Instruction User’s Manual (U11047E) separately
available.
• To know the electrical specifications of the µPD789800 Subseries
→ Refer to CHAPTER 16 ELECTRICAL SPECIFICATIONS.
µ
78K/0S Series
User’s Manual
Instruction
• CPU function
• Instruction set
• Instruction description
PD789800 Subseries
Conventions Data significance: Higher digits on the left and lower digits on the right
Active low representation: xxx (overscore over pin or signal name)
Note: Footnote for item marked with Note in the text
Caution: Information requiring particular attention
Remark: Supplementary information
Numerical representation: Binary ... xxxx or xxxxB
Decimal ... xxxx
Hexadecimal ... xxxxH
User’s Manual U12978EJ3V0UD
7
Related Documents The related documents indicated in this publication may include preliminary versions.
However, preliminary versions are not marked as such.
Documents Related to Devices
Document Name Document No.
PD789800 Subseries User’s Manual This manual
µ
78K/0S Series Instructions User’s Manual U11047E
Documents Related to Development Tools (Software) (User’s Manuals)
Document Name Document No.
RA78K0S Assembler Package
ID78K Series Integrated Debugger
Ver. 2.30 or Later
Project Manager Ver. 3.12 or Later (Windows Based) U14610E
Operation U14876E
Language U14877E
Structured Assembly Language U11623E
Operation U14871ECC78K0S C Compiler
Language U14872E
Operation (WindowsTM Based) U15373ESM78K Series System Simulator Ver. 2.30 or Later
External Part User Open Interface Specifications U15802E
Operation (Windows Based) U15185E
Documents Related to Development Tools (Hardware) (User’s Manuals)
Document Name Document No.
IE-78K0S-NS In-Circuit Emulator U13549E
IE-78K0S-NS-A In-Circuit Emulator U15207E
IE-789801-NS-EM1 Emulation Board U13390E
Documents Related to Flash Memory Writing
Document Name Document No.
PG-FP3 Flash Memory Programmer User’s Manual U13502E
PG-FP4 Flash Memory Programmer User’s Manual U15260E
Caution The related documents listed above are subject to change without notice. Be sure to use the
latest version of each document for designing.
8
User’s Manual U12978EJ3V0UD
Other Related Documents
Document Name Document No.
SEMICONDUCTOR SELECTION GUIDE - Products and Packages - (CD-ROM) X13769X
Semiconductor Device Mounting Technology Manual C10535E
Quality Grades on NEC Semiconductor Devices C11531E
NEC Semiconductor Device Reliability/Quality Control System C10983E
Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD) C11892E
Caution The related documents listed above are subject to change without notice. Be sure to use the
latest version of each document for designing.
User’s Manual U12978EJ3V0UD
9
TABLE OF CONTENTS
CHAPTER 1 GENERAL.......................................................................................................................... 21
1.1 Features ......................................................................................................................................21
1.2 Applications................................................................................................................................ 21
1.3 Ordering Information .................................................................................................................21
1.4 Pin Configuration (Top View).................................................................................................... 22
1.5 78K/0S Series Lineup................................................................................................................. 23
1.6 Block Diagram ............................................................................................................................26
1.7 Functions .................................................................................................................................... 27
CHAPTER 2 PIN FUNCTIONS ..............................................................................................................28
2.1 List of Pin Functions..................................................................................................................28
2.2 Pin Functions .............................................................................................................................30
2.2.1 P00 to P07 (Port 0) ....................................................................................................................... 30
2.2.2 P10 to P17 (Port 1) ....................................................................................................................... 30
2.2.3 P20 to P26 (Port 2) ....................................................................................................................... 30
2.2.4 P40 to P47 (Port 4) ....................................................................................................................... 31
2.2.5 RESET.......................................................................................................................................... 31
2.2.6 X1, X2 ........................................................................................................................................... 31
2.2.7 REGC ........................................................................................................................................... 31
2.2.8 USBDM......................................................................................................................................... 31
2.2.9 USBDP ......................................................................................................................................... 31
, V
2.2.10 V
2.2.11 VSS0
2.2.12 VPP
2.2.13 IC (mask ROM version only)......................................................................................................... 32
DD0
.................................................................................................................................... 31
DD1
, V
..................................................................................................................................... 31
SS1
(µPD78F9801 only) ................................................................................................................ 32
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins......................................... 33
CHAPTER 3 CPU ARCHITECTURE .....................................................................................................35
3.1 Memory Space............................................................................................................................ 35
3.1.1 Internal program memory space................................................................................................... 37
3.1.2 Internal data memory (internal high-speed RAM) space .............................................................. 37
3.1.3 Special function register (SFR) area............................................................................................. 37
3.1.4 Data memory addressing.............................................................................................................. 38
3.2 Processor Registers .................................................................................................................. 40
3.2.1 Control registers ...........................................................................................................................40
3.2.2 General-purpose registers ............................................................................................................ 43
3.2.3 Special function registers (SFRs) .................................................................................................44
3.3 Instruction Address Addressing ..............................................................................................48
3.3.1 Relative addressing ......................................................................................................................48
3.3.2 Immediate addressing ..................................................................................................................49
3.3.3 Table indirect addressing ............................................................................................................. 50
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User’s Manual U12978EJ3V0UD
3.3.4 Register addressing ......................................................................................................................50
3.4 Operand Address Addressing...................................................................................................51
3.4.1 Direct addressing ..........................................................................................................................51
3.4.2 Short direct addressing .................................................................................................................52
3.4.3 Special function register (SFR) addressing...................................................................................53
3.4.4 Register addressing ......................................................................................................................54
3.4.5 Register indirect addressing..........................................................................................................55
3.4.6 Based addressing .........................................................................................................................56
3.4.7 Stack addressing...........................................................................................................................56
CHAPTER 4 PORT FUNCTIONS...........................................................................................................57
4.1 Port Functions ............................................................................................................................57
4.2 Port Configuration......................................................................................................................59
4.2.1 Port 0.............................................................................................................................................60
4.2.2 Port 1.............................................................................................................................................61
4.2.3 Port 2.............................................................................................................................................62
4.2.4 Port 4.............................................................................................................................................68
4.3 Registers Controlling Port Function ........................................................................................69
4.4 Port Function Operation ............................................................................................................72
4.4.1 Writing to I/O port ..........................................................................................................................72
4.4.2 Reading from I/O port....................................................................................................................72
4.4.3 Arithmetic operation of I/O port .....................................................................................................72
CHAPTER 5 CLOCK GENERATOR......................................................................................................73
5.1 Clock Generator Functions .......................................................................................................73
5.2 Clock Generator Configuration .................................................................................................73
5.3 Register Controlling Clock Generator......................................................................................74
5.4 System Clock Oscillators ..........................................................................................................75
5.4.1 System clock oscillator..................................................................................................................75
5.4.2 Examples of incorrect resonator connection .................................................................................76
5.4.3 Frequency divider..........................................................................................................................77
5.5 Clock Generator Operation........................................................................................................77
5.6 Changing Setting of CPU Clock................................................................................................78
5.6.1 Time required for switching CPU clock .........................................................................................78
5.6.2 Switching CPU clock .....................................................................................................................78
CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 00 AND 01 ............................................................79
6.1 Functions of 8-Bit Timer/Event Counters 00 and 01...............................................................79
6.2 Configuration of 8-Bit Timer/Event Counters 00 and 01.........................................................80
6.3 Registers Controlling 8-Bit Timer/Event Counters 00 and 01................................................82
6.4 Operation of 8-Bit Timer/Event Counters 00 and 01 ...............................................................85
6.4.1 Operation as interval timer ............................................................................................................85
6.4.2 Operation as external event counter (timer 01 only) .....................................................................87
6.4.3 Operation as square-wave output (timer 01 only) .........................................................................88
6.5 Notes on Using 8-Bit Timer/Event Counters 00 and 01 ..........................................................90
User’s Manual U12978EJ3V0UD
11
CHAPTER 7 WATCHDOG TIMER ........................................................................................................91
7.1 Watchdog Timer Functions....................................................................................................... 91
7.2 Watchdog Timer Configuration ................................................................................................92
7.3 Registers Controlling Watchdog Timer ...................................................................................93
7.4 Watchdog Timer Operation....................................................................................................... 95
7.4.1 Operation as watchdog timer........................................................................................................ 95
7.4.2 Operation as interval timer............................................................................................................ 96
CHAPTER 8 USB FUNCTION ............................................................................................................... 97
8.1 USB Overview............................................................................................................................. 97
8.2 USB Function Features .............................................................................................................98
8.3 USB Function Configuration..................................................................................................... 98
8.4 Registers Controlling USB Function...................................................................................... 109
8.5 USB Function Operation .........................................................................................................122
8.5.1 USB timer operation ................................................................................................................... 122
8.5.2 Remote wakeup control operation .............................................................................................. 125
8.6 Interrupt Request from USB Function ...................................................................................127
8.6.1 Interrupt sources......................................................................................................................... 127
8.6.2 Cautions when using interrupts ..................................................................................................129
8.7 USB Function Control..............................................................................................................130
8.7.1 Relationship between packets and operation modes ................................................................. 130
8.7.2 Interrupt servicing flow................................................................................................................ 136
8.8 USB Function Internal Circuit Operations.............................................................................140
8.8.1 Operation of transmit/receive pointer.......................................................................................... 140
8.8.2 Receive bank switching ID detection buffer operation................................................................ 147
8.8.3 Sync detection/USBCLK detector operation............................................................................... 148
8.8.4 NRZI encoder operation ............................................................................................................. 150
8.8.5 Bit stuffing/strip controller operation ...........................................................................................151
CHAPTER 9 SERIAL INTERFACE 10 ...............................................................................................154
9.1 Functions of Serial Interface 10.............................................................................................. 154
9.2 Configuration of Serial Interface 10 .......................................................................................155
9.3 Register Controlling Serial Interface 10.................................................................................157
9.4 Operation of Serial Interface 10 ..............................................................................................159
9.4.1 Operation stop mode .................................................................................................................. 159
9.4.2 3-wire serial I/O mode................................................................................................................. 160
CHAPTER 10 REGULATOR ................................................................................................................162
CHAPTER 11 INTERRUPT FUNCTIONS............................................................................................163
11.1 Interrupt Function Types......................................................................................................... 163
11.2 Interrupt Sources and Configuration .....................................................................................163
11.3 Registers Controlling Interrupt Function ..............................................................................166
11.4 Interrupt Servicing Operation .................................................................................................171
11.4.1 Non-maskable interrupt acknowledgment operation .................................................................. 171
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User’s Manual U12978EJ3V0UD
11.4.2 Maskable interrupt acknowledgment operation...........................................................................173
11.4.3 Multiplexed interrupt servicing.....................................................................................................175
11.4.4 Interrupt request hold ..................................................................................................................177
CHAPTER 12 STANDBY FUNCTION..................................................................................................178
12.1 Standby Function and Configuration.....................................................................................178
12.1.1 Standby function .........................................................................................................................178
12.1.2 Register controlling standby function ..........................................................................................179
12.2 Standby Function Operation ...................................................................................................180
12.2.1 HALT mode .................................................................................................................................180
12.2.2 STOP mode.................................................................................................................................183
CHAPTER 13 RESET FUNCTION .......................................................................................................186
µµµµ
CHAPTER 14
PD78F9801 ..................................................................................................................190
14.1 Flash Memory Characteristics ................................................................................................191
14.1.1 Programming environment ..........................................................................................................191
14.1.2 Communication mode .................................................................................................................192
14.1.3 On-board pin processing.............................................................................................................195
14.1.4 Connection of adapter for flash writing........................................................................................198
CHAPTER 15 INSTRUCTION SET ......................................................................................................200
15.1 Operation...................................................................................................................................200
15.1.1 Operand identifiers and description methods..............................................................................200
15.1.2 Description of “operation” column ...............................................................................................201
15.1.3 Description of “flag operation” column.........................................................................................201
15.2 Operation List ...........................................................................................................................202
15.3 Instructions Listed by Addressing Type................................................................................207
CHAPTER 16 ELECTRICAL SPECIFICATIONS.................................................................................210
CHAPTER 17 PACKAGE DRAWINGS................................................................................................219
CHAPTER 18 RECOMMENDED SOLDERING CONDITIONS ..........................................................220
APPENDIX A DEVELOPMENT TOOLS ..............................................................................................221
A.1 Software Package.....................................................................................................................223
A.2 Language Processing Software..............................................................................................223
A.3 Control Software.......................................................................................................................224
A.4 Flash Memory Writing Tools ...................................................................................................224
A.5 Debugging Tools (Hardware) ..................................................................................................225
A.6 Debugging Tools (Software) ...................................................................................................226
A.7 Notes on Target System Design .............................................................................................227
APPENDIX B REGISTER INDEX.........................................................................................................229
User’s Manual U12978EJ3V0UD
13
B.1 Register Index (Alphabetic Order of Register Name) ...........................................................229
B.2 Register Index (Alphabetic Order of Register Symbol)........................................................ 231
APPENDIX C REVISION HISTORY ....................................................................................................233
14
User’s Manual U12978EJ3V0UD
LIST OF FIGURES (1/4)
Figure No. Title Page
2-1 Pin I/O Circuits ......................................................................................................................................... 34
3-1 Memory Map (
3-2 Memory Map (
3-3 Data Memory Addressing (
3-4 Data Memory Addressing (
3-5 Configuration of Program Counter ........................................................................................................... 40
3-6 Configuration of Program Status Word .................................................................................................... 40
3-7 Configuration of Stack Pointer ................................................................................................................. 42
3-8 Data to Be Saved to Stack Memory ......................................................................................................... 42
3-9 Data to Be Restored from Stack Memory................................................................................................. 42
3-10 Configuration of General-Purpose Registers ........................................................................................... 43
4-1 Port Types................................................................................................................................................ 57
4-2 Block Diagram of P00 to P07 ................................................................................................................... 60
4-3 Block Diagram of P10 to P17 ................................................................................................................... 61
4-4 Block Diagram of P20 .............................................................................................................................. 62
4-5 Block Diagram of P21 .............................................................................................................................. 63
4-6 Block Diagram of P22 .............................................................................................................................. 64
4-7 Block Diagram of P23 and P24 ................................................................................................................ 65
4-8 Block Diagram of P25 .............................................................................................................................. 66
4-9 Block Diagram of P26 .............................................................................................................................. 67
4-10 Block Diagram of P40 to P47 ................................................................................................................... 68
4-11 Format of Port Mode Register.................................................................................................................. 69
4-12 Format of Pull-up Resistor Option Register 0........................................................................................... 70
4-13 Format of Port Output Mode Register 0 ................................................................................................... 71
4-14 Format of Port Output Mode Register 1 ................................................................................................... 71
PD789800) ...................................................................................................................... 35
µ
PD78F9801).................................................................................................................... 36
µ
PD789800) .................................................................................................. 38
µ
PD78F9801) ................................................................................................ 39
µ
5-1 Block Diagram of Clock Generator........................................................................................................... 73
5-2 Format of Processor Clock Control Register............................................................................................ 74
5-3 External Circuit of System Clock Oscillator.............................................................................................. 75
5-4 Examples of Incorrect Resonator Connection.......................................................................................... 76
5-5 Switching of CPU Clock ........................................................................................................................... 78
6-1 Block Diagram of 8-Bit Timer 00 .............................................................................................................. 80
6-2 Block Diagram of 8-Bit Timer/Event Counter 01 ...................................................................................... 81
6-3 Format of 8-Bit Timer Mode Control Register 00 ..................................................................................... 82
6-4 Format of 8-Bit Timer Mode Control Register 01 ..................................................................................... 83
6-5 Format of Port Mode Register 2............................................................................................................... 84
6-6 Interval Timer Operation Timing of 8-Bit Timer 00 ................................................................................... 86
User’s Manual U12978EJ3V0UD
15
LIST OF FIGURES (2/4)
Figure No. Title Page
6-7 Interval Timer Operation Timing of 8-Bit Timer/Event Counter 01............................................................ 86
6-8 Timing of External Event Counter Operation (with Rising Edge Specified).............................................. 87
6-9 Timing of Square-Wave Output ................................................................................................................89
6-10 Start Timing of 8-Bit Timer Counter.......................................................................................................... 90
6-11 Timing of External Event Counter Operation............................................................................................ 90
7-1 Block Diagram of Watchdog Timer........................................................................................................... 92
7-2 Format of Timer Clock Select Register 2.................................................................................................. 93
7-3 Format of Watchdog Timer Mode Register............................................................................................... 94
8-1 USB Bus Topology (Desktop Type PC).................................................................................................... 97
8-2 Block Diagram of USB Function ...............................................................................................................99
8-3 Block Diagram of USB Timer.................................................................................................................. 100
8-4 Configuration of Receive Token Bank .................................................................................................... 102
8-5 Configuration of Receive Data Bank ......................................................................................................103
8-6 Configuration of Transmit Data Bank 0 (Buffer 0)................................................................................... 104
8-7 Configuration of Transmit Data Bank 1 (Buffer 1)................................................................................... 105
8-8 Configuration of TIDCMP and ADRCMP ................................................................................................ 107
8-9 Configuration of DIDCMP .......................................................................................................................108
8-10 Format of USB Receiver Enable Register .............................................................................................. 109
8-11 Format of Data/Handshake Packet Receive Mode Register .................................................................. 110
8-12 Format of Packet Receive Status Register............................................................................................. 112
8-13 Format of Data/Handshake Packet Receive Result Store Register .......................................................113
8-14 Format of Token Packet Receive Result Store Register ........................................................................ 114
8-15 Format of Data Packet Transmit Reservation Register .......................................................................... 115
8-16 Format of Handshake Packet Transmit Reservation Register................................................................116
8-17 Configuration of Handshake Packet Transmit Reservation Register......................................................119
8-18 Format of USB Timer Start Reservation Control Register...................................................................... 120
8-19 Format of Remote Wakeup Control Register..........................................................................................121
8-20 Flowchart of USB Timer Operation......................................................................................................... 123
8-21 Flow Chart of Remote Wakeup Control Operation .................................................................................125
8-22 Configuration of Remote Wakeup Control.............................................................................................. 126
8-23 Timing of Data/Handshake Packet Receive Interrupt Request Generation............................................127
8-24 Timing of INTUSBRE Generation........................................................................................................... 128
8-25 Flowchart of Transmit/Receive Pointer Operation.................................................................................. 140
8-26 Flowchart of Receive Bank Switching ID Detection Buffer Operation ....................................................147
8-27 Timing of Sync Detection/USBCLK Detector Operation......................................................................... 148
8-28 Timing of Sync Detection/USBCLK Generation Operation..................................................................... 148
8-29 Flowchart of Sync Detection/USBCLK Detector Operation ....................................................................149
8-30 Timing of NRZI Encoder Operation ........................................................................................................150
16
User’s Manual U12978EJ3V0UD
LIST OF FIGURES (3/4)
Figure No. Title Page
8-31 Flow Chart of NRZI Encoder Operation ................................................................................................. 150
8-32 Timing of Bit Stuffing/Strip Controller Operation .................................................................................... 151
8-33 Flow Chart of Bit Stuffing Control Operation .......................................................................................... 152
8-34 Flow Chart of Bit Strip Control Operation............................................................................................... 153
9-1 Block Diagram of Serial Interface 10...................................................................................................... 156
9-2 Format of Serial Operation Mode Register 10........................................................................................ 157
9-3 3-Wire Serial I/O Mode Timing............................................................................................................... 161
10-1 Block Diagram of Regulator and USB Driver/Receiver .......................................................................... 162
11-1 Basic Configuration of Interrupt Function............................................................................................... 165
11-2 Format of Interrupt Request Flag Register............................................................................................. 167
11-3 Format of Interrupt Mask Flag Register.................................................................................................. 168
11-4 Format of External Interrupt Mode Register 0........................................................................................ 168
11-5 Configuration of Program Status Word .................................................................................................. 169
11-6 Format of Key Return Mode Register 00................................................................................................ 170
11-7 Block Diagram of Falling Edge Detector ................................................................................................ 170
11-8 Flowchart of Non-Maskable Interrupt Request Acknowledgment .......................................................... 172
11-9 Timing of Non-Maskable Interrupt Request Acknowledgment ............................................................... 172
11-10 Acknowledging Non-Maskable Interrupt Request .................................................................................. 172
11-11 Interrupt Acknowledgment Program Algorithm....................................................................................... 173
11-12 Timing of Interrupt Request Acknowledgment (Example of MOV A,r) ................................................... 174
11-13 Timing of Interrupt Request Acknowledgment
(When Interrupt Request Flag Is Generated at Last Clock of Instruction Execution)............................. 174
11-14 Example of Multiplexed Interrupt Servicing............................................................................................ 176
12-1 Format of Oscillation Stabilization Time Select Register ....................................................................... 179
12-2 Releasing HALT Mode by Interrupt........................................................................................................ 181
12-3 Releasing HALT Mode by RESET Input ................................................................................................ 182
12-4 Releasing STOP Mode by Interrupt ....................................................................................................... 184
12-5 Releasing STOP Mode by RESET Input................................................................................................ 185
13-1 Block Diagram of Reset Function........................................................................................................... 186
13-2 Reset Timing by RESET Input ............................................................................................................... 187
13-3 Reset Timing by Overflow in Watchdog Timer....................................................................................... 187
13-4 Reset Timing by RESET Input in STOP Mode....................................................................................... 187
14-1 Environment for Writing Program to Flash Memory ............................................................................... 191
14-2 Communication Mode Selection Format ................................................................................................ 192
User’s Manual U12978EJ3V0UD
17
LIST OF FIGURES (4/4)
Figure No. Title Page
14-3 Example of Connection with Dedicated Flash Programmer ................................................................... 193
14-4 VPP
14-5 Signal Conflict (Input Pin of Serial Interface).......................................................................................... 196
14-6 Abnormal Operation of Other Device......................................................................................................196
14-7 Signal Conflict (RESET Pin) ................................................................................................................... 197
14-8 Wiring Example for Flash Writing Adapter with 3-Wire Serial I/O........................................................... 198
14-9 Wiring Example for Flash Writing Adapter with Pseudo-3-Wire Method ................................................199
A-1 Development Tools................................................................................................................................. 222
A-2 Distance Between In-Circuit Emulator and Conversion Adapter ............................................................227
A-3 Connection Condition of Target System (NP-H44GB-TQ)......................................................................228
Pin Connection Example.................................................................................................................. 195
18
User’s Manual U12978EJ3V0UD
LIST OF TABLES (1/2)
Table No. Title Page
2-1 Type of Pin I/O Circuit Recommended Connection of Unused Pins ........................................................ 33
3-1 Vector Table............................................................................................................................................. 37
3-2 Special Function Register List.................................................................................................................. 45
4-1 Functions of Ports .................................................................................................................................... 58
4-2 Configuration of Port ................................................................................................................................ 59
4-3 Port Mode Register and Output Latch Settings When Using Alternate Functions ................................... 70
5-1 Configuration of Clock Generator............................................................................................................. 73
5-2 Maximum Time Required for Switching CPU Clock ................................................................................. 78
6-1 Interval Time of 8-Bit Timer 00................................................................................................................. 79
6-2 Interval Time of 8-Bit Timer/Event Counter 01......................................................................................... 79
6-3 Square Wave Output Range of 8-Bit Timer/Event Counter 01................................................................. 80
6-4 Configuration of 8-Bit Timer/Event Counters 00 and 01........................................................................... 80
6-5 Interval Time of 8-Bit Timer 00................................................................................................................. 85
6-6 Interval Time of 8-Bit Timer/Event Counter 01......................................................................................... 85
6-7 Square-Wave Output Range of 8-Bit Timer/Event Counter 01 ................................................................ 88
7-1 Inadvertent Loop Detection Time of Watchdog Timer.............................................................................. 91
7-2 Interval Time ............................................................................................................................................ 91
7-3 Configuration of Watchdog Timer ............................................................................................................ 92
7-4 Inadvertent Loop Detection Time of Watchdog Timer.............................................................................. 95
7-5 Interval Time of Interval Timer ................................................................................................................. 96
8-1 Configuration of USB Function................................................................................................................. 98
8-2 Flag of RXSTAT After Reception of USB Reset Signal and Resume Signal ......................................... 113
8-3 Conditions in Transmit Reservation ....................................................................................................... 117
8-4 List of Sources of Interrupts from USB Function.................................................................................... 127
9-1 Configuration of Serial Interface 10........................................................................................................ 155
9-2 Operating Mode Settings of Serial Interface 10 ..................................................................................... 158
11-1 Interrupt Source List............................................................................................................................... 164
11-2 Flags Corresponding to Interrupt Request Signals ................................................................................ 166
11-3 Time from Generation of Maskable Interrupt Request to Servicing ....................................................... 173
12-1 HALT Mode Operation Status ................................................................................................................ 180
12-2 Operation After Release of HALT Mode................................................................................................. 182
User’s Manual U12978EJ3V0UD
19
LIST OF TABLES (2/2)
Table No. Title Page
12-3 STOP Mode Operation Status................................................................................................................ 183
12-4 Operation After Release of STOP Mode ................................................................................................185
13-1 Hardware Status After Reset.................................................................................................................. 188
14-1 Differences Between
14-2 Communication Mode List...................................................................................................................... 192
14-3 Pin Connection List.................................................................................................................................194
15-1 Operand Identifiers and Description Methods ........................................................................................200
18-1 Surface Mounting Type Soldering Conditions ........................................................................................220
PD78F9801 and Mask ROM Versions ...............................................................190
µ
20
User’s Manual U12978EJ3V0UD
CHAPTER 1 GENERAL
1.1 Features
• On-chip USB functions
• Implements a USB (Universal Serial Bus) by connecting to Hub and Host.
• Transfer speed: 1.5 Mbps (at 6.0 MHz operation with system clock)
• On-chip regulator
• Controls the USB port voltage by using a bus power supply (VREG
driver/receiver.
• On-chip ROM and RAM
• Internal ROM: 8 KB
Flash memory (for µPD78F9801 only): 16 KB
• Internal high-speed RAM: 256 bytes
• Variable minimum instruction execution time: From high-speed (0.33 µs) to low speed (1.33 µs) with the system
clock operating at 6.0 MHz
• 31 I/O ports
• Two serial interface channels
• USB function
• 3-wire serial I/O mode
• Three timers:
• 8-bit timer
• 8-bit timer/event counter
• Watchdog timer
• On-chip key return signal detector
• 12 vectored interrupt sources
• Power supply voltage: VDD = 4.0 to 5.5 V
• Operating ambient temperature: TA = –40 to +85°C (when the USB is not operating)
TA = 0 to +70°C (when the USB is operating)
TA = 10 to 40°C (when the flash memory is written)
= 3.3 ±0.3 V) dedicated to the USB
1.2 Applications
USB keyboards, etc.
1.3 Ordering Information
Part Number Package Internal ROM
PD789800GB-×××-8ES 44-pin plastic LQFP (10 × 10) Mask ROM
µ
PD78F9801GB-8ES 44-pin plastic LQFP (10 × 10) Flash memory
µ
Remark ××× indicates ROM code suffix.
User’s Manual U12978EJ3V0UD
21
1.4 Pin Configuration (Top View)
• 44-pin plastic LQFP (10 × 10)
PD789800GB-×××-8ES, µPD78F9801GB-8ES
µ
CHAPTER 1 GENERAL
P05
P06
P07
P20/SCK10
P21/SO10
P22/SI10
P23NCP24
P25
P26/TI01/TO01/INTP0
44 43 42 41 40 39 38 37 36 35 34
P04
P03
P02
P01
P00
V
V
P17
P16
P15
P14
DD1
SS1
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
NC
P13
P12
P11
P10
P47/KR07
P46/KR06
Cautions 1. Connect the IC pin directly to the VSS0 pin.
2. Directly connect the VPP pin to the VSS0 pin in the normal operation mode.
P45/KR05
P44/KR04
P43/KR03
33
32
31
30
29
28
27
26
25
24
23
P42/KR02
USBDP
USBDM
IC (V
PP
)
REGC
DD0
V
V
SS0
X1
X2
RESET
P40/KR00
P41/KR01
Remark The parenthesized values apply to the
PD78F9801.
µ
IC: Internally connected SI10: Serial data input
INTP0: Interrupt from peripherals SO10: Serial data output
KR00 to KR07 :
Key return TI01: Timer input
NC: No connection TO01: Timer output
P00 to P07: Port 0 USBDM, USBDP: Universal serial bus data
P10 to P17: Port 1 VDD0
P20 to P26: Port 2 V
: Port power supply
: Power supply
DD1
P40 to P47: Port 4 VPP: Programming power supply
RESET : Reset V
REGC: Voltage regulator for USB function VSS1
: Port ground
SS0
: Ground
SCK10 : Serial clock input/output X1, X2: Crystal
22
User’s Manual U12978EJ3V0UD
CHAPTER 1 GENERAL
1.5 78K/0S Series Lineup
The products in the 78K/0S Series are listed below. The names enclosed in boxes are subseries names.
78K/0S
Series
44-pin
42-/44-pin
30-pin
30-pin
28-pin
20-pin
20-pin
44-pin
44-pin
30-pin
30-pin
30-pin
30-pin
30-pin
30-pin
144-pin
88-pin
80-pin
80-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
52-pin
52-pin
Products in mass
production
Y subseries supports SMB.
Small-scale package, general-purpose applications
µ
µ
PD789046
PD789026
µ
µ
PD789088
µ
PD789074
µ
PD789014
µ
PD789062
µ
PD789052
Small-scale package, general-purpose applications and A/D function
PD789177Y
µ
PD789177
PD789167
µ
µ
PD789156
µ
PD789146
µ
PD789134A
µ
PD789124A
µ
PD789114A
PD789104A
µ
µ
µ
PD789167Y
PD789074 with subsystem clock added
PD789014 with enhanced timer function and expanded ROM and RAM
µ
PD789074 with enhanced timer function and expanded ROM and RAM
µ
PD789026 with enhanced timer function
µ
On-chip UART and capable of low-voltage (1.8 V) operation
RC oscillation version of PD789052
PD789860 without EEPROMTM, POC, and LVI
µ
PD789167 with 10-bit A/D
µ
µ
PD789104A with enhanced timer
PD789146 with 10-bit A/D
µ
PD789104A with EEPROM
µ
µ
PD789124A with 10-bit A/D
RC oscillation version of PD789104A
PD789104A with 10-bit A/D
µ
PD789026 with 8-bit A/D and multiplier added
µ
LCD drive
µ
PD789835
PD789830
µ
PD789489
µ
µ
PD789479
PD789417A
µ
µ
PD789407A
µ
PD789456
µ
PD789446
µ
PD789436
PD789426
µ
µ
PD789316
µ
PD789306
µ
PD789467
µ
PD789327
UART + 8-bit A/D + dot LCD (total display outputs: 96)
UART + dot LCD (40 × 16)
SIO + 10-bit A/D + internal voltage boosting method LCD (28 × 4)
SIO + 8-bit A/D + resistance division method LCD (28 × 4)
µ
PD789407A with 10-bit A/D
SIO + 8-bit A/D + resistance division method LCD (28 × 4)
PD789446 with 10-bit A/D
µ
SIO + 8-bit A/D + internal voltage boosting method LCD (15 × 4)
µ
PD789426 with 10-bit A/D
SIO + 8-bit A/D + internal voltage boosting method LCD (5 × 4)
RC oscillation version of PD789306
SIO + internal voltage boosting method LCD (24 × 4)
8-bit A/D + internal voltage boosting method LCD (23 × 4)
SIO + resistance division method LCD (24 × 4)
µ
µ
µ
Products under
development
TM
added
44-pin
44-pin
30-pin
30-pin
20-pin
20-pin
52-pin
64-pin
USB
µ
PD789800
Inverter control
µ
PD789842
On-chip bus controller
PD789850
µ
Keyless entry
µ
PD789862
PD789861
µ
PD789860
µ
VFD drive
µ
PD789871
Meter control
µ
PD789881
For PC keyboard. On-chip USB function
On-chip inverter controller and UART
On-chip CAN controller
PD789860 with enhanced timer function, SIO, and expanded ROM and RAM
µ
RC oscillation version of PD789860
On-chip POC and key return circuit
On-chip VFD controller (total display outputs: 25)
UART + resistance division method LCD (26 × 4)
Remark VFD (Vacuum Fluorescent Display) is referred to as FIP
documents, but the functions of the two are same.
User’s Manual U12978EJ3V0UD
µ
TM
(Fluorescent Indicator Panel) in some
23
CHAPTER 1 GENERAL
The major differences between subseries are shown below.
Series for General-Purpose and LCD Drive
Subseries
Smallscale
package,
generalpurpose
applications
Smallscale
package,
generalpurpose
applications +
A/D
converter
LCD
drive
Function
PD789046 16 K 1 ch
µ
PD789026 4 K to 16 K
µ
PD789088
µ
PD789074 2 K to 8 K 1 ch
µ
PD789014 2 K to 4 K 2 ch
µ
PD789062 4 K
µ
PD789052
µ
PD789177
µ
PD789167
µ
PD789156
µ
PD789146
µ
PD789134A
µ
PD789124A 4 ch
µ
PD789114A
µ
PD789104A
µ
PD789835
µ
PD789830 24 K 1 ch
µ
PD789489
µ
PD789479
µ
PD789417A
µ
PD789407A
µ
PD789456
µ
PD789446 6 ch
µ
PD789436
µ
PD789426
µ
PD789316 RC-oscillation
µ
PD789306
µ
PD789467 1 ch
µ
PD789327
µ
ROM
Capacity
(Bytes)
16 K to 32 K
16 K to 24 K
8 K to 16 K
2 K to 8 K
24 K to 60 K
32 K to 48 K
24 K to 48 K
12 K to 24 K
12 K to 16 K
8 K to 16 K
4 K to 24 K
Note Flash memory version: 3.0 V
Timer V
8-Bit 16-Bit Watch WDT
1 ch
1 ch 34
−
3 ch
−
3 ch 1 ch
1 ch
−
−
−
1 ch 1 ch
1 ch
6 ch
1 ch
3 ch
2 ch
8-Bit
10-Bit
A/D
1 ch
−−
−
1ch
8 ch
8 ch
−
4 ch
4 ch
−
4 ch
−
4 ch
4 ch
3 ch 37 1.8 V
−
8 ch
8 ch
−
7 ch
7 ch
−
6 ch
−
6 ch
6 ch
−
−
Serial Interface I/O
A/D
1 ch (UART: 1ch)
1 ch (UART: 1ch)
−
−
−
−
−
1 ch (UART: 1ch)
2 ch (UART: 1ch) 45
−
1 ch (UART: 1ch) 43
−
−
−
2 ch (UART: 1ch) 23
1 ch 21
−
−
24
22
14 RC-oscillation
31
20
30 2.7 V
30
40
18
DD
MIN.Value
1.8 V
1.8 V
Note
1.8 V
Remarks
−
version
−
−
On-chip
EEPROM
RC-oscillation
version
−
Dot LCD
supported
−
version
−
24
User’s Manual U12978EJ3V0UD
Series for ASSP
CHAPTER 1 GENERAL
Function
Subseries
ROM
Capacity
(Bytes)
USB
Inverter
control
On-chip
bus
controller
Keyless
PD789800 8 K 2 ch
µ
PD789842 8 K to 16 K 3 ch
µ
PD789850 16 K 1 ch 1 ch
µ
PD789861 1.8 V RC-oscillation
µ
4 K 2 ch
entry
PD789860
µ
PD789862 16 K 1 ch 2 ch 1 ch (UART: 1ch) 22
µ
VFD
PD789871 4 K to 8 K 3 ch
µ
drive
Meter
PD789881 16 K 2 ch 1 ch
µ
control
Notes 1. 10-bit timer: 1 channel
2. Flash memory version: 3.0 V
Timer V
8-Bit 16-Bit Watch WDT
−−
Note 1
−−
−
1 ch
1 ch 1 ch 8 ch
−
1 ch 4 ch
1 ch
1 ch 1 ch
−
1 ch
8-Bit
10-Bit
A/D
−−
Serial Interface I/O
A/D
2 ch (USB: 1ch) 31 4.0 V
−
1 ch (UART: 1ch) 30 4.0 V
−
2 ch (UART: 1ch) 18 4.0 V
−− −
−−
−−
1 ch 33 2.7 V
1 ch (UART: 1 ch) 28 2.7 V
14
DD
MIN.Value
Note 2
Remarks
−
−
−
version,
on-chip
EEPROM
On-chip
EEPROM
−
−
User’s Manual U12978EJ3V0UD
25
1.6 Block Diagram
CHAPTER 1 GENERAL
KR00 to KR07
TI01/TO01/P26/INTP0
REGC
USBDM
USBDP
SCK10/P20
SO10/P21
SI10/P22
INTP0/P26
Key return 0
8-bit timer 00
8-bit timer/event
counter 01
Watchdog timer
Regulator
V
REG
USB
function 0
Serial
interface 1
Interrupt
control
78K/0S
CPU
core
RAM
V
DD0VDD1VSS0VSS1
ROM
Flash
memory
IC
(VPP)
Port 0
Port 1
Port 2
Port 4
System control
P00 to P07
P10 to P17
P20 to P26
P40 to P47
RESET
X1
X2
Remark The parenthesized values apply to the
PD78F9801.
µ
26
User’s Manual U12978EJ3V0UD
1.7 Functions
CHAPTER 1 GENERAL
Product
PD789800
µ
Item
Internal memory ROM Mask ROM
8 KB
Flash memory
16 KB
High-speed RAM 256 bytes
Minimum instruction execution time 0.33 µs/1.33 µs (at 6.0 MHz operation with system clock)
Instruction set • 16-bit operation
• Bit manipulation (set, reset, and test) etc.
I/O ports CMOS I/O 31
(Of the above COMS I/O ports, 18 ports can be switched to N-ch open-drain
I/O ports.)
Serial interface • USB (Universal Serial Bus) function: 1 channel
• Three-wired serial I/O mode: 1 channel
Timer • 8-bit timer: 1 channel
• 8-bit timer/event counter: 1 channel
• Watchdog timer: 1 channel
Regulator Incorporated (V
Vector interrupt
sources
Maskable
Non-maskable Internal: 1
Internal: 9, external: 2
= 3.3 ±0.3 V)
REG
Power supply voltage VDD = 4.0 to 5.5 V
Operating ambient temperature • TA = –40 to +85°C (when the USB is not operating)
•T
= 0 to +70°C (when the USB is operating)
A
•T
= 10 to 40°C (when a flash memory is written)
A
Package 44-pin plastic LQFP (10 × 10)
PD78F9801
µ
An outline of the timer is shown below.
Operation mode
Function
8-Bit Timer 00 8-Bit Timer/
Event Counter 01
Interval timer 1 channel 1 channel 1 channel
External event counter −−−− 1 channel −−−−
Timer outputs −−−− 1 output −−−−
Square-wave outputs −−−− 1 output −−−−
Capture −−−−−
−−
−−
Interrupt sources 1 1 2
Watchdog Timer
Note
−
−−
Note The watchdog timer has watchdog timer and interval timer functions. However, use the watchdog timer by
selecting either the watchdog timer function or interval timer function.
User’s Manual U12978EJ3V0UD
27
CHAPTER 2 PIN FUNCTIONS
2.1 List of Pin Functions
(1) Port pins
Pin Name I/O Function After Reset Alternate
Function
P00 to P07 I/O Port 0
8-bit I/O port
Input/output can be specified in 1-bit units.
When used as an input port, use of on-chip pull-up resistors can be
specified by pull-up resistor option register 0 (PU0).
When used as an output port, CMOS output or N-ch open-drain
output can be specified in 8-bit units by port output mode register 0
(POM0).
P10 to P17 I/O Port 1
8-bit I/O port
Input/output can be specified in 1-bit units.
When used as an input port, use of on-chip pull-up resistors can be
specified by pull-up resistor option register 0 (PU0).
When used as an output port, CMOS output or N-ch open-drain
output can be specified in 8-bit units by port output mode register 0
(POM0).
P20
P21 SO10
P22 SI10
P23 to P25 —
P26
P40 to P47 I/O Port 4
I/O Port 2
7-bit I/O port
Input/output can be specified in 1-bit units.
When used as an input port, use of on-chip pull-up resistors can be
specified by pull-up resistor option register 0 (PU0).
When P25 or P26 is used as an output port, CMOS output or N-ch
open-drain output can be specified in 1-bit units by port output mode
register 1 (POM1).
8-bit I/O port
Input/output can be specified in 1-bit units.
When used as an input port, use of on-chip pull-up resistors can be
specified by pull-up resistor option register 0 (PU0).
Input —
Input —
Input
Input
SCK10
INTP0/TI01/TO01
KR00 to KR07
28
User’s Manual U12978EJ3V0UD
CHAPTER 2 PIN FUNCTIONS
(2) Non-port pins
Pin Name I/O Function After Reset Alternate
Function
INTP0 Input External interrupt request input for which valid edge (rising
and/or falling edge) can be specified
KR00 to
Input Input for detecting key return signals Input P40 to P47
KR07
NC — No connection. Can be left open. — —
REGC — Internally generated power supply for driving USB
RESET
SCK10
driver/receiver. Connect this pin to V
Input System reset input Input —
I/O Serial clock input/output for serial interface Input P20
via a 22 µF capacitor.
SS
SI10 Input Serial data input for serial interface Input P22
SO10 Output Serial data output for serial interface Input P21
TI01 Input External count clock input to 8-bit timer TM01 Input P26/INTP0/TO01
TO01 Output Output from 8-bit timer TM01 Input P26/INTP0/TI01
USBDM I/O Serial data input/output (negative side) for USB function. The
pull-up resistor (1.5 kΩ) for the USBDM pin must be
connected to the REGC pin.
USBDP I/O Serial data input/output (positive side) for USB function Input —
V
DD0
V
DD1
V
SS0
V
SS1
X1 Input Input —
— Positive power supply for ports — —
— Positive power supply for circuits other than ports — —
— Ground potential for ports — —
— Ground potential for circuits other than ports — —
Crystal resonator connection to for system clock oscillator
X2 —
IC — Internally connected directly to V
V
PP
— Sets flash memory programming mode. Apply high voltage
SS0
when a program is written or verified.
Input P26/TI01/TO01
——
Input —
——
——
——
User’s Manual U12978EJ3V0UD
29
CHAPTER 2 PIN FUNCTIONS
2.2 Pin Functions
2.2.1 P00 to P07 (Port 0)
These pins constitute an 8-bit I/O port and can be set to the input or output port mode in 1-bit units by using port
mode register 0 (PM0). When these pins are used as an input port, an on-chip pull-up resistor can be used by
setting pull-up resistor option register 0 (PU0). When these pins are used as an output port, CMOS output or N-ch
open-drain output can be specified in 8-bit units by setting port output mode register 0 (POM0).
2.2.2 P10 to P17 (Port 1)
These pins constitute an 8-bit I/O port. Port 1 can be set to the input or output mode in 1-bit units by using port
mode register 1 (PM1). When the port is used as an input port, an on-chip pull-up resistor can be used by setting
pull-up resistor option register 0 (PU0). When these pins are used as an output port, CMOS output or N-ch open-
drain output can be specified in 8-bit units by setting port output mode register 0 (POM0).
2.2.3 P20 to P26 (Port 2)
These pins constitute a 7-bit I/O port. In addition, these pins function as data I/O, and clock I/O to and from the
serial interface, external interrupt input, and timer I/O.
Port 2 can be specified in the following operation modes in 1-bit units.
(1) Port mode
In the port mode, P20 to P26 function as a 7-bit I/O port. Port 2 can be set to the input or output mode in 1-bit
units by using port mode register 2 (PM2). When the port is used as an input port, an on-chip pull-up resistor
can be used by setting pull-up resistor option register 0 (PU0). When P25 or P26 is used as an output port,
CMOS output or N-ch open-drain output can be specified by setting in 1-bit units port output mode register 1
(POM1).
(2) Control mode
In this mode, P20 to P26 function as the data I/O and the clock I/O to and from the serial interface.
(a) SI10, SO10
These are the serial data I/O pins of the serial interface.
(b) SCK10
This is the serial clock I/O pin of the serial interface.
(c) TI01
This is the external clock input pin for the 8-bit timer/event counter.
(d) TO01
This is the output pin of the 8-bit timer.
(e) INTP0
This is an external interrupt input pin for which the valid edge (rising edge, falling edge, or both rising and
falling edges) can be specified.
Caution When using P20 to P26 as serial interface pins, the I/O mode and output latch must be set
according to the functions to be used. For setting details, see Table 9-2.
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User’s Manual U12978EJ3V0UD
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