DATA SHEET
MOS INTEGRATED CIRCUIT
MC-4516CA727
16M-WORD BY 72-BIT SYNCHRONOUS DYNAMIC RAM MODULE
UNBUFFERED TYPE
★
Description
The MC-4516CA727EF and MC-4516CA727PF are 16,777,216 words by 72 bits synchronous dynamic RAM
module on which 9 pieces of 128M SDRAM: µPD45128841 are assembled.
This module provides high density and large quantities of memory in a small space without utilizing the surfacemounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
• 16,777,216 words by 72 bits organization (ECC Type)
• Clock frequency and access time from CLK
Part number /CAS latency Clock frequency Access time from CLK
(MAX.) (MAX.)
MC-4516CA727EF-A75 CL = 3 133 MHz
★
MC-4516CA727PF-A75 CL = 3 133 MHz
★
★
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length (1, 2, 4, 8 and full page)
• Programmable wrap sequence (sequential / interleave)
• Programmable /CAS latency (2, 3)
★
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• All DQs have 10 Ω ±10 % of series resistor
• Single 3.3 V ± 0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles/64 ms
• Burst termination by Burst Stop command and Precharge command
• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)
• Unbuffered type
• Serial PD
CL = 2 100 MHz
CL = 2 100 MHz
5.4 ns
6.0 ns
5.4 ns
6.0 ns
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14409EJ2V0DS00 (2nd edition)
Date Published January 2000 NS CP(K)
Printed in Japan
The mark
••••
shows major revised points.
©
1999
Ordering Information
MC-4516CA727
Part number Clock frequency
(MAX.)
MC-4516CA727EF-A75 133 MHz 168-pin Dual In-line Memory Module 9 pieces of µPD45128841G5 (Rev. E)
(Socket Type) (10.16 mm (400) TSOP (II))
MC-4516CA727PF-A75 Edge connector : Gold plated 9 pieces of µPD45128841G5 (Rev. P)
★
34.93 mm height (10.16 mm (400) TSOP (II))
Package Mounted devices
2
Data Sheet M14409EJ2V0DS00
Pin Configuration
★
168-pin Dual In-line Memory Module Socket Type (Edge connector: Gold plated)
MC-4516CA727
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
SS
V
DQ32
DQ33
DQ34
DQ35
Vcc
DQ36
DQ37
DQ38
DQ39
DQ40
SS
V
DQ41
DQ42
DQ43
DQ44
DQ45
Vcc
DQ46
DQ47
CB4
CB5
SS
V
NC
NC
Vcc
/CAS
DQMB4
DQMB5
NC
/RAS
SS
V
A1
A3
A5
A7
A9
BA0
A11
Vcc
CLK1
NC
SS
V
CKE0
NC
DQMB6
DQMB7
NC
Vcc
NC
NC
CB6
CB7
SS
V
DQ48
DQ49
DQ50
DQ51
Vcc
DQ52
NC
NC
NC
SS
V
DQ53
DQ54
DQ55
SS
V
DQ56
DQ57
DQ58
DQ59
Vcc
DQ60
DQ61
DQ62
DQ63
SS
V
CLK3
NC
SA0
SA1
SA2
Vcc
(A13)
DQMB0
DQMB1
BA1
DQMB2
DQMB3
V
DQ0
DQ1
DQ2
DQ3
Vcc
DQ4
DQ5
DQ6
DQ7
DQ8
V
DQ9
DQ10
DQ11
DQ12
DQ13
Vcc
DQ14
DQ15
CB0
CB1
V
NC
NC
Vcc
/WE
/CS0
NC
V
A10
(A12)
Vcc
Vcc
CLK0
V
NC
/CS2
NC
Vcc
NC
NC
CB2
CB3
V
DQ16
DQ17
DQ18
DQ19
Vcc
DQ20
NC
NC
NC
V
DQ21
DQ22
DQ23
V
DQ24
DQ25
DQ26
DQ27
Vcc
DQ28
DQ29
DQ30
DQ31
V
CLK2
NC
WP
SDA
SCL
Vcc
SS
SS
SS
SS
A0
A2
A4
A6
A8
SS
SS
SS
SS
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
A0 - A11 : Address Inputs
[Row: A0 - A11, Column: A0 – A9]
BA0
(A13),
BA1
(A12) : SDRAM Bank Select
DQ0 - DQ63,
CB0 - CB7 : Data Inputs/Outputs
CLK0 - CLK3 : Clock Input
CKE0 : Clock Enable Input
/CS0, /CS2 : Chip Select Input
/RAS : Row Address Strobe
/CAS : Column Address Strobe
/WE : Write Enable
DQMB0
-
DQMB7: DQ Mask Enable
SA0 - SA2 : Address Input for EEPROM
SDA : Serial Data I/O for PD
SCL : Clock Input for PD
CC
V
SS
V
: Power Supply
: Ground
WP : Write Protect
NC : No Connection
/xxx indica tes active low signal.
Data Sheet M14409EJ2V0DS00
3
Block Diagram
/WE
/CS0
DQMB0
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQM
MC-4516CA727
/CS2
DQMB2
/WE
/CS
D0
DQ 16
DQ 17
DQ 18
DQ 19
DQ 20
DQ 21
DQ 22
DQ 23
DQMD3/CS /WE
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQMB1
DQ 8
DQ 9
DQ 10
DQ 11
DQ 12
DQ 13
DQ 14
DQ 15
CB 0
CB 1
CB 2
CB 3
CB 4
CB 5
CB 6
CB 7
DQMB4
DQ 32
DQ 33
DQ 34
DQ 35
DQ 36
DQ 37
DQ 38
DQ 39
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQ 4
DQ 7
DQ 0
DQ 2
DQ 6
DQ 5
DQ 3
DQ 1
DQ 4
DQ 7
DQ 6
DQ 5
DQ 3
DQ 2
DQ 1
DQ 0
DQM
/CS
D1
DQM
/CS
D2
DQM /CS
D5
/WE
/WE
/WE
DQMB3
DQ 24
DQ 25
DQ 26
DQ 27
DQ 28
DQ 29
DQ 30
DQ 31
DQMB6
DQ 48
DQ 49
DQ 50
DQ 51
DQ 52
DQ 53
DQ 54
DQ 55
DQMB7
DQ 56
DQ 57
DQ 58
DQ 59
DQ 60
DQ 61
DQ 62
DQ 63
DQ 4
DQ 7
DQ 6
DQ 5
DQ 3
DQ 2
DQ 1
DQ 0
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQ 7
DQ 6
DQ 5
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQM
DQM
DQM
/WE
/CS
D4
/WE
/CS
D7
/CS
/WE
D8
DQMB5
DQ 40
DQ 41
DQ 42
DQ 43
DQ 44
DQ 45
DQ 46
DQ 47
Remarks 1.
4
DQ 5
DQ 7
DQ 6
DQ 4
DQ 3
DQ 2
DQ 1
DQ 0
DQM
/WE
/CS
D6
CLK0
CLK2
CLK1, CLK3
V
V
CC
SS
The value of all resistors is 10 Ω except WP.
2.
D0 - D8:
µ
PD45128841 (4M words × 8 bits × 4 banks)
Data Sheet M14409EJ2V0DS00
CLK : D0, D1, D2, D5, D6
CLK : D3, D4, D7, D8
3.3 pF
10 pF
D0 - D8
C
D0 - D8
SCL
A0 - A11
BA0
BA1
/RAS
/CAS
CKE0
SERIAL PD
A0
SA1 SA2
SA0
A1 A2
A0 - A11 : D0 - D8
A13 : D0 - D8
A12 : D0 - D8
/RAS : D0 - D8
/CAS : D0 - D8
CKE : D0 - D8
SDA
WP
47 kΩ
MC-4516CA727
Electrical Specifications
• All voltages are referenced to VSS (GND).
µ
• After power up, wait more than 100
device operation is achieved.
Absolute Maximum Ratings
Parameter Symbol Condition Rating Unit
Voltage on power supply pin relative to GND V
Voltage on input pin relative to GND V
Short circuit output c urrent I
Power dissipation P
Operating ambient tem perature T
Storage temperature T
Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
s and then, execute power on sequence and CBR (Auto) refresh before proper
CC
T
O
D
A
stg
–0.5 to +4.6 V
–0.5 to +4.6 V
50 mA
9W
0 to 70
–55 to +125
C
°
C
°
Recommended Operating Conditions
Parameter Symbol Condition MIN. TYP. MAX. Unit
Supply voltage V
High level input voltage V
Low level input voltage V
Operating ambient tem perature T
Capacitance (TA = 25
C, f = 1 MHz)
°°°°
Parameter Symbol Test condition MIN. TYP . MAX. Unit
Input capacitance C
Data input/output capaci t ance C
CC
IH
IL
A
I1
I2
C
I3
C
I4
C
I5
C
I/O
3.0 3.3 3.6 V
2.0 VCC + 0.3 V
0.3 +0.8 V
−
A0 - A11, BA0(A13), BA1(A12), /RAS,
070
40 66 pF
°
/CAS, /WE
CLK0, CLK2 24 40
CKE0 34 56
/CS0, /CS2 17 33
DQMB0 - DQMB7 7 17
DQ0 - DQ63, CB0 - CB7 7 13 pF
C
Data Sheet M14409EJ2V0DS00
5
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter Symbol Test condition MIN. MAX. Unit Notes
★
Operating current I
Precharge standby current in I
power down mode I
★
Precharge standby current in
non power down mode
Active standby current i n I
power down mode I
Active standby current i n I
non power down mode Input signals are changed one time during 30 ns.
CC1
Burst length = 1
RC ≥ tRC(MIN.)
t
CC2
P CKE ≤ V
CC2
PS CKE ≤ V
CC2
I
NCKE
IL(MAX.)
IL(MAX.)
≥ VIH(MIN.)
, IO = 0 mA
CK = 15
, t
CK =
, t
CK = 15
, t
ns 9 mA
∞
ns, /CS
Input signals are changed one time during 30
CC2
I
NS CKE ≥ V
IH(MIN.)
, t
CK =
∞
Input signals are stable.
CC3
P CKE ≤ V
CC3
PS CKE ≤ V
CC3
NCKE
CC3
I
NS CKE ≥ V
IL(MAX.)
IL(MAX.)
≥ VIH(MIN.)
IH(MIN.)
CK = 15
, t
, t
, t
, t
ns 45 mA
∞
CK =
CK = 15
ns, /CS
∞
CK =
, Input signals are st abl e. 180
≥ VIH(MIN.)
≥ VIH(MIN.)
/CAS latency = 2
/CAS latency = 3
,
, 270 mA
ns.
MC-4516CA727
900 mA 1
945
9
180 mA
72
36
★
Operating current (Burst mode) I
★
CBR (Auto) refresh current I
★
Self refresh current I
Input leakage current I
Output leakage current I
CC4tCK ≥ tCK(MIN.), IO
CC5tRC ≥ tRC(MIN.)
CC6
CKE ≤ 0.2 V18mA
=
I(L)VI
O(L)DOUT
0 to 3.6 V, All other pins not under test = 0 V – 9+ 9µA
is disabled, VO = 0 to 3.6 V–
= 0 mA
/CAS latency = 2
/CAS latency = 3
/CAS latency = 2
/CAS latency = 3
1.5 + 1.5µA
High level output voltage VOHIO = – 4 mA 2.4 V
Low level output voltage VOLIO = + 4 mA 0.4 V
Notes 1.
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
I
CC1
addition to this, I
CC4
2
.I
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC5
3
.I
is measured on condition that addresses are changed only one time during t
is measured on condition that addresses are changed only one time during t
CC4
is measured on condition that addresses are changed only one time during t
CK (MIN.)
1,080 mA 2
1,395
2,070 mA 3
2,160
CK (MIN.)
CK (MIN.)
.
.
.
6
Data Sheet M14409EJ2V0DS00
AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
★
Test Conditions
Parameter Value Unit
AC high level input voltage / low level input voltage 2.4 / 0.4 V
Input timing measurement reference level 1.4 V
Transition time (Input rise and fall time) 1 ns
Output timing measurement reference level 1.4 V
t
CK
t
CLK
Input
2.4 V
1.4 V
0.4 V
2.4 V
1.4 V
0.4 V
t
SETUPtHOLD
t
CH
t
AC
OH
t
CL
MC-4516CA727
Output
Data Sheet M14409EJ2V0DS00
7
Synchronous Characteristics
★
Parameter Symbol -A75 Unit Note
Clock cycle time /CAS latency = 3 t
/CAS latency = 2 t
Access time from CLK /CAS latency = 3 t
/CAS latency = 2 t
CLK high level width t
CLK low level width t
Data-out hold time t
Data-out low-impedance tim e t
Data-out high-impedance time /CAS latency = 3 t
/CAS latency = 2 t
Data-in setup time t
Data-in hold time t
Address setup time t
Address hold time t
CKE setup time t
CKE hold time t
CKE setup time (P ower down exit) t
Command (/CS0, /CS2, /RAS, /CAS, /WE,
DQMB0 - DQMB7) setup time
Command (/CS0, /CS2, /RAS, /CAS, /WE,
DQMB0 - DQMB7) hold time
CK3
CK2
AC3
AC2
CH
CL
OH
LZ
HZ3
HZ2
DS
DH
AS
AH
CKS
CKH
CKSP
CMS
t
CMH
t
MC-4516CA727
MIN. MAX.
7.5 (133 MHz) ns
10 (100 MHz) ns
5.4 ns 1
6.0 ns 1
2.5 ns
2.5 ns
3.0 ns 1
0ns
3.0 5.4 ns
3.0 6.0 ns
1.5 ns
0.8 ns
1.5 ns
0.8 ns
1.5 ns
0.8 ns
1.5 ns
1.5
0.8
ns
ns
Note 1.
Remark
Output load
Z = 50 Ω
Output
50 pF
These specifications are applied to the monolithic device.
8
Data Sheet M14409EJ2V0DS00
Asynchronous Characteristics
★
Parameter Symbol -A75 Unit Note
ACT to REF/ACT comm and peri od (operat i on) t
REF to REF/ACT command period (refresh) t
ACT to PRE command period t
PRE to ACT command period t
Delay time ACT to READ/WRITE command t
ACT(one) to ACT(another) command period t
Data-in to PRE command period t
Data-in to ACT(REF) command /CAS latency = 3 t
period (Auto precharge) /CAS latency = 2 t
Mode register set cycle time t
Transition time t
Refresh time (4,096 refres h cycles) t
RC
RC1
RAS
RP
RCD
RRD
DPL
DAL3
DAL2
RSC
REF
MC-4516CA727
MIN. MAX.
67.5 ns
67.5 ns
45 120,000 ns
20 ns
20 ns
15 ns
8ns
1CLK+22.5 ns 1
1CLK+20 ns 1
2CLK
T
0.5 30 ns
64 ms
Note
This device can satisfy the t
DAL3
spec of 1CLK+20 ns for up to and including 125 MHz operation.
Data Sheet M14409EJ2V0DS00
9
MC-4516CA727
Serial PD
Byte No. Function Described Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Notes
0 Defines the number of byt es written into
serial PD memory
1 Total number of bytes of serial PD memory 08H 0 0 0 0 1 0 0 0 256 bytes
2 Fundamental memory type 04H 0 0 0 0 0 1 0 0 SDRAM
3 Number of rows 0CH 0 0 0 0 1 1 0 0 12 rows
4 Number of columns 0AH 0 0 0 0 1 0 1 0 10 columns
5 Number of banks 01H 0 0 0 0 0 0 0 1 1 bank
6 Data width 48H 0 1 0 0 1 0 0 0 72 bits
7 Data width (continued) 00H 0 0 0 0 0 0 0 0 0
8 Voltage interface 01H 0 0 0 0 0 0 0 1 LVTTL
9 CL = 3 Cycle time 75H 0 1 1 1 0 1 0 1 7.5 ns
10 CL = 3 Access time 54H 0 1 0 1 0 1 0 0 5.4 ns
11 DIMM configuration type 02H 0 0 0 0 0 0 1 0 ECC
12 Refresh rate/type 80H 1 0 0 0 0 0 0 0 Normal
13SDRAM width 08H00001000×8
14 Error checking SDRAM width 08H 0 0 0 0 1 0 0 0×8
15 Minimum clock delay 01H 0 0 0 0 0 0 0 1 1 clock
16 Burst length supported 8FH 1 0 0 0 1 1 1 1 1, 2, 4, 8, F
17 Number of banks on each SDRAM 04H 0 0 0 0 0 1 0 0 4 banks
★
★
★
★
★
18 /CAS latency supported 06H 0 0 0 0 0 1 1 0 2, 3
19 /CS latency supported 01H 0 0 0 0 0 0 0 1 0
20 /WE latency supported 01H 0 0 0 0 0 0 0 1 0
21 SDRAM module attributes 00H 0 0 0 0 0 0 0 0
22 SDRAM device attributes : General 0EH 0 0 0 0 1 1 1 0
23 CL = 2 Cycle time A0H 1 0 1 0 0 0 0 0 10 ns
24 CL = 2 Access time 60H 0 1 1 0 0 0 0 0 6 ns
25-26 00H 0 0 0 0 0 0 0 0
RP(MIN.)
27 t
RRD(MIN.)
28 t
RCD(MIN.)
29 t
RAS(MIN.)
30 t
31 Module bank density 20H 0 0 1 0 0 0 0 0 128M bytes
80H 1 0 0 0 0 0 0 0 128 bytes
14H0001010020 ns
0FH 0 0 0 0 1 1 1 1 15 ns
14H0001010020 ns
2DH 0 0 1 0 1 1 0 1 45 ns
(1/2)
10
Data Sheet M14409EJ2V0DS00
MC-4516CA727
Byte No. Function Described Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Notes
32 Command and address signal input
setup time
33 Command and address signal input
hold time
34 Data signal input setup time 15H 0 0 0 1 0 1 0 1 1.5 ns
35 Data signal input hold time 08H 0 0 0 0 1 0 0 0 0.8 ns
36-61 00H 0 0 0 0 0 0 0 0
★
★
62 SPD revision 12H 0 0 0 1 0 0 1 0 1.2
63 Checksum for bytes 0 - 62 C1H 1 1 0 0 0 0 0 1
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91-92 Revision code
93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specif i c
126 Intel specification frequency 64H 0 1 1 0 0 1 0 0
127 Intel specification /CAS latency support A5H 1 0 1 0 0 1 0 1
15H 0 0 0 1 0 1 0 1 1.5 ns
08H 0 0 0 0 1 0 0 0 0.8 ns
(2/2)
Timing Chart
Refer to the
SYNCHRONOUS DRAM MODULE TIMING CHART Information (M13348E)
.
Data Sheet M14409EJ2V0DS00
11
★
Package Drawing
168-PIN DUAL IN-LINE MODULE (SOCKET TYPE)
A (AREA B)
Y1
R2
F1
Y2
Z1
Z2
MC-4516CA727
N
F2
Q
M
M2 (AREA A)
M1 (AREA B)
R1
L
A
J
H
K
CB
I
G
A1 (AREA A)
detail of A part
W
V
X
B
D
(OPTIONAL HOLES)
E
detail of B part
D2
P
D1
S
U
T
ITEM MILLIMETERS
A 133.35
A1 133.35±0.13
B 11.43
C 36.83
D
6.35
D1
2.0
D2E3.125
54.61
F1 2.44
F2
3.18
G 6.35
H 1.27 (T.P.)
I 8.89
J 24.495
K 42.18
L 17.78
M 34.93±0.13
M1
15.15
M2
19.78
N
3.0 MAX.
P
1.0
Q R2.0
R1
4.0±0.10
R2 9.53
φ
S 3.0
T 1.27±0.1
U 4.0 MIN.
V 0.2±0.15
W 1.0±0.05
X 2.54±0.10
Y1 3.0 MIN.
Y2Z12.26
3.0 MIN.
Z2 2.26
M168S-50A109
12
Data Sheet M14409EJ2V0DS00
[ MEMO ]
MC-4516CA727
Data Sheet M14409EJ2V0DS00
13
[ MEMO ]
MC-4516CA727
14
Data Sheet M14409EJ2V0DS00
MC-4516CA727
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
DD
pin should be connected to V
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
or GND with a resistor, if it is considered to have a possibility of
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
Data Sheet M14409EJ2V0DS00
15
MC-4516CA727
CAUTION FOR HANDLING MEMORY MODULES
When handling or inserting memory modules, be sure not to touch any components on the modules, such as
the memory IC, chip capacitors and chip resistors. It is necessary to avoid undue mechanical stress on these
components to prevent damaging them.
When re-packing memory modules, be sure the modules are NOT touching each other. Modules in contact
with other modules may cause excessive mechanical stress, which may damage the modules.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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