NEC 2SK3113B Technical data

DATA SHEET

MOS FIELD EFFECT TRANSISTOR

2SK3113B

SWITCHING

N-CHANNEL POWER MOS FET

DESCRIPTION

The 2SK3113B is N-channel MOS FET device that features a low gate charge and excellent switching

characteristics, and designed for high voltage applications such as switching power supply, AC adapter.

FEATURES

• Low on-state resistance

R

DS(on) = 4.4 Ω MAX. (VGS = 10 V, ID = 1.0 A)

• Low gate charge

G = 7.9 nC TYP. (VDD = 450 V, VGS = 10 V, ID = 2.0 A)

Q

• Gate voltage rating : ±30 V

• Avalanche capability ratings

<R>

ORDERING INFORMATION

PART NUMBER LEAD PLATING PACKING PACKAGE

2SK3113B-S15-AY

2SK3113B(1)-S27-AY

2SK3113B-ZK-E1-AY

2SK3113B-ZK-E2-AY

Note

Note

Note

Note

Pure Sn (Tin)

Tube 70 p/tube TO-251 (MP-3-a) typ. 0.39 g

Tube 75 p/tube

Tape 2500 p/reel TO-252 (MP-3ZK) typ. 0.27 g

Note Pb-free (This product does not contain Pb in external electrode.)

ABSOLUTE MAXIMUM RATINGS (TA = 25°C)

Drain to Source Voltage (VGS = 0 V) VDSS

Gate to Source Voltage (V

Drain Current (DC) (T

Drain Current (pulse)

Total Power Dissipation (T

Total Power Dissipation (T

Channel Temperature T

Storage Temperature T

Single Avalanche Current

Single Avalanche Energy

DS = 0 V) VGSS ±30 V

C = 25°C) ID(DC) ±2.0 A

Note1

C = 25°C) PT1 20 W

A = 25°C)

Note3

Note3

Note2

D(pulse) ±8.0 A

I

T2 1.0 W

P

ch 150 °C

stg –55 to +150 °C

AS 2.0 A

I

AS 2.7 mJ

E

TO-251 (MP-3-b) typ. 0.34 g

600

V

(TO-251)

(TO-252)

Notes 1. PW ≤ 10

μ

s, Duty Cycle ≤ 1%

2. Mounted on glass epoxy board of 40 mm × 40 mm × 1.6 mm

3. Starting T

Document No. D18061EJ3V0DS00 (3rd edition)
Date Published June 2007 NS
Printed in Japan

The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.

ch = 25°C, VDD = 150 V, RG = 25 Ω, VGS = 20 → 0 V

The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.

The mark <R> shows major revised points.

2006

2SK3113B

ELECTRICAL CHARACTERISTICS (TA = 25°C)

CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Zero Gate Voltage Drain Current IDSS VDS = 600 V, VGS = 0 V 100 μA

Gate Leakage Current IGSS VGS = ±30 V, VDS = 0 V ±10 μA

Gate Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 2.5 3.5 V

Forward Transfer Admittance

Drain to Source On-state Resistance

Input Capacitance Ciss VDS = 10 V 290 pF

Output Capacitance Coss VGS = 0 V 75 pF

Reverse Transfer Capacitance Crss f = 1 MHz 7 pF

Turn-on Delay Time td(on) VDD = 150 V, ID = 1.0 A 10.5 ns

Rise Time tr VGS = 10 V 4.8 ns

Turn-off Delay Time td(off) RG = 10 Ω 15.8 ns

Fall Time tf RL = 10 Ω 10.5 ns

Total Gate Charge QG VDD = 450 V 7.9 nC

Gate to Source Charge QGS VGS = 10 V 2.7 nC

Gate to Drain Charge QGD ID = 2.0 A 3.2 nC

Body Diode Forward Voltage

Reverse Recovery Time trr IF = 2.0 A, VGS = 0 V 190 ns

Reverse Recovery Charge Qrr di/dt = 50 A/μs 500 nC

Note Pulsed

TEST CIRCUIT 1 AVALANCHE CAPABILITY

Note

| yfs | VDS = 10 V, ID = 1.0 A 0.5 0.9 S

Note

RDS(on) VGS = 10 V, ID = 1.0 A 3.2 4.4

Note

VF( S-D) IF = 2.0 A, VGS = 0 V 0.8 V

TEST CIRCUIT 2 SWITCHING TIME

Ω

D.U.T.

RG = 25 Ω

PG.

50 Ω

VGS = 20 → 0 V

DSS

BV

I

AS

I

D

DD

V

Starting T

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

IG = 2 mA

PG.

50 Ω

L

V

DD

PG.

V

V

DS

ch

L

R

V

DD

GS

0

μ

τ = 1 s

Duty Cycle ≤ 1%

D.U.T.

V

GS

R

L

V

GS

R

G

Wave Form

V

DD

I

D

Wave Form

τ

10%

0

I

D

10%

0

t

d(on)trtd(off)

90%

t

on

90%

V

GS

90%

I

D

10%

t

f

t

off

2

Data Sheet D18061EJ3V0DS

2SK3113B

TYPICAL CHARACTERISTICS (TA = 25°C)

dT - Percentage of Rated Power - %

DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA

100

80

60

40

20

0

04020 60 100 14080 120 160

T

ch - Channel Temperature - °C

TOTAL POWER DISSIPATION vs.

CASE TEMPERATURE

40

35

30

25

20

15

10

5

0

0

PT - Total Power Dissipation - W

T

C - Case Temperature - °C

8020 40 60 100 140120 160

ID - Drain Current - A

FORWARD BIAS SAFE OPERATING AREA

100

Tc = 25°C, Single pulse

I

D(pulse)

10

D(DC)

I

1

R

DS(on)

0.1

(at V

Power Dissipation Limited

Limited

GS

= 10 V)

PW = 10 μs

100 μs

1 ms

10 ms

0.01

1 10 100 1000

DS - Drain to Source Voltage - V

V

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH

1000

R

= 125°C/W

th(ch-A)

100

R

= 6.25°C/W

10

th(ch-C)

1

0.1

rth(ch-A) - Transient Thermal Resistance - °C/W

0.01

100

μ

1 m 10 m 100 m 1 10 100 1000

Single pulse

PW - Pulse Width – s

Data Sheet D18061EJ3V0DS

3