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DATA SHEET
Drain
Gate
Gate Protection
Diode
Source
Body
Diode
MOS FIELD EFFECT POWER TRANSISTORS
2SK2724
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
This product is N-Channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
• Low On-Resistance
DS(on)1 = 27 mΩ Max. (VGS = 10 V, ID = 18 A)
R
RDS(on)2 = 40 mΩ Max. (VGS = 4 V, ID = 18 A)
• Low Ciss Ciss =1 200 pF Typ.
• Built-in G-S Protection Diode
• Isolated TO-220 package
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
PACKAGE DIMENSIONS (in millimeter)
10.0 ±0.3
15.0 ±0.3
123
MP-45F (ISOLATED TO-220)
3.2 ±0.2
3 ±0.1
4 ±0.2
1.3 ±0.20.7 ±0.1
1.5 ±0.2
2.542.54
4.5 ±0.2
12.0 ±0.213.5 MIN.
0.65 ±0.1
Gate
1.
Drain
2.
Source
3.
2.7 ±0.2
2.5 ±0.1
Document No. D10515EJ1V0DS00 (1st edition)
Date Published April 1996 P
Printed in Japan
Drain to Source Voltage VDSS 60 V
Gate to Source Voltage VGSS ±20 V
Drain Current (DC) ID(DC) ±35 A
Drain Current (Pulse)* I
Total Power Dissipation (TA = 25 ˚C)
Total Power Dissipation (TC = 25 ˚C)
Channel Temperature T
Storage Temperature Tstg –55 to +150 ˚C
µ
* PW ≤ 10
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device actually used, an additional protection circuit is externally required if voltage exceeding the rated voltage may
be applied to this device.
s, duty cycle ≤ 1 %
The information in this document is subject to change without notice.
D(pulse) ±140 A
PT 2.0 W
PT 30 W
ch 150 ˚C
©
1996
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ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)
CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT
Drain to Source On-State Resistance
Gate to Source Cutoff Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.0 1.5 2.0 V
Forward Transfer Admittance |yfs|VDS = 10 V, ID = 18 A 10 23 S
Drain Leakage Current IDSS VDS = 60 V, VGS = 0 10
Gate to Source Leakage Current IGSS VGS = ±20 V, VDS = 0 ±10
Input Capacitance Ciss VDS = 10 V, 1 200 pF
Output Capacitance Coss
Reverse Transfer Capacitance Crss
Turn-On Delay Time td(on) ID = 18 A, 35 ns
Rise Time tr
Turn-Off Delay Time td(off)
Fall Time tf
Total Gate Charge QG ID = 35 A, 50 nC
Gate to Source Charge QGS
Gate to Drain Charge QGD
Body Diode Forward Voltage VF(S-D) IF = 35 A, VGS = 0 1.0 V
Reverse Recovery Time trr IF = 35 A, VGS = 0, 70 ns
Reverse Recovery Charge Qrr
RDS(on)1 VGS = 10 V, ID = 18 A 20 27 mΩ
RDS(on)2 VGS = 4 V, ID = 18 A 33 40 mΩ
VGS = 0,
f = 1 MHz
570 pF
270 pF
VGS(on) = 10 V,
VDD = 30 V,
RG = 10 Ω
280 ns
160 ns
170 ns
VDD = 48 V,
VGS = 10 V
5.0 nC
22 nC
di/dt = 100 A/µs
130 nC
2SK2724
µ
A
µ
A
Test Circuit 1 Switching Time Test Circuit 2 Gate Charge
PG.
V
GS
0
t
t = 1 s
µ
Duty Cycle ≤ 1 %
R
G
D.U.T.
R
G
= 10 Ω
L
R
V
DD
V
GS
Wave Form
I
D
Wave Form
V
I
D
GS
0
0
10 %
10 %
t
d(on)tr
90 %
t
on
V
GS(on)
I
D
t
d(off)tf
90 %
t
off
90 %
10 %
PG.
D.U.T.
IG = 2 mA
50 Ω
R
L
V
DD
2
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2SK2724
FORWARD BIAS SAFE OPERATING AREA
V
DS -
Drain to Source Voltage - V
I
D
- Drain Current - A
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
V
DS
- Drain to Source Voltage - V
I
D
- Drain Current - A
FORWARD TRANSFER CHARACTERISTICS
V
GS
- Gate to Source Voltage - V
I
D
- Drain Current - A
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
T
C
- Case Temperature - ˚C
dT - Percentage of Rated Power - %
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
T
C
- Case Temperature - ˚C
P
T
- Total Power Dissipation - W
0
20
0
20 40 60 80 100 120 140 160
20
40
60
80
100
40 60 80 100 120 140 160
35
30
25
20
15
10
5
0
2
3
4
100
1
10
100
200
1
0
Pulsed
51015
V
GS
= 20 V
VGS = 4 V
VGS = 10 V
Pulsed
Tch = –25 ˚C
25 ˚C
125 ˚C
VDS = 10 V
1
10
100
1 000
0.1 1 10 100
I
D(pulse)
= 140 A
I
D(DC)
= 35 A
Power Dissipation
Limited(P
T
= 30 W)
R
DS(on)
Limited (V
GS
= 10 V)
PW = 1 ms
PW = 10 ms
PW = 200 ms
Tc = 25 ˚C
Single Pulse
1 000
PW = 100 s
µ
3