Page 1
MM54HC374/MM74HC374
TRI-STATE
General Description
These high speed Octal D-Type Flip-Flops utilize advanced
silicon-gate CMOS technology. They possess the high noise
immunity and low power consumption of standard CMOS
integrated circuits, as well as the ability to drive 15 LS-TTL
loads. Due to the large output drive capability and the TRISTATE feature, these devices are ideally suited for interfacing with bus lines in a bus organized system.
These devices are positive edge triggered flip-flops. Data at
the D inputs, meeting the setup and hold time requirements,
are transferred to the Q outputs on positive going transitions
of the CLOCK (CK) input. When a high logic level is applied
to the OUTPUT CONTROL (OC) input, all outputs go to a
high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
Connection Diagram
Octal D-Type Flip-Flop
É
Dual-In-Line Package
January 1988
The 54HC/74HC logic family is speed, function, and pinout
compatible with the standard 54LS/74LS logic family. All
inputs are protected from damage due to static discharge by
internal diode clamps to V
and ground.
CC
Features
Y
Typical propagation delay: 20 ns
Y
Wide operating voltage range: 2– 6V
Y
Low input current: 1 mA maximum
Y
Low quiescent current: 80 mA maximum
Y
Compatible with bus-oriented systems
Y
Output drive capability: 15 LS-TTL loads
MM54HC374/MM74HC374 TRI-STATE Octal D-Type Flip-Flop
Top View
Order Number MM54HC374 or MM74HC374
TL/F/5336– 1
Truth Table
e
H
Output
Control
TRI-STATEÉis a registered trademark of National Semiconductor Corp
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Clock Data Output
L
L
LLXQ
HXXZ
u
u
TL/F/5336
HH
LL
0
high Level, LeLow Level
e
X
don’t Care
e
transition from low-to-high
u
e
Z
high impedance state
e
Q
the level of the output before steady state
0
input conditions were established
Page 2
Absolute Maximum Ratings (Notes1&2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
)
b
0.5 toa7.0V
b
1.5 to V
b
CC
0.5 to V
CC
b
65§Ctoa150§C
a
a
g
g
g
1.5V
0.5V
20 mA
35 mA
70 mA
Supply Voltage (V
CC
)
DC Input Voltage (VIN)
DC Output Voltage (V
OUT
)
Clamp Diode Current (IIK,IOK)
DC Output Current, per pin (I
OUT
)
DC VCCor GND Current, per pin (ICC)
Storage Temperature Range (T
STG
Supply Voltage (V
)26V
CC
DC Input or Output Voltage 0 V
(V
IN,VOUT
)
Operating Temp. Range (TA)
MM74HC
MM54HC
Input Rise or Fall Times
e
V
2.0V(tr,tf) 1000 ns
CC
e
V
4.5V 500 ns
CC
e
V
6.0V 400 ns
CC
Power Dissipation (PD)
(Note 3) 600 mW
S.O. Package only 500 mW
Lead Temp. (T
) (Soldering 10 seconds) 260§C
L
DC Electrical Characteristics
Symbol Parameter Conditions V
CC
A
e
T
25§C
Typ Guaranteed Limits
V
Minimum High Level 2.0V 1.5 1.5 1.5 V
IH
Input Voltage 4.5V 3.15 3.15 3.15 V
6.0V 4.2 4.2 4.2 V
V
Maximum Low Level 2.0V 0.5 0.5 0.5 V
IL
Input Voltage** 4.5V 1.35 1.35 1.35 V
6.0V 1.8 1.8 1.8 V
V
Minimum High Level V
OH
Output Voltage
e
VIHor V
l
IN
I
OUT
IL
s
20 mA 2.0V 2.0 1.9 1.9 1.9 V
l
4.5V 4.5 4.4 4.4 4.4 V
6.0V 6.0 5.9 5.9 5.9 V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
l
IN
I
OUT
e
V
Maximum Low Level V
OL
Output Voltage
IL
s
6.0 mA 4.5V 4.2 3.98 3.84 3.7 V
l
s
7.8 mA 6.0V 5.7 5.48 5.34 5.2 V
l
VIHor V
IL
s
20 mA 2.0V 0 0.1 0.1 0.1 V
l
4.5V 0 0.1 0.1 0.1 V
6.0V 0 0.1 0.1 0.1 V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
I
IN
I
OZ
Maximum Input V
Current
Maximum TRI-STATE V
Output Leakage V
Current
I
CC
Maximum Quiescent V
Supply Current I
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package:
Note 4: For a power supply of 5V
with this supply. Worst case V
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
I
OZ
**V
limits are currently tested at 20% of VCC. The above VILspecification (30% of VCC) will be implemented no later than Q1, CY’89.
IL
g
and VILoccur at V
IH
e
IN
e
IN
OUT
e
IN
OUT
10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
IL
s
6.0 mA 4.5V 0.2 0.26 0.33 0.4 V
l
s
7.8 mA 6.0V 0.2 0.26 0.33 0.4 V
l
VCCor GND 6.0V
VIH,OCeVIH6.0V
e
VCCor GND
g
0.1
g
0.5
VCCor GND 6.0V 8.0 80 160 mA
e
0 mA
b
12 mW/§C from 65§Cto85§C; ceramic ‘‘J’’ package:b12 mW/§C from 100§Cto125§C.
e
5.5V and 4.5V respectively. (The VIHvalue at 5.5V is 3.85V.) The worst case leakage current (IIN,ICC, and
CC
74HC 54HC
eb
T
40 to 85§CT
A
g
1.0
g
5
Min Max Units
V
§
§
Units
b
b
40
55
A
eb
55 to 125§C
g
g
CC
a
85
a
125
1.0 mA
10 mA
C
C
2
Page 3
AC Electrical Characteristics V
CC
e
5V, T
Symbol Parameter Conditions Typ
f
MAX
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
t
S
t
H
t
W
Maximum Operating 50 35 MHz
Frequency
Maximum Propagation C
Delay Clock to Q
Maximum Output Enable R
Time C
Maximum Output Disable R
Time C
e
45 pF 20 32 ns
L
e
kX
L
e
45 pF 19 28 ns
L
e
kX 17 25 ns
L
e
5pF
L
Minimum Setup Time 20 ns
Minimum Hold Time 5 ns
Minimum Pulse Width 9 16 ns
e
A
25§C, t
Guaranteed
e
r
t
f
Limit
e
6ns
Units
AC Electrical Characteristics V
CC
e
Symbol Parameter Conditions V
f
MAX
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
t
S
t
H
t
W
t
THL,tTLH
tr,t
C
PD
C
IN
Note 5: CPDdetermines the no load dynamic power consumption, P
Maximum Operating C
Frequency 4.5V 30 24 20 MHz
Maximum Propagation C
Delay, Clock to Q C
Maximum Output Enable R
Time
Maximum Output Disable R
Time C
Minimum Setup Time 2.0V 50 60 75 ns
Minimum Hold Time 2.0V 5 30 5 ns
Minimum Pulse Width 2.0V 30 80 100 120 ns
Maximum Output Rise C
and Fall Time 4.5V 7 12 15 18 ns
Maximum Input Rise and 2.0V 1000 1000 1000 ns
f
Fall Time, Clock 4.5V 500 500 500 ns
Power Dissipation (per flip-flop)
Capacitance (Note 5) OCeV
Maximum Input Capacitance 5 10 10 10 pF
e
50 pF 2.0V 6 5 4 MHz
L
e
50 pF 2.0V 68 180 225 270 ns
L
e
150 pF 2.0V 110 230 288 345 ns
L
e
C
50 pF 4.5V 22 36 45 48 ns
L
e
C
150 pF 4.5V 30 46 57 69 ns
L
e
C
50 pF 6.0V 20 31 39 46 ns
L
e
150 pF 6.0V 28 40 50 60 ns
C
L
e
1kX
L
e
50 pF 2.0V 50 150 189 225 ns
C
L
e
150 pF 2.0V 80 200 250 300 ns
C
L
e
C
50 pF 4.5V 21 30 37 45 ns
L
e
150 pF 4.5V 30 40 50 60 ns
C
L
e
C
50 pF 6.0V 19 26 31 39 ns
L
e
C
150 pF 6.0V 26 35 44 53 ns
L
e
1kX 2.0V 50 150 189 225 ns
L
e
50 pF 4.5V 21 30 37 45 ns
L
e
50 pF 2.0V 25 60 75 90 ns
L
CC
e
GND 50 pF
OC
e
D
2.0–6.0V, C
CC
e
L
e
T
A
50 pF, t
25§C
e
e
t
6 ns (unless otherwise specified)
r
f
74HC 54HC
eb
T
40 to 85§CT
A
A
eb
55 to 125§C
Typ Guaranteed Limits
6.0V 35 28 23 MHz
6.0V 19 26 31 39 ns
4.5V 9 13 15 ns
6.0V 9 11 13 ns
4.5V 5 5 5 ns
6.0V 5 5 5 ns
4.5V 9 16 20 24 ns
6.0V 8 14 18 20 ns
6.0V 6 10 13 15 ns
6.0V 400 400 400 ns
30 pF
2
CPDV
faICCVCC, and the no load dynamic current consumption, I
CC
e
CPDVCCfaICC.
S
Units
3
Page 4
Physical Dimensions inches (millimeters)
Order Number MM54HC374J or
MM74HC374J
NS Package J20A
MM54HC374/MM74HC374 TRI-STATE Octal D-Type Flip-Flop
Order Number MM74HC374N
NS Package N20A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
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Corporation Europe Hong Kong Ltd. Japan Ltd.
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Tel: 1(800) 272-9959 Deutsch Tel: (
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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