The MM54HC253/MM74HC253 utilizes advanced silicongate CMOS technology to achieve the low power consumption and high noise immunity of standard CMOS integrated
circuits, along with the capability to drive 10 LS-TTL loads.
The large output drive and TRI-STATE features of this device make it ideally suited for interfacing with bus lines in
bus organized systems. When the output control input is
taken high, the multiplexer outputs are sent into a high impedance state.
When the output control is held low, the associated multiplexer chooses the correct output channel for the given input signals determined by the select A and B inputs.
Multiplexer
É
The 54HC/74HC logic family is functionally and pinout compatible with the standard 54LS/74LS logic family. All inputs
are protected from damage due to static discharge by internal diode clamps to V
and ground.
CC
Features
Y
Typical propagation delay: 24 ns
Y
Wide power supply range: 2V –6V
Y
Low quiescent current: 80 mA maximum (74HC Series)
Select inputs A and B are common to both sections.
e
H
Dual-In-Line Package
Order Number MM54HC253 or MM74HC253
Select
InputsControl
high level, Lelow level, Xeirrelevant, Zehigh impedance (off).
Data Inputs
Output
TL/F/5108– 1
Output
TRI-STATEÉis a registered trademark of National Semiconductor Corp.
C
1995 National Semiconductor CorporationRRD-B30M105/Printed in U. S. A.
TL/F/5108
Page 2
Absolute Maximum Ratings (Notes1&2)
Operating Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
CC
)
DC Input Voltage (VIN)
DC Output Voltage (V
OUT
)
Clamp Diode Current (IIK,IOK)
DC Output Current, per pin (I
OUT
)
DC VCCor GND Current, per pin (ICC)
Storage Temperature Range (T
STG
b
b
)
b
0.5 toa7.0V
1.5 to V
CC
0.5 to V
CC
g
g
b
g
65§Ctoa150§C
a
1.5V
a
0.5V
20 mA
25 mA
50 mA
Power Dissipation (PD)
(Note 3)600 mW
Supply Voltage (V
)26V
CC
DC Input or Output Voltage0V
(V
IN,VOUT
)
Operating Temp. Range (T
MM74HC
MM54HC
Input Rise or Fall Times
e
2.0V(tr,tf)1000ns
V
CC
e
V
4.5V500ns
CC
e
V
6.0V400ns
CC
S.O. Package only500 mW
Lead Temperature (T
(Soldering 10 seconds)260
)
L
C
§
DC Electrical Characteristics (Note 4)
SymbolParameterConditionsV
CC
A
e
T
25§C
TypGuaranteed Limits
V
Minimum High Level2.0V1.51.51.5V
IH
Input Voltage4.5V3.153.153.15V
6.0V4.24.24.2V
V
Maximum Low Level2.0V0.50.50.5V
IL
Input Voltage**4.5V1.351.351.35V
6.0V1.81.81.8V
V
Minimum High LevelV
OH
Output Voltage
e
VIHor V
l
IN
I
OUT
IL
s
20 mA2.0V2.01.91.91.9V
l
4.5V4.54.44.44.4V
6.0V6.05.95.95.9V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
l
IN
I
OUT
e
V
Maximum Low LevelV
OL
Output Voltage
IL
s
4.0 mA4.5V4.23.983.843.7V
l
s
5.2 mA6.0V5.75.485.345.2V
l
VIHor V
IL
s
20 mA2.0V00.10.10.1V
l
4.5V00.10.10.1V
6.0V00.10.10.1V
e
V
VIHor V
IN
I
l
OUT
I
l
OUT
I
IN
I
OZ
Maximum InputV
Current
Maximum TRI-STATE StrobeeV
Output LeakageV
Current
I
CC
Maximum QuiescentV
Supply CurrentI
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package:
Note 4: For a power supply of 5V
with this supply. Worst case V
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
I
OZ
** V
limits are currently tested at 20% of VCC. The above VILspecification (30% of VCC) will be implemented no later than Q1, CY’89.
IL
g
and VILoccur at V
IH
e
IN
OUT
e
IN
OUT
10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing
IL
s
4.0 mA4.5V0.20.260.330.4V
l
s
5.2 mA6.0V0.20.260.330.4V
l
VCCor GND6.0V
CC
e
VCCor GND
6.0V
g
0.1
g
0.5
VCCor GND6.0V8.080160mA
e
0 mA
b
12 mW/§C from 65§Cto85§C; ceramic ‘‘J’’ package:b12 mW/§C from 100§Cto125§C.
e
5.5V and 4.5V respectively. (The VIHvalue at 5.5V is 3.85V.) The worst case leakage current (IIN,ICC, and
CC
74HC54HC
eb
T
40 to 85§CT
A
g
1.0
g
5.0
MinMaxUnits
)
A
b
b
a
40
a
55
eb
55 to 125§C Units
A
g
1.0mA
g
10mA
CC
85
125
V
C
§
C
§
2
Page 3
AC Electrical Characteristics V
CC
5V, T
e
A
25§C, t
e
e
t
r
f
6 ns, C
e
15 pF
L
e
SymbolParameterConditionsTypGuaranteed LimitUnits
t
PHL,tPLH
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
Maximum Propagation2430ns
Delay, Select A or B to Y
Maximum Propagation1823ns
Delay, any Data to Y
Maximum Output Enable TimeR
Y Output to a Logic Level
Maximum Output Disable TimeR
Y Output to High Impedance State
e
1kX1318ns
L
e
1kX1827ns
L
AC Electrical Characteristics C
e
L
50 pF, t
SymbolParameterConditionsV
t
PHL,tPLH
t
PHL,tPLH
t
PZH,tPZL
t
PHZ,tPLZ
t
THL,tTLH
C
IN
C
PD
Note 5: CPDdetermines the no load dynamic power consumption, P
Maximum Propagation2.0V 131 158198237ns
Delay, Select A or B to Y4.5V 29354453ns
Maximum Propagation2.0V 99126158189ns
Delay, any Data to Y4.5V 22283542ns
Maximum Output Enable Time R
Maximum Output Disable Time R
Maximum Output Rise2.0V 307595110ns
and Fall Time4.5V8151922ns
e
1kX2.0V 6390113135ns
L
e
1kX2.0V 90135169203ns
L
Maximum Input Capacitance5101010pF
Power Dissipation(per package)
Capacitance (Note 5)Outputs Enabled90pF
Outputs Disabled25pF
e
CPDV
D
Logic Diagram
e
e
t
6 ns (unless otherwise specified)
r
f
CC
e
T
25§C
A
74HC54HC
eb
T
40 to 85§CT
A
eb
55 to 125§C Units
A
TypGuaranteed Limits
6.0V 24303845ns
6.0V 19232935ns
4.5V 14202530ns
6.0V 12172126ns
4.5V 20303845ns
6.0V 17253138ns
6.0V7131619ns
2
faICCVCC, and the no load dynamic current consumption, I
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SEMICONDUCTOR CORPORATION. As used herein:
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systems which, (a) are intended for surgical implantsupport device or system whose failure to perform can
into the body, or (b) support or sustain life, and whosebe reasonably expected to cause the failure of the life
failure to perform, when properly used in accordancesupport device or system, or to affect its safety or
with instructions for use provided in the labeling, caneffectiveness.
be reasonably expected to result in a significant injury
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