National Semiconductor MM54C192, MM74C192 Technical data

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MM54C192/MM74C192
Synchronous 4-Bit Up/Down Decade Counter
MM54C193/MM74C193
Synchronous 4-Bit Up/Down Binary Counter

February 1988

MM54C192/MM74C192 Synchronous 4-Bit Up/Down Decade Counter

MM54C193/MM74C193 Synchronous 4-Bit Up/Down Binary Counter

General Description

These up/down counters are monolithic complementary
MOS (CMOS) integrated circuits. The MM54C192 and
MM74C192 are BCD counters, while the MM54C193 and
MM74C193 are binary counters.

Counting up and counting down is performed by two count
inputs, one being held high while the other is clocked. The
outputs change on the positive-going transition of this clock.

These counters feature preset inputs that are set when load
is a logical ‘‘0’’ and a clear which forces all outputs to ‘‘0’’
when it is at a logical ‘‘1’’. The counters also have carry and
borrow outputs so that they can be cascaded using no ex­ternal circuitry.

Connection Diagram

Dual-In-Line Package

Features

Y

High noise margin 1V guaranteed

Y

Tenth power TTL compatible Drive 2 LPTTL loads

Y

Wide supply range 3V to 15V

Y

Carry and borrow outputs for N-bit cascading

Y

Asynchronous clear

Y

High noise immunity 0.45 VCC(typ.)

Top View

Order Number MM54C192, MM74C192,

MM54C193 or MM74C193

C

1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

TL/F/5901

TL/F/5901– 1

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.

Voltage at Any Pin

Operating Temperature Range (TA)

MM54C154
MM74C154

b

0.3V to V

b

b

a

0.3V

CC

55§Ctoa125§C

40§Ctoa85§C

Storage Temperature Range (T

)

S

Maximum VCCVoltage 18V

Power Dissipation (PD)

Dual-In-Line 700 mW
Small Outline 500 mW

Operating V

Range 3V to 15V

CC

Lead Temperature (TA)

65§Ctoa150§C

b

(Soldering, 10 sec.) 260

DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted

Symbol Parameter Conditions Min Typ Max Units

CMOS TO CMOS

V

IN(1)

V

IN(0)

V

OUT(1)

V

OUT(0)

I

IN(1)

I

IN(0)

I

CC

Logical ‘‘1’’ Input Voltage V

Logical ‘‘0’’ Input Voltage V

Logical ‘‘1’’ Output Voltage V

Logical ‘‘0’’ Output Voltage V

Logical ‘‘1’’ Input Current V

Logical ‘‘0’’ Input Current V

Supply Current V

CMOS TO LPTTL INTERFACE

V

IN(1)

V

IN(0)

V

OUT(1)

V

OUT(0)

Logical ‘‘1’’ Input Voltage 54C V

Logical ‘‘0’’ Input Voltage 54C V

Logical ‘‘1’’ Output Voltage 54C V

Logical ‘‘0’’ Output Voltage 54C V

OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)

I

SOURCE

I

SOURCE

I

SINK

I

SINK

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.

Output Source Current V

Output Source Current V

Output Sink Current V

Output Sink Current V

e

5V 3.5 V

CC

e

V

10V 8.0 V

CC

e

5V 1.5 V

CC

e

V

10V 2.0 V

CC

e

eb

5V, I

CC

e

V

10V, I

CC

e

5V, I

CC

e

V

10V, I

CC

e

15V, V

CC

e

15V, V

CC

e

15V 0.05 300 mA

CC

CC

74C V

CC

CC

74C V

CC

CC

74C V

CC

CC

74C V

CC

e

5V, V

CC

e

25§C, V

T

A

e

10V, V

CC

e

25§C, V

T

A

e

5V, V

CC

e

T

25§C, V

A

e

10V, V

CC

e

T

25§C, V

A

10 mA 4.5 V

O

eb

10 mA 9.0 V

O

e

10 mA 0.5 V

O

e

10 mA 1.0 V

O

e

15V 0.005 1.0 mA

IN

e

0V

IN

e

4.5V V

e

4.75V V

e

4.5V 0.8 V

e

4.75V 0.8 V

e

e

e

e

4.5V, I

4.75V, I

4.5V, I

4.75V, I

IN(0)

OUT

IN(0)

OUT

IN(1)

OUT

IN(1)

OUT

eb

100 mA 2.4 V

O

eb

100 mA 2.4 V

O

e

360 mA 0.4 V

O

e

360 mA 0.4 V

O

e

0V

e

0V

e

0V

e

0V

e

5V

e

V

CC

e

10V

e

V

CC

b

1.0

b

CC

b

CC

b

1.75 mA

b

b

0.005 mA

1.5 V

1.5 V

8mA

1.75 mA

8mA

C

§

2