National Semiconductor MM54C157, MM74C157 Technical data
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MM54C157/MM74C157 Quad 2-Input Multiplexers
MM54C157/MM74C157 Quad 2-Input Multiplexers
February 1988
General Description
These multiplexers are monolithic complementary MOS
(CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. They consist of four 2-input
multiplexers with common select and enable inputs. When
the enable input is at logical ‘‘0’’ the four outputs assume
the values as selected from the inputs. When the enable
input is at logical ‘‘1’’, the outputs assume logical ‘‘0’’. Select decoding is done internally resulting in a single select
input only.
Logic & Connection Diagrams
Dual-In-Line Package
TL/F/5894– 2
Top View
Order Number MM54C157 or MM74C157
Features
Y
Supply voltage range 3V to 15V
Y
High noise immunity 0.45 VCC(typ.)
Y
Low power 50 nW (typ.)
Y
Tenth power TTL compatible Drive 2 LPTTL loads
TL/F/5894– 1
Truth Table
Enable Select A B Output Y
1XXX0
000X0
001X1
01X00
01X11
74L Compatibility
TL/F/5894– 3
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/5894
Guaranteed Noise Margin
as a Function of V
CC
TL/F/5894– 4
Absolute Maximum Ratings (Note 1)
b
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
Operating Temperature Range
MM54C157
MM74C157
b
0.3V to V
b
b
a
0.3V
CC
55§Ctoa125§C
40§Ctoa85§C
Storage Temperature Range
Maximum VCCVoltage 18V
Power Dissipation (PD)
Dual-In-Line 700 mW
Small Outline 500 mW
Operating V
Range 3V to 15V
CC
Lead Temperature (Soldering, 10 sec.) 260§C
65§Ctoa150§C
DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
Logical ‘‘1’’ Input Voltage V
Logical ‘‘0’’ Input Voltage V
Logical ‘‘1’’ Output Voltage V
Logical ‘‘0’’ Output Voltage V
Logical ‘‘1’’ Input Current V
Logical ‘‘0’’ Input Current V
Supply Current V
CMOS TO TENTH POWER INTERFACE
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
Logical ‘‘1’’ Input Voltage 54C V
Logical ‘‘0’’ Input Voltage 54C V
Logical ‘‘1’’ Output Voltage 54C V
Logical ‘‘0’’ Output Voltage 54C V
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)
I
SOURCE
I
SOURCE
I
SINK
I
SINK
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Output Source Current V
Output Source Current V
Output Sink Current V
Output Sink Current V
e
5V 3.5 V
CC
e
V
10V 8.0 V
CC
e
5V 1.5 V
CC
e
V
10V 2.0 V
CC
e
5V 4.5 V
CC
e
V
10V 9.0 V
CC
e
5V 0.5 V
CC
e
V
10V 1.0 V
CC
e
15V 0.005 1.0 mA
CC
e
15V
CC
e
15V 0.05 60 mA
CC
e
4.5V V
CC
CC
A
CC
A
CC
A
CC
A
e
e
e
e
e
e
e
e
e
4.75V V
CC
e
4.5V 0.8 V
CC
e
4.75V 0.8 V
CC
CC
CC
CC
CC
5V, V
25§C, V
10V, V
25§C, V
5V, V
25§C, V
10V, V
25§C, V
e
e
e
e
4.5V, I
4.75V, I
4.5V, I
4.75V, I
IN(0)
OUT
IN(0)
OUT
IN(1)
OUT
IN(1)
OUT
eb
360 mA 2.4 V
O
eb
360 mA 2.4 V
O
e
360 mA 0.4 V
O
e
360 mA 0.4 V
O
e
0V
e
0V
e
0V
e
0V
e
5V
e
V
CC
e
10V
e
V
CC
74C V
74C V
74C V
74C V
T
T
T
T
b
1.0
b
CC
b
CC
b
1.75 mA
b
8.0 mA
b
0.005 mA
1.5 V
1.5 V
1.75 mA
8.0 mA
2
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