National Semiconductor DS90LV017A Technical data

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DS90LV017A
LVDS Single High Speed Differential Driver

DS90LV017A LVDS Single High Speed Differential Driver

March 2000

General Description

The DS90LV017A is a single LVDS driver device optimized
for high data rate and low power applications. The
DS90LV017Ais a current mode driver allowing power dissi­pation to remain low even at high frequency. In addition, the
short circuit fault current is also minimized. The device is de­signed to support data rates in excess of 600Mbps
(300MHz) utilizing Low Voltage Differential Signaling (LVDS)
technology.

The device is in a 8-lead small outline package. The
DS90LV017A has a flow-through design for easy PCB lay­out. The differential driver outputs provides low EMI with its
typical low output swing of 355 mV.TheDS90LV017A can be
paired with its companion single line receiver, the
DS90LV018A, or with any of National’s LVDS receivers, to
provide a high-speed point-to-point LVDS interface.

Connection Diagram

Dual-In-Line

Features

>

n

600 Mbps (300 MHz) switching rates

n 0.3 ns typical differential skew
n 0.7 ns maximum differential skew
n 1.5 ns maximum propagation delay
n 3.3V power supply design

±

n

355 mV differential signaling

n Low power dissipation (23 mW
n Flow-through design simplifies PCB layout
n Interoperable with existing 5V LVDS devices
n Power Off Protection (outputs in high impedance)
n Conforms to TIA/EIA-644 Standard
n 8-Lead SOIC package saves space
n Industrial temperature operating range

(−40˚C to +85˚C)

@

3.3V static)

Order Number DS90LV017ATM

See NS Package Number M08A

Functional Diagram

TRI-STATE®is a registered trademark of National Semiconductor Corporation.

DS100101-1

DS100101-2

© 2000 National Semiconductor Corporation DS100101 www.national.com

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.

DS90LV017A

Supply Voltage (V

) −0.3V to +4V

CC

ESD Ratings

(HBM 1.5 kΩ, 100 pF) ≥ 8kV
(EIAJ 0 Ω, 200 pF) ≥ 1000V
(CDM) ≥ 1000V
(IEC direct 330 Ω, 150 pF) ≥ 4kV

Input Voltage (DI) −0.3V to +3.6V

±

Output Voltage (DO

Maximum Package Power Dissipation

) −0.3V to +3.9V

@

+25˚C
M Package 1190 mW
Derate M Package 9.5 mW/˚C above +25˚C

Storage Temperature Range −65˚C to +150˚C

Lead Temperature Range Soldering

Recommended Operating
Conditions

Min Typ Max Units

Supply Voltage (V
Temperature (T

) 3.0 3.3 3.6 V

CC

) −40 25 +85 ˚C

A

(4 sec.) +260˚C

Electrical Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 2, 3, 7)

Symbol Parameter Conditions Pin Min Typ Max Units
DIFFERENTIAL DRIVER CHARACTERISTICS

V

OD

∆V

OD

V

OH

V

OL

V

OS

∆V

OS

I

OXD

I

OSD

V

IH

V

IL

I

IH

I

IL

V

CL

I

CC

Output Differential Voltage RL= 100Ω

Figure 1

VODMagnitude Change 135mV

(

)

DO+,

DO−

Output High Voltage 1.4 1.6 V
Output Low Voltage 0.9 1.1 V
Offset Voltage 1.125 1.2 1.375 V
Offset Magnitude Change 0 3 25 mV
Power-off Leakage V

OUT=VCC

or GND, VCC=0V
Output Short Circuit Current −5.7 −8 mA
Input High Voltage DI 2.0 V
Input Low Voltage GND 0.8 V
Input High Current VIN= 3.3V or 2.4V
Input Low Current VIN= GND or 0.5V
Input Clamp Voltage ICL= −18 mA −1.5 −0.6 V
Power Supply Current No Load VIN=VCCor GND V

R

= 100Ω 710mA

L

250 355 450 mV

±

1

±

2

±

1

CC

58mA

±

10 µA

CC

±

10 µA

±

10 µA

V

Switching Characteristics

Over Supply Voltage and Operating Temperature Ranges, unless otherwise specified. (Notes 3, 4, 5, 6)

Symbol Parameter Conditions Min Typ Max Units

DIFFERENTIAL DRIVER CHARACTERISTICS

t

PHLD

t

PLHD

t

SKD1

t

SKD3

t

SKD4

t

TLH

t

THL

f

MAX

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.

Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except V
Note 3: All typicals are given for: V
Note 4: These parameters are guaranteedby design. The limits are based on statistical analysis of the device performance over PVT (process, voltage, temperature)

ranges.

Note 5: C
Note 6: Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z

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Differential Propagation Delay High to Low RL= 100Ω,CL= 15 pF 0.3 0.8 1.5 ns
Differential Propagation Delay Low to High (
Differential Pulse Skew |t

PHLD−tPLHD

| (Note 8) 0 0.3 0.7 ns

Figure 2

and

Figure 3

) 0.3 1.1 1.5 ns

Differential Part to Part Skew (Note 9) 0 1.0 ns
Differential Part to Part Skew (Note 10) 0 1.2 ns
Transition Low to High Time 0.2 0.5 1.0 ns
Transition High to Low Time 0.2 0.5 1.0 ns
Maximum Operating Frequency (Note 11) 350 MHz

= +3.3V and TA= +25˚C.

CC

includes probe and fixture capacitance.

L

=50Ω,tr≤1 ns, tf≤ 1 ns (10%-90%).

O

OD

.

Switching Characteristics (Continued)

Note 7: The DS90LV017Ais a current mode device and only function with datasheet specification when a resistive load is applied to the drivers outputs.
Note 8: t

same channel.
Note 9: t

fication applies to devices at the same V
Note 10: t

operating temperature and voltage ranges, and across process distribution. t
Note 11: f

,|t

SKD1

PHLD−tPLHD

, Differential Part to Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This speci-

SKD3

, part to part skew, is the differential channel to channel skew of any event between devices. This specification applies to devices over recommended

SKD4

generator input conditions: tr=t

MAX

|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the

and within 5˚C of each other within the operating temperature range.

CC

is defined as |Max − Min| differential propagation delay.

<

1 ns (0% to 100%), 50% duty cycle, 0V to 3V. Output criteria: duty cycle = 45%/55%, V

f

SKD4

OD

>

250mV.

Parameter Measurement Information

DS100101-3

FIGURE 1. Differential Driver DC Test Circuit

DS90LV017A

FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit

FIGURE 3. Differential Driver Propagation Delay and Transition Time Waveforms

Application Information

#

Pin

3, 5, 6 NC No connect

Name Description

2 DI1 TTL/CMOS driver input pins
7 DO1+ Non-inverting driver output pin
8 DO1− Inverting driver output pin
4 GND Ground pin
1V

Positive power supply pin, +3.3V±0.3V

CC

DS100101-4

DS100101-5

TABLE 1. Device Pin Descriptions

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