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54174/DM54174/DM74174, 54175/DM54175/DM74175
Hex/Quad D Flip-Flops with Clear
54174/DM54174/DM74174, 54175/DM54175/DM74175 Hex/Quad D Flip-Flops with Clear
June 1989
General Description
These positive-edge triggered flip-flops utilize TTL circuitry
to implement D-type flip-flop logic. All have a direct clear
input, and the quad (175) version features complementary
outputs from each flip-flop.
Information at the D inputs meeting the setup and hold time
requirements is transferred to the Q outputs on the positivegoing edge of the clock pulse. Clock triggering occurs at a
particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input
is at either the high or low level, the D input signal has no
effect at the output.
Connection Diagrams
Dual-In-Line Package
Features
Y
174 contains six flip-flops with single-rail outputs
Y
175 contains four flip-flops with double-rail outputs
Y
Buffered clock and direct clear inputs
Y
Individual data input to each flip-flop
Y
Applications include:
Buffer/storage registers
Shift registers
Pattern generators
Y
Typical clock frequency 40 MHz
Y
Typical power dissipation per flip-flop 38 mW
Y
Alternate Military/Aerospace device (54174, 54175) is
available. Contact a National Semiconductor Sales Office/Distributor for specifications.
Dual-In-Line Package
Order Number 54174DMQB, 54174FMQB, DM54174J,
TL/F/6557– 1
DM54174W or DM74174N
See NS Package Number J16A, N16E or W16A
Order Number 54175DMQB, 54175FMQB, DM54175J,
DM54175W or DM74175N
See NS Package Number J16A, N16E or W16A
TL/F/6557– 2
Function Table (Each Flip-Flop)
Inputs Outputs
Clear Clock D Q Q
LXXLH
H
H
u
u
HLXQ
e
H
High Level (steady state)
e
L
Low Level (steady state)
e
X
Don’t Care
e
Transition from low to high level
u
e
Q
The level of Q before the indicated steady-state input conditions were established.
0
e
²
175 only
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
TL/F/6557
HH L
LL H
0
²
Q
0
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range
DM54 and 54
DM74 0
Storage Temperature Range
b
55§Ctoa125§C
Ctoa70§C
§
b
65§Ctoa150§C
Recommended Operating Conditions
Symbol Parameter
V
V
V
I
I
f
t
t
t
t
T
CC
IH
IL
OH
OL
CLK
W
SU
H
REL
A
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
High Level Input Voltage 2 2 V
Low Level Input Voltage 0.8 0.8 V
High Level Output Current
Low Level Output Current 16 16 mA
Clock Frequency (Note 4) 0 30 0 30 MHz
Pulse Width Clock Low 25 25
(Note 4)
Data Setup Time (Note 4) 20 20 ns
Data Hold Time (Note 4) 0 0 ns
Clear Release Time (Note 4) 30 30 ns
Free Air Operating Temperature
Clock High 10 10 ns
Clear 20 20
Min Nom Max Min Nom Max
b
55 125 0 70
The ‘‘Absolute Maximum Ratings’’ are those values
Note:
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
DM54174 DM74174
b
0.8
b
0.8 mA
Units
C
§
’174 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
e
V
I
V
OH
V
OL
I
I
I
IH
I
IL
I
OS
I
CC
Note 1: All typicals are at V
Note 2: Not more than one output should be shorted at a time.
Note 3: With all outputs open and all DATA and CLEAR inputs at 4.5V, I
Note 4: T
Input Clamp Voltage V
High Level Output V
Voltage V
Low Level Output V
Voltage V
Input Current@Max V
Input Voltage
High Level Input Current V
Low Level Input Current V
Short Circuit V
Output Current (Note 2)
Supply Current V
e
e
5V, T
e
A
25§C and V
CC
e
CC
5V.
25§C.
A
CC
CC
IL
CC
IH
CC
CC
CC
CC
CC
e
e
eb
Min, I
e
Min, I
Max, V
e
Min, I
Min, V
e
Max, V
e
Max, V
e
Max, V
e
Max DM54
e
Max (Note 3) 45 65 mA
12 mA
I
e
Max
OH
e
Min
IH
e
Max
OL
e
Max
IL
e
5.5V
I
e
2.4V 40 mA
I
e
0.4V
I
DM74
is measured after a momentary ground, then 4.5V applied to the CLOCK input.
CC
2.4 V
b
b
2
Typ
(Note 1)
Max Units
b
1.5 V
0.4 V
1mA
b
1.6 mA
20
18
b
57
b
mA
57
’174 Switching Characteristics
e
at V
CC
5V and T
Symbol Parameter
f
MAX
t
PLH
t
PHL
t
PHL
e
25§C (See Section 1 for Test Waveforms and Output Load)
A
From (Input)
To (Output)
Maximum Clock
Frequency
Propagation Delay Time Clock to
Low to High Level Output Any Q
Propagation Delay Time Clock to
High to Low Level Output Any Q
Propagation Delay Time Clear to
High to Low Level Output Any Q
Recommended Operating Conditions
Symbol Parameter
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
t
W
t
SU
t
H
t
REL
T
A
Note 1: T
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
High Level Input Voltage 2 2 V
Low Level Input Voltage 0.8 0.8 V
High Level Output Current
Low Level Output Current 16 16 mA
Clock Frequency (Note 1) 0 30 0 30 MHz
Pulse Width Clock Low 25 25
(Note 1)
Data Setup Time (Note 1) 20 20 ns
Data Hold Time (Note 1) 0 0 ns
Clear Release Time (Note 1) 30 30 ns
Free Air Operating Temperature
e
A
25§C and V
e
5V.
CC
Clock High 10 10 ns
Clear 20 20
Min Nom Max Min Nom Max
b
55 125 0 70
R
L
e
400X,C
e
15 pF
L
Min Max
30 MHz
25 ns
25 ns
40 ns
DM54175 DM74175
b
0.8
b
0.8 mA
Units
Units
C
§
3