The CD4020BM/CD4020BC, CD4060BM/CD4060BC are
14-stage ripple carry binary counters, and the CD4040BM/
CD4040BC is a 12-stage ripple carry binary counter. The
counters are advanced one count on the negative transition
of each clock pulse. The counters are reset to the zero state
by a logical ‘‘1’’ at the reset input independent of clock.
Connection Diagrams
Dual-In-Line Package
CD4020BM/CD4020BC
TL/F/5953– 1
Top View
Dual-In-Line Package
CD4040BM/CD4040BC
Features
Y
Wide supply voltage range1.0V to 15V
Y
High noise immunity0.45 VDD(typ.)
Y
Low power TTLFan out of 2 driving 74L
compatibilityor 1 driving 74LS
Y
Medium speed operation8 MHz typ. at V
Y
Schmitt trigger clock input
Order Number CD4020B, CD4040B or CD4060B
Dual-In-Line Package
CD4060BM/CD4060BC
DD
e
10V
Top View
C
1995 National Semiconductor CorporationRRD-B30M105/Printed in U. S. A.
TL/F/5953
TL/F/5953– 2
Top View
TL/F/5953– 3
Page 2
Absolute Maximum Ratings (Notes 1 and 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
DD
)
Input Voltage (VIN)
Storage Temperature Range (T
)
S
b
0.5V toa18V
b
0.5V to V
b
65§Ctoa150§C
DD
a
0.5V
Recommended Operating
Conditions
Supply Voltage (VDD)
Input Voltage (VIN)0VtoV
Operating Temperature Range (TA)
CD40XXBM
CD40XXBC
a
3V toa15V
b
55§Ctoa125§C
b
40§Ctoa85§C
Package Dissipation (PD)
Dual-In-Line700 mW
Small Outline500 mW
Lead Temperature (T
(Soldering, 10 seconds)260
)
L
C
§
DC Electrical Characteristics CD40XXBM (Note 2)
b
SymbolParameterConditions
55§C
MinMaxMinTypMaxMin Max
I
Quiescent Device Current V
DD
V
Low Level Output Voltage V
OL
V
High Level Output Voltage V
OH
V
Low Level Input VoltageV
IL
V
High Level Input Voltage V
IH
I
Low Level Output Current V
OL
(See Note 3)V
I
High Level Output Current V
OH
(See Note 3)V
I
Input CurrentV
IN
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device
operation.
Note 2: V
Note 3: Data does not apply to oscillator points w
DC Electrical Characteristics 40XXBC (Note 2) (Continued)
b
SymbolParameterConditions
40§C
MinMaxMinTypMaxMin Max
e
e
5V4.954.9554.95V
DD
e
V
10V9.959.95109.95V
DD
e
V
15V14.9514.951514.95V
DD
DD
V
DD
V
DD
DD
V
DD
V
DD
DD
DD
V
DD
DD
DD
V
DD
DD
V
DD
200k, t
e
e
e
e
e
e
e
e
e
e
e
e
e
e
r
e
5V, V
10V, V
15V, V
5V, V
10V, V
15V, V
5V, V
10V, V
15V, V
5V, V
10V, V
15V, V
15V, V
15V, V
e
0.5V or 4.5V1.521.51.5V
O
e
1.0V or 9.0V3.043.03.0V
O
e
1.5V or 13.5V4.064.04.0V
O
e
0.5V or 4.5V3.53.533.5V
O
e
1.0V or 9.0V7.07.067.0V
O
e
1.5V or 13.5V 11.011.0911.0V
O
e
0.4V0.520.440.880.36mA
O
e
0.5V1.31.12.250.9mA
O
e
1.5V3.63.08.82.4mA
O
e
4.6V
O
e
9.5V
O
e
13.5V
O
e
0V
IN
e
15V0.3010
IN
e
t
20 ns, unless otherwise noted
f
b
0.52
b
1.3
b
3.6
b
0.30
V
High Level Output Voltage V
OH
V
Low Level Input VoltageV
IL
V
High Level Input Voltage V
IH
I
Low Level Output Current V
OL
(See Note 3)V
I
High Level Output Current V
OH
(See Note 3)V
I
Input CurrentV
IN
AC Electrical Characteristics* CD4020BM/CD4020BC, CD4040BM/CD4040BC
e
T
A
25§C, C
L
e
50 pF, R
L
SymbolParameterConditionsMinTypMaxUnits
t
PHL1,tPLH1
t
PHL,tPLH
t
THL,tTLH
tWL,t
WH
t
rCL,tfCL
f
CL
t
PHL(R)
t
WH(R)
C
in
C
pd
*AC Parameters are guaranteed by DC correlated testing.
Propagation Delay Time to Q
Interstage Propagation Delay TimeV
from Q
to Q
n
na1
Transition TimeV
Minimum Clock Pulse WidthV
Maximum Clock Rise and Fall TimeV
Maximum Clock FrequencyV
Reset Propagation DelayV
Minimum Reset Pulse WidthV
Average Input CapacitanceAny Input57.5pF
Power Dissipation Capacitance50pF
1
e
V
5V250550ns
DD
e
V
10V100210ns
DD
e
V
15V75150ns
DD
e
5V150330ns
DD
e
V
10V60125ns
DD
e
V
15V4590ns
DD
e
5V100200ns
DD
e
V
10V50100ns
DD
e
V
15V4080ns
DD
e
5V125335ns
DD
e
V
10V50125ns
DD
e
V
15V40100ns
DD
e
5VNo Limitns
DD
e
V
10VNo Limitns
DD
e
V
15VNo Limitns
DD
e
5V1.54MHz
DD
e
V
10V410MHz
DD
e
V
15V512MHz
DD
e
5V200450ns
DD
e
V
10V100210ns
DD
e
V
15V80170ns
DD
e
5V200450ns
DD
e
V
10V100210ns
DD
e
V
15V80170ns
DD
a
b
0.44b0.88
b
1.1b2.25
b
3.0b8.8
b
25§C
b
b
5
b
10
0.30
b
5
0.301.0mA
a
0.36mA
b
0.9mA
b
2.4mA
85§C
b
1.0 mA
Units
3
Page 4
AC Electrical Characteristics* CD4060BM/CD4060BC
e
T
25§C, C
A
L
e
50 pF, R
e
L
200k, t
e
e
t
r
20 ns, unless otherwise noted
f
SymbolParameterConditionsMinTypMaxUnits
t
PHL4,tPLH4
t
PHL,tPLH
t
THL,tTLH
tWL,t
WH
t
rCL,tfCL
f
CL
t
PHL(R)
t
WH(R)
C
in
C
pd
*AC Parameters are guaranteed by DC correlated testing.
Propagation Delay Time to Q
Interstage Propagation Delay TimeV
from Q
to Q
n
na1
Transition TimeV
Minimum Clock Pulse WidthV
Maximum Clock Rise and Fall TimeV
Maximum Clock FrequencyV
Reset Propagation DelayV
Minimum Reset Pulse WidthV
Average Input CapacitanceAny Input57.5pF
Power Dissipation Capacitance50pF
4
e
V
5V5501300ns
DD
e
V
10V250525ns
DD
e
V
15V200400ns
DD
e
5V150330ns
DD
e
V
10V60125ns
DD
e
V
15V4590ns
DD
e
5V100200ns
DD
e
V
10V50100ns
DD
e
V
15V4080ns
DD
e
5V170500ns
DD
e
V
10V65170ns
DD
e
V
15V50125ns
DD
e
5VNo Limitns
DD
e
V
10VNo Limitns
DD
e
V
15VNo Limitns
DD
e
5V13MHz
DD
e
V
10V38MHz
DD
e
V
15V410MHz
DD
e
5V200450ns
DD
e
V
10V100210ns
DD
e
V
15V80170ns
DD
e
5V200450ns
DD
e
V
10V100210ns
DD
e
V
15V80170ns
DD
CD4060B Typical Oscillator Connections
RC Oscillator
TL/F/5953– 4
4
Crystal Oscillator
TL/F/5953– 5
Page 5
Schematic Diagrams
CD4020BM/CD4020BC Schematic Diagram
TL/F/5953– 6
CD4040BM/CD4040BC Schematic Diagram
CD4060BM/CD4060BC Schematic Diagram
5
TL/F/5953– 7
TL/F/5953– 8
Page 6
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD4020BMJ, CD4020BCJ,
CD4040BMJ, CD4040BCJ, CD4060BMJ or CD4060BCJ
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number CD4020BMN, CD4020BCN,
CD4040BMN, CD4040BCN, CD4060BMN or CD4060BCN
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implantsupport device or system whose failure to perform can
into the body, or (b) support or sustain life, and whosebe reasonably expected to cause the failure of the life
failure to perform, when properly used in accordancesupport device or system, or to affect its safety or
with instructions for use provided in the labeling, caneffectiveness.
be reasonably expected to result in a significant injury
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