March 1988
CD4002M/CD4002C Dual 4-Input NOR Gate
CD4012M/CD4012C Dual 4-Input NAND Gate
General Description
These NOR and NAND gates are monolithic complementary MOS (CMOS) integrated circuits. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swings essentially equal to the supply voltage. This results in high noise immunity over a wide supply voltage range. No DC power other than that caused by leakage current is consumed during static conditions. All inputs are protected against static discharge and latching conditions.
Features
Y Wide supply voltage range |
3.0V to 15V |
Y Low power |
10 nW (typ.) |
Y High noise immunity |
0.45 VDD (typ.) |
Applications
Y Automotive |
Y Alarm system |
|
Y Data terminals |
Y Industrial controls |
|
Y Instrumentation |
Y |
Remote metering |
Y Medical Electronics |
Y |
Computers |
Connection Diagrams
CD4002 |
CD4012 |
Dual-In-Line Package |
Dual-In-Line Package |
TL/F/5940 ± 1 |
TL/F/5940 ± 2 |
Top View |
Top View |
Order Number CD4002 or CD4012
Gate NOR Input-4 Dual CD4002M/CD4002C
Gate NAND Input-4 Dual CD4012M/CD4012C
C1995 National Semiconductor Corporation |
TL/F/5940 |
RRD-B30M105/Printed in U. S. A. |
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Voltage at Any Pin |
VSS b0.3V to VDD a0.3V |
Operating Temperature Range |
b55§C to a125§C |
CD4002M, CD4012M |
|
CD4002C, CD4012C |
b40§C to a85§C |
Storage Temperature Range (TS) |
b65§C to a150§C |
Power Dissipation (PD) |
|
Dual-In-Line |
700 mW |
Small Outline |
500 mW |
Operating Range (VDD) |
VSS a3.0V to VSS a15V |
Lead Temperature (TL) |
260§C |
(Soldering, 10 seconds) |
DC Electrical Characteristics CD4002M, CD4012M
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Limits |
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|
Symbol |
Parameter |
Conditions |
b55§C |
|
a25§C |
|
a125§C |
Units |
|||
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|
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Min |
Max |
Min |
|
Typ |
Max |
Min |
Max |
|
IDD |
Quiescent |
VDD e 5.0V |
|
0.05 |
|
|
0.001 |
0.05 |
|
3.0 |
mA |
|
Device Current |
VDD e 10V |
|
0.1 |
|
|
0.001 |
0.1 |
|
6 |
mA |
PD |
Quiescent Device |
VDD e 5.0V |
|
0.25 |
|
|
0.005 |
0.25 |
|
15 |
mW |
|
Dissipation/Package |
VDD e 10V |
|
1.0 |
|
|
0.01 |
1.0 |
|
60 |
mW |
VOL |
Output Voltage |
VDD e 5.0V, VI e VDD, IO e 0A |
|
0.05 |
|
|
0 |
0.05 |
|
0.05 |
V |
|
Low Level |
VDD e 10V, VI e VDD, IO e 0A |
|
0.05 |
|
|
0 |
0.05 |
|
0.05 |
V |
VOH |
Output Voltage |
VDD e 5.0V, VI e VSS, IO e 0A |
4.95 |
|
4.95 |
|
5.0 |
|
4.95 |
|
V |
|
High Level |
VDD e 10V, VI e VSS, IO e 0A |
9.95 |
|
9.95 |
|
10 |
|
9.95 |
|
V |
VNL |
Noise Immunity |
VDD e 5.0V, VO e 3.6V, IO e 0A |
1.5 |
|
1.5 |
|
2.25 |
|
1.4 |
|
V |
|
(All Inputs) |
VDD e 10V, VO e 7.2V, IO e 0A |
3.0 |
|
3.0 |
|
4.5 |
|
2.9 |
|
V |
VNH |
Noise Immunity |
VDD e 5.0V, VO e 0.95V, IO e 0A |
1.4 |
|
1.5 |
|
2.25 |
|
1.5 |
|
V |
|
(All Inputs) |
VDD e 10V, VO e 2.9V, IO e 0A |
2.9 |
|
3.0 |
|
4.5 |
|
3.0 |
|
V |
IDN |
Output Drive Current |
VDD e 5.0V, VO e 0.4V, VI e VDD |
0.5 |
|
0.40 |
|
1.0 |
|
0.28 |
|
mA |
|
N-Channel (4002) |
VDD e 10V, VO e 0.5V, VI e VDD |
1.1 |
|
0.9 |
|
2.5 |
|
0.65 |
|
mA |
|
(Note 2) |
|
|
|
|
|
|
|
|
|
|
IDP |
Output Drive Current |
VDD e 5.0V, VO e 2.5V, VI e VSS |
b0.62 |
|
b0.5 |
|
b2.0 |
|
b0.35 |
|
mA |
|
P-Channel (4002) |
VDD e 10V, VO e 9.5V, VI e VSS |
b0.62 |
|
b0.5 |
|
b1.0 |
|
b0.35 |
|
mA |
|
(Note 2) |
|
|
|
|
|
|
|
|
|
|
IDN |
Output Drive Current |
VDD e 5.0V, VO e 0.4V, VI e VDD |
0.31 |
|
0.25 |
|
0.5 |
|
0.175 |
|
mA |
|
N-Channel (4012) |
VDD e 10V, VO e 0.5V, VI e VDD |
0.63 |
|
0.5 |
|
0.6 |
|
0.35 |
|
mA |
|
(Note 2) |
|
|
|
|
|
|
|
|
|
|
IDP |
Output Drive Current |
VDD e 5.0V, VO e 2.5V, VI e VSS |
b0.31 |
|
b0.25 |
|
b0.5 |
|
b0.175 |
|
mA |
|
P-Channel (4012) |
VDD e 10V, VO e 9.5V, VI e VSS |
b0.75 |
|
b0.6 |
|
b1.2 |
|
b0.4 |
|
mA |
|
(Note 2) |
|
|
|
|
|
|
|
|
|
|
II |
Input Current |
|
|
|
|
|
10 |
|
|
|
pA |
Note 1: ``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed. Except for ``Operating Temperature Range'' they are not meant to imply that the devices should be operated at these limits. The table of ``Electrical Characteristics'' provides conditions for actual device operation.
Note 2: IDN and IDP are tested one output at a time.
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