National Semiconductor ADC08200 Instruction Manual

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Page 1

December 2005

National Semiconductor

. .

Evaluation Board Instruction Manual

ADC08200 8-Bit, 10 MSPS to 230 Msps, Analog-to-Digital

Converter with Internal Sample & Hold

Rev 7

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Table of Contents

1.0 Introduction.............................................................................................................................5

2.0 Board Assembly .....................................................................................................................5

3.0 Quick Start..............................................................................................................................5

4.0 Functional Description............................................................................................................6

4.1 Input (signal conditioning) circuitry............................................................................6

4.2 ADC reference circuitry .............................................................................................6

4.3 ADC clock circuit .......................................................................................................6

4.4 Digital Data Output....................................................................................................7

4.5 Power Supply Connections .......................................................................................7

4.6 Power Requirements.................................................................................................7

5.0 Installing and Using the ADC08200 Evaluation Board ...........................................................7

5.1 Software Installation..................................................................................................7

5.2 Setting up the ADC08200 Evaluation Board .............................................................7

5.2.1 Board Set-up .............................................................................................7

5.2.1.1 Computer Mode Operation........................................................7

5.2.1.2 Manual Mode Operation............................................................8

5.2.2 Quick Check of Analog Functions .............................................................8

5.2.3 Quick Check of Software and Computer Interface Operation...................8

5.2.4 Getting Consistent Readings.....................................................................8

5.2.5 Jumper Information ...................................................................................9

5.2.6 Troubleshooting.........................................................................................9

6.0 Evaluation Board Specifications.............................................................................................9

7.0 Hardware Schematic ..............................................................................................................10

8.0 Evaluation Board Bill of Materials...........................................................................................12

Summary Tables of Test Points and Connectors.........................................................................13

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1.0 Introduction

The ADC08200EVAL Design Kit (consisting of the ADC08200 Evaluation Board, National Semiconductor's WaveVision© software and this manual) is designed to ease evaluation and design-in of Nationals ADC08200 8bit Analog-to-Digital Converter, which operates at sample rates up to 230 Msps.

The WaveVision software operates under Microsoft Windows®. The signal at the Analog Input is digitized and can be captured and displayed on the computer monitor as dynamic waveforms. The digitized output is also available at Euro connector J1.

The software can perform an FFT on the captured data upon command. This FFT display also shows dynamic performance in the form of SNR, SINAD, THD and SFDR.

Evaluation with this system is simplified by connecting the board to the WaveVision Digital Interface Board (order number WAVEVSN BRD 3.0), which is connected to a personal computer through a serial communication port and running WaveVision software, operating under Microsoft Windows. Use program WAVEVSN2.EXE, available at National Semiconductor's web site.

The signal at the Analog Input to the board is digitized and is available at pins B16 through B19 and C16 through C19 of J1. Pins A16 through A21 of J1 are ground pins.

Provision is made for adjustment of the Reference Voltages, VRT and VRB with potentiometers VR1 and VR2, respectively. These voltages are regulated with an LM4040-2.5 reference.

2.0 Board Assembly

The ADC08200 Evaluation Board comes pre-assembled but may be obtained as a bare board that must be assembled. Refer to the Bill of Materials for a description of components, to Figure 1 for major component placement and to Figure 2 for the Evaluation Board schematic.

3.0 Quick Start

Refer to Figure 1 for locations of test points and major components.

1. Connect the evaluation board to the Digital Interface Board (order number W AVEVSN BRD 3.0). See the Digital Interface Board Manual for operation of that board.

2. Install a 200 MHz (or lower) oscillator into socket Y1. While the oscillator may be soldered to the board, using a socket will allow you to easily change clock frequencies.

3. Connect a clean power supply to the terminals of connector P1. Adjust power supply to voltages of +4.75V to +5.25V at pins 1 and 3 and -5.2 to -5.3V at pin 4 (ground is pin 2) before connecting it to the board. Turn on the power and confirm that there is 3 Volts at TP7 or at the pins of inductor L1.

4. Use RV1 to set the top reference voltage (V the ADC to 1.9V ±0.05V at TP2. Use RV2 to set the bottom reference voltage (V

0.3V ±0.05V at TP3.

5. Connect the jumper at JP1 to pins 2 and 3 (those closest to Q1) to use oscillator Y1 frequency without dividing it by 2.

6. If they are not hard wired, connect the jumper at JP2 and JP8 to pins 2 and 3 (those closest to input BNC J3) and the jumper at JP7 to pins 1 and 2 (those farthest fro input BNC J3) to use both FIFOs U8 and U10.

7. Connect a signal of 1.6V Ohm source to Analog Input BNC J3. The ADC input signal can be observed at TP1. Because of isolation resistor R32 and the scope probe capacitance, the input signal at TP1 will not have the same frequency response as will the ADC input signal.

8. The Digital Interface Board should be set up for10 MHz operation with an 80MHz oscillator installed. See the Digital Interface Board manual.

9. See the Digital Interface Board Manual for data gathering instructions.

NOTE: The FFT will not indicate the correct frequencies because this information is derived from the clock frequency selected on the Digital Interface Board. To show the correct frequency information on the FFT, double click on the FFT window to open the FFT Dialog Box, then click on "Frequency", enter the sample rate in MHz, then click on "OK". Alternatively, you may double click on the data capture window before performing the FFT and change the frequency at "Sampling Rate of This Data (MHz)" to 200 to indicate a 200 MHz sample rate.

) for the ADC to

RFB

amplitude from a 50-

P-P

RFT

) for

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JP1

CLK FREQ

SELECT

JP2, JP7

Detail:

Hard-Wired

Position

JP8

Detail:

Hard-Wired

Position

JP1

Detail:

Default Jumper

Position

TP4

JP6 DLY1

DGND

NUMEM JP8

JP1

JP2

ADCCLK

MEM

TP2

VTFT

INPUT

NATIONAL SEMICONDUCTOR ADC08200 EVAL BOARD

DGND

TP7

JP5 DLY0

DIV_EN

TP5

Figure 1. Component and Test Point Locations

4.0 Functional Description

The ADC08200 Evaluation Board schematic is shown in Figure 2.

4.1 Input (signal conditioning) circuitry

The input signal to be digitized should be applied to BNC connector J3. This 50 Ohm input is intended to accept a low-noise sine wave signal of 1.6V peak-to-peak amplitude. To accurately evaluate the ADC08200 dynamic performance, the input test signal should be passed through a high-quality bandpass filter (60dB minimum stop-band attenuation) as even the best signal sources do not provide a pure enough sine wave to properly evaluate an ADC.

The input to the ADC08200 is a.c. coupled through capacitor C14. Resistors R33A and R33B provide the needed input bias to the ADC08200. If d.c. coupling is desired, be sure that the input signal remains within the limits set by VRT at TP2 and VRB at TP3.

POWER

CONNECTOR

JP7

VTFT

TP2

INPUT

TP1

INPUT BNC

U10

TP7

TP3 VRFB

3VCC

RV1

TP3

VTFB

POWER CONNECTOR

TP6

GND

RV2

RV1

VTFT ADJ

+5V GND +5V

-5.2V

3VCC

RV2

VTFB ADJ

TP7

4.2 ADC reference circuitry

The provided reference circuitry will provide nominal reference voltage ranges of 1.3V to 2.5V for V 0V to 1.3V for V of 0V to 2.5V peak-to-peak.

, Providing for nominal input ranges

RFB

The reference voltages for the ADC08200 can be monitored at test points TP2 and TP3 and are set with RV1 and RV2. Signal offset can be provided by adjusting both of these potentiometers.

4.3 ADC clock circuit

The board is shipped ready to accept an ECL clock oscillator at a frequency of your choosing and is shipped without an oscillator in its socket. 200 MHz oscillators are not readily available, but a suitable 200 MHz oscillator is available from Pletronics, Inc. as their part number EC1145ME-200.0MPST.

RFT

and

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Note that the divide by 2 function (JP1) does not function. A lower clock frequency requires the use of a lower frequency oscillator.

An ECL-level crystal oscillator may be installed at Y1, or the desired frequency may be applied to pin 8 of the Y1 socket. The signal level should be ECL levels.

Caution: Be sure that the oscillator used has the above suggested levels. We have found oscillators with levels outside of this range will not work properly in the circuit designed for this board.

R31 and C11 are used for high frequency termination of the clock line. An 80MHz clock oscillator should be used on the Digital Interface Board with that board's clock divider set for 4. See the Digital Interface Board manual for details on setting the clock divider.

Note that the reported sample rate is the rate at which the FIFO is read, so it is necessary to manually change this by double clicking on the data window after each data capture and changing the sample rate to that actually used.

4.4 Digital Data Output.

The digital output data from the ADC08200 is available at the 96-pin Euro connector J1. The series resistors of R35 isolate the ADC from the load circuit to reduce noise coupling into the ADC.

4.5 Power Supply Connections

Power to this board is supplied through power connector J4. The ADC08200 evaluation board requires +5V at pins 1 and 3 and -5.2V at pin 4. Pin 2 is ground.

When using the ADC08200 Evaluation Board with the Digital Interface Board, the 5V logic power supply for the interface board is passed through the ADC08200 evaluation board from pin 3 of Power Connector J4. The supply voltages are protected by shunt diodes D1, D2 and D4. The +3 Volts needed for the ADC08200 is provided with voltage regulator U7, an LM317T.

4.6 Power Requirements

Voltage and current requirements for the ADC08200 Evaluation Board are:

• Pin 1 of P1: +5.0V ±5% at 3 mA

• Pin 3 of P1: +5.0V ±5% at 1.0 A.

• Pin 4 of P1: - 5.2V to -5.3V at 250 mA.

Pin 2 of J4 is ground. The +5V supply at pin 3 of the Power Connector P1 provides the power to the Digital Interface Board, where most of the power through this pin is consumed.

5.0 Installing and Using the ADC08200

Evaluation Board

The evaluation board requires power supplies as described in Section 4.6. An appropriate signal source (such as the HP3325B, HP8662A or the Tektronix TSG130A) with 50 Ohm source impedance should be connected to the Analog Input BNC J3. The generator output should be filtered by a bandpass filter when evaluating sinusoidal signals to be sure there are no unwanted frequencies (harmonics and noise) presented to the ADC. A cable with a DB-9 connector must be connected between the Digital Interface Board and the host computer. See the Digital Interface Board manual for details.

5.1 Software Installation

The WaveVision software provided requires 300k bytes of hard drive space and will run under Windows.

1. Insert the disk into a 3.5" floppy drive.

2. Copy the program WAVEVSN2.EXE to the desired subdirectory on you computer's hard disk and RUN it.

Alternatively, you may download the shoftware from national Semiconductor's ADC web site.

5.2 Setting up the ADC08200 Evaluation Board

This evaluation package was designed to be easy and simple to use, and to provide a quick and simple way to evaluate the ADC08200. The procedures given here will help you to properly set up the board.

5.2.1 Board Set-up

Refer to Figure 1 for locations of connectors, test points and jumpers on the board.

5.2.1.1 Computer Mode Operation

1. Be sure a 200MHz clock oscillator (Y1) is in place on the ADC08200 evaluation board and an 80MHz oscillator is on the Digital Interface board.

2. Set jumper JP1 to its default position, as shown in Figure 1 so that the clock oscillator frequency is NOT divided by two for the ADC08200.

3. Connect The ADC08200 evaluation board to Digital Interface Board, WAVEVSN BRD 3.0.

4. Connect a cable with DB-9 connector between the Digital Interface Board connector P1 and a serial port on your computer.

5. Connect power to the board per requirements of section 4.6.

6. Connect an appropriate signal source to BNC connector J3 of the ADC08200 evaluation board. Rebember to use an appropriate filter, as discussed in sections 4.1 and 5.0.

7. Capture data by clicking on the sine wave icon of the WaveVision software, or press CTRL-X on the keyboard.

5.2.1.2 Manual Mode Operation

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1. Perform steps 1, 2 and 5 of section 5.2.1.1, above. 9. With the mouse, you may click and drag to select a

2. Monitor the ADC08200 output at 96-pin connector J1 pins B16 through B19 and C16 through C19 (see

portion of the displayed waveform for better examination.

appendix for pin assignments). 10. Click on the FFT icon or type ALT, P, F or CTRL-F to

4. Clock the data out with a TTL clock of any speed up to 200 MHz at pin B15 of 96-pin connector J1.

5.2.2 Quick Check of Analog Functions

Refer to Figure 1 for locations of connectors, test points and jumpers on the board. If at any time the expected response is not obtained, see section 5.2.6 on Troubleshooting.

1. Perform steps 1 through 6 (steps 3 and 4 are optional here) of Section 5.2.1.1.

2. Checl for the presence of correct d.c. voltages at power connector J4, as called for in section 4.6.

3. Check TP7 or either terminal of L1 for the presence of a voltage between 2.7V and 3.3V.

4. JP1 - Short the two pins closest to Q1 (pins 2 & 3) to NOT divide the on-board clock oscillator by 2.

calculate the FFT of the data and display a frequency domain plot.

The FFT data will provide a measurement of SINAD, SNR, THD and SFDR, easing the performance verification of the ADC08200. Note that the readings may not accurately reflect the ADC08200's actual performance unless an input filter is used, as explained in sections 4.1 and 5.0, and unless the sampling is coherent, as explained below.

5.2.4 Getting Consistent Readings

Artifacts can result when we perform an FFT on a digitized waveform, producing inconsistent results when testing repeatedly. The presence of these artifacts means that the ADC under test may perform better than the measurements would indicate.

5. Adjust RV1 for a voltage of 1.87V to 1.93V at TP2. We can eliminate the need for windowing and get more

6. Adjust RV2 for a voltage of 0.27V to 0.33V at TP4.

7. Adjust the signal source at Analog Input J3 for a signal amplitude of approximately 1.6V check for the presence of that signal at TP1.

P-P

and

This completes the testing of the analog portion of the evaluation board.

5.2.3 Quick Check of Software and Computer

Interface Operation

1. Perform steps 1 through 5 of Section 5.2.1.1, above.

2. Supply a 1.6Vp-p sine wave of 1 MHz to 50MHz at Analog Input BNC J3.

3. Be sure there is an interconnecting cable between the board and your computer serial port.

4. RUN program WAVEVSN2.EXE.

5. After turning on the power, be sure to wait for yellow LED D4 on the Digital Interface Board to go out (about 5 seconds) before trying to acquire data or the board will "freeze" and you will have to cycle the power.

6. Acquire data by clicking on the ACQUIRE icon or by pressing ALT, P, A or CTRL-X. Data transfer can take a few seconds.

7. When transfer is complete, the data window should show many sine waves. The display may show a nearly solid area of red, which is O.K.

8. Double click on the data window and change the "Sampling Rate of this data (MHz)" to 200. This must be done each time another data capture is done or the frequency information in the FFT will not be correct.

consistent results if we observe the proper ratios between the input and sampling frequencies. This greatly increases the spectral resolution of the FFT, allowing us to more accurately evaluate the spectral response of the A/D converter. When we do this, however, we must be sure that the input signal has high spectral purity and stability and that the sampling clock signal is extremely stable with minimal jitter.

Coherent sampling of a periodic waveform occurs when an integer number of cycles exists in the sample window. The relationship between the number of cycles sampled (CY), the number of samples taken (SS), the signal input frequency (fin) and the sample rate (fs), for coherent sampling, is

CY, the number of cycles in the data record, must be an integer number and SS, the number of samples in the data record, must be a factor of 2 integer. For optimum results, CY should also be a prime number.

Further, fin (signal input frequency) and fs (sampling rate) should be locked to each other. If they come from the same generator, whatever frequency instability (jitter) is present in the two signals will cancel each other.

Windowing (an FFT Option under WaveVision) should be turned off for coherent sampling.

5.2.5 Jumper Information

Table 1 indicates the function and use of the jumpers on the ADC08200 evaluation board. JP2, JP7 and JP8 are hard-wired for 2 memory chips.

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JUMPER FUNCTION

JP1 Clock Select

JP2 No of Mem Chips 1 Mem Chip 2 Mem Chips

JP7 No of Mem Chips 2 Mem Chips 1 Mem Chip

JP8 No of Mem Chips 1 Mem Chip 2 Mem Chips

Table 1. Jumper settings.

5.2.6 Troubleshooting • Be sure positions JP2, JP7 and JP8 are wired.

"Comm Check Failed", "Error Transmitting", "Parallel Port Time Out Error" and/or "Failed to communicate with the board on LPT1" errors mean communication was unsuccessful. Try the following:

PINS 1 & 2

SHORTED

Divide Clock

by 2

PINS 2 & 3 SHORTED

Do not Divide

Clock

• Be sure to wait for yellow LED D4 on the Digital

Interface Board to go out after turning on power before trying to capture data.

• Be sure that the Digital Interface Board is connected

to a serial printer port and has power.

• Be sure the proper port is selected (type ALT-O).

• Ascertain that an 80MHz clock oscillator is properly

inserted into the socket at Y1 of the Digital Interface Board and that the DIP switches on the Digital Interface Board are properly set (see the Digital Interface Board manual). Check to see that LEDs D1 and D3 of the Digital Interface Board are on. See the Digital Interface Board manual for their functions.

• Be sure cable connections are solid.

• Be sure that the board to computer cable is not a

Null Modem type. If it is, swap the jumpers J8 and J10 on the Digital Interface Board.

If there is no output from the ADC08200, perform the following:

• Be sure that the proper voltages and polarities are

present at Power Connector P1 (especially the

-5.2V).

• Be sure +3 Volts is present on terminals of L1, or at

TP7.

• Be sure that R57 is mounted correctly. See

http://www.national.com/appinfo/adc/files/ADC08200-R57.pdf.

• Be sure there is an input signal at J3 and TP1 and

that the signal source and input filter are of compatible frequencies.

If the displayed waveform appears to be garbage, or if the FFT plot shows nothing but noise with no apparent signal:

• Be sure clock Y1 is of the proper frequency

(200MHz) and type (ECL with output swing between

-0.6V and -1.3V).

• Be sure positions JP2, JP7 and JP8 are wired.

Problem Opening Comm Port" or "Error Setting Comm State" errors mean that the comm port selected is not the one to which the eval board is connected.

Inconsistent or poor performance could be caused by reading the FIFO too fast. Reading fo the FIFO should be done at 10 MHz. See Digital Interface Board manual for information on setting the sampling frequency of that board.

6.0 Evaluation Board Specifications

Board Size: 4.8" x 6.0" (12.2cm x 15.2 cm) Power Requirements: + 5V ±5% @ 3.0 mA (see Section 4.6) + 5V ±5% @ 1 Amp

- 5.2V to -5.3V @ 250 mA Clock Frequency Range: 10 MHz to 230 MHz Analog Input

Nominal Voltage: 1.6V Frequency Range 50 KHz to 400 MHz Impedance: 50 Ohms

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7.0 Hardware Schematic

Figure 2a. ADC 08200 Evaluation Board Schematic

ADC0

ADC1

ADC2

ADC3

ADC4

ADC5

ADC6

ADC7

C17 1uF

D0D1D2D3D4D5D6

D10

D11

D12

D13

D14

CHOKE

+5V

-5.2V

LM358N

+3VCC

AGND

VIN GND

AGND

CLK

DR VD

DR GND

ADC08200

+3VCC

R35

8 X 47

+3VCC

ADCCLK

CY7C4281or IDT72251L10J

+5V

RD1

RD0

RD1

RD2

RD3

RD4

RD5

RD6

RD7

RD6

RD5

RD4

RD3

RD2

D4D3D2D1D0

U10

CY7C4281 or IDT72251L10J

RD1

RD0

Power

Connector

+5V

GND

+5V

-5.2V

LM317T

ON/OFF

OUT

ADJ

1N4001

CHOKE

C26

33uF

6.3V

+3VCC

+5VA

+5V

-5.2V

C31

47uF

6.3V

C21

100uF

6.3V

C19

33uF

6.3V

R47

240,

R46

330,

U9B

74AC74SC

7 1

CLK

CLGND

Vcc

14 4

+5V

JP7

DIVEN

7 13

CLK

CLGND

Vcc

14 10

123456789

+5V

U9A

74AC74SC

+5V

+5VA -5.2V

R48

8 x 1k

R49

8 x 47

R40 220

R45

RV1

VRT

RV2

VRB

+3VCC

JP8

NUMEM

C29 1uF

R37

4.7k

R53 130

R38

C18

4.7uF

C27

4.7uF

R43

R54 47

C24 1uF

R42

C23 1uF

TP2

VRFT

C16 1uF

C15 1uF

R30

[not used]

R33

[not used]

C12 [not used]

R34

R36 [not used]

TP1

INPUT

R32 100

C14 1uF

R31 100

C11

10pF

1MEM

JP6

DELAY1

C32 1uF

+5V

C34 1uF

JP5

DELAY0

C13 1uF

J1 96-Pin Female

Q4Q3Q2Q1Q0

20191817161514

PAF

PAE

GND

REN1

RCLK

REN2

WEN1

WCLK

WEN2/LD

VCC

123

D8D7D6D5D4D3D2

Q4Q3Q2Q1Q0

20191817161514

PAF

PAE

GND

REN1

RCLK

REN2

WEN1

WCLK

WEN2/LD

VCC

123

D8D7D6D5D4D3D2

RD7

RD6

RD5

RD4

RD3

RD2

A1B1C1A2B2C2A3B3C3A4B4C4A5B5C5A6B6C6A7B7C7A8B8C8A9B9C9

A10

B10

C10

A11

B11

C11

A12

B12

C12

A13

B13

C13

A14

B14

C14

A15

B15

C15

A16

B16

C16

A17

B17

C17

A18

B18

C18

A19

B19

C19

A20

B20

C20

A21

B21

C21

A22

B22

C22

A23

B23

C23

A24

B24

C24

A25

B25

C25

A26

B26

C26

A27

B27

C27

A28

B28

C28

A29

B29

C29

A30

B30

C30

A31

B31

C31

A32

B32

C32

TP3

VRFB

CHOKE

TP6

AGND

C20 1uF

INPUT

R39

4.7k

C22 1uF

C28 1uF

+5V

TP7

+3VCC

D4D3D2D1D0

R41

4.7k

R44

4.7k

C30 1uF

R52 100

C36 10pF

2MEM

MCREST

R56

D[0..7]

100MHz

C25

1uF

LM4040BIZ-2.5

R50

100

C33 10pF

R51 100

C35 10pF

TP6

GND

R55

R33A

100

R33B

100

New Values:

R34 was 47 now 0

R36 was 75 now not used R30 was 110 now not used R33 was 91 now not used C12 was 1uF now not used

R33A and R33B added

between VRFT and VRFB

2MEM

1MEM

R57 10k

+3VCC

JP9

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Figure 2b. ADC 08200 Evaluation Board Clock source

C10 1uF

461

C4 1uF

-5.2V

R6 22

R10 240

C2 1uF

R3 47

330

R1 330

NTE65

+5VA

C3 1uF

R7 33

+3VCC

ADC_CLK

U1B

MC10H131FN

U1A

MC10H131FN

R25

510

-5.2V

R29

510

-5.2V

R23

R19

R28 510

-5.2V

+5V

C9 1uF

C7 1uF

C8 1uF

OUT

__ IN

U2A

MC10H125FN

U2B

MC10H125FN

U2C

MC10H125FN

U2D

MC10H125FN

R22

R18

C6 1uF

R27 510

-5.2V

C1 1uF

R20

100MHz

R21

_______ 100MHz

T4-6T

VCC

VEE

15 20

17 10

VCC

VEE

7 2

5 10

R14

OUT

__ IN

R26 510

R17

JP1

ADCCLk

200MHz

-5.2V

R11

330

C5 1uF

OUT

__ IN

R15

OUT

__ IN

R13 330

R12

osc

GND

Vcc

OUT

JP2

MEM

123

R16

2MEM 1MEM

-5.2V

+5V

R41KR9

2.2K

R24

4.7K

MCREST

TP4

GND

TP5

GND

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8.0 Evaluation Board Bill of Materials

Item Qty Reference Part Source

1 24

2 4 C11, C33, C35, C36 10pF Type 1206 3 2 C18, C27 4.7uF Type 7343 (D Size) 4 2 C19, C26 33uF, 6V Type 7343 (D Size) 5 1 C21 100uF, 6V Type 7343 (D Size) 6 1 C31 47uF, 6V Type 7343 (D Size) 7 - C12, C37 8 3 D1, D2, D4 1N4001 Various

9 1 D3 LM4040EIZ-2.5 National Semiconductor 10 1 J1 96-Pin Female DigiKey # H7096-ND 11 1 JP1 3-Pin Post Header DigiKey # A19351-ND 12 1 Shorting Jumper Shorting Jumper DigiKey # S9001-ND

13 - JP2, JP7, JP8, JP9

14 - JP10

15 1 J3 BNC Connector DigiKey # ARF1177-ND 16 2 J4 Terminal Block DigiKey # ED1609-ND 17 1 JP5, JP6 18 4 L1, L2, L3, L4 Choke DigiKey # M2204-ND 19 - L5 20 2 Q1, Q2 NTE65 NTE Electronics 21 1 R34 0 (short) 22 2 R6, R8 22 Type 1206 23 2 R5, R7 33 Type 1206

24 19

25 5 R31, R32, R50, R51, R52 100 Type 1206 26 2 R33A, R33B 100 ¼ W, Leaded 27 1 R53 130 Type 1206 28 1 R40 220 Type 1206 29 2 R10, R47 240 Type 1206 30 5 R1, R2, R11, R13, R46 330 Type 1206 31 5 R25, R26, R27, R28, R29 510 Type 1206 32 1 R4 1k Type 1206 33 1 R9 2.2k Type 1206 34 5 R24, R37, R39, R41, R44 4.7k Type 1206 35 1 R57 10k Type 1206 36 3 R30, R33, R36 37 1 R35 Resistor Pack - 8 x 47 DigiKey # 767-163-R47-ND 38 1 R49 Resistor Pack (SIP) - 8 x 47 DigiKey # 750-101-R47-ND 39 1 R48 Resistor Pack (SIP) - 8 x 1k DigiKey # 750-101-R1k-ND 40 2 RV1, RV2 1k Pot DigiKey # 3386P-102-ND 41 1 TP1, TP2, TP3, TP4, TP5, TP6, TP7 Breakable Header DigiKey # S1012-36-ND 42 1 T1 Transformer MiniCircuits T4-6T 43 1 U1 MC10H131FN ON Semiconductor 44 1 U2 MC10H125FN ON Semiconductor 45 1 U3 ADC08200CIMT National Semiconductor 46 1 U5 LM358N National Semiconductor 47 1 U7 LM317T National Semiconductor

48 2 U8, U10

49 1 U9 74AC74SC / 74ACT74SC Fairchild Semiconductor

50 1 Y1

51 1 6-Pin DIP Socket Transformer Socket DigiKey # AE8906-ND 52 1 Full-Size 4-Pin Oscillator Socket Oscillator Socket for Y1 DigiKey # A462-ND 53 1 8-Pin DIP Socket For U5 DigiKey # A400-ND 54 1 PC Board ADC08200, Rev B Bay Area Circuits

C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C13, C14, C15, C16, C17, C20, C22, C23, C24, C25, C28, C29, C30, C32, C34

R3, R12, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23, R38, R42, R43, R45, R54, R55, R56

1uF Type 1206

not populated

3-Pin Post Header - Bd Rev A. Factory Set - Board Rev B Factory Set - board rev A Doesn't exist - Board Rev B

not populated

47 Type 1206

not populated

IDT72251L10J or CY7C4251V-10JC or CY7C4281V-10JC

200 MHz Oscillator

NOT POPULATED

n/a

DigiKey # A19351-ND n/a n/a

n/a

IDT Cypress Semiconductor Cypress Semiconductor

Pletronics type EC1145ME-200.0MPST

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Page 13

APPENDIX

Summary Tables of Test Points and Connectors

Test Points on the ADC08200 Evaluation Board

TP 1 Signal Input test point

TP 2 ADC Top Reference Voltage, V

TP 3 ADC Bottom Reference Voltage, V

TP 4 Ground

TP 5 Ground

TP 6 Ground

TP 7 +3V test point (Groundedd on initial board version)

P1 Connector - Power Supply Connections

J4-1 +5V Positive Power Supply J4-2 GND Power Supply Ground J4-3 +5V Logic and Digital Interface Board Supply J4-4 -5.2 Negative Power Supply

JP1 Jumper - ADC Clock

Connect 1-2 Divide Clock Oscillator (Y1) frequency by 2 Connect 2-3 Use Clock Oscillator (Y1) frequency without dividing it (Default)

JP2 Jumper - Memory

Connect 1-2 Use one FIFO chip Connect 2-3 Use both FIFO chips (Default hard-wired position)

JP3 thru JP6 - Not Used

JP7 Jumper - Divide Enable

Connect 1-2 Use both FIFO chips - divide FIFO read signal frequency by 2 (Default hard-wired position) Connect 2-3 Use one FIFO chip - do not divide FIFO read signal

JP8 Jumper - Number of Memory Chips

Connect 1-2 One Memory Chip Connect 2-3 Two Memory Chips (Default hard-wired position)

JP9 Jumper - Power Down

No Jumper ADC080200 in active state

Jumper Present ADC080200 in Power Down mode

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J1 Connector - ADC Data Outputs - Connection to WaveVision Digital Interface Board

Signal J1 pin number

ADC output D0 B16

ADC output D1 C16

ADC output D2 B17

ADC output D3 C17

ADC output D4 B18

ADC output D5 C18

ADC output D6 B19

ADC output D7 C19

ADC output D8 not used

ADC output D9 not used

ADC output D10 not used

ADC output D11 not used

GND A1 thru A24, A28, B28, C28, A31, B31, C31

Memory Read Clock B15

Reserved, Signal B22, C22, C23

Reserved, Power A25, A26, B25, B26, C25, C26

(+5V Logic Power Supply to Digital Interface Board )

Reserved, Power (–5.2V) A29, B29, C29

Reserved, Power (+5V) A32, B32, C32

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Page 16

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The ADC08200 Evaluation Board is intended for product evaluation purposes only and is not intended for resale to end consumers, is not authorized for such use and is not designed for compliance with European EMC Directive 89/336/EEC.

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