MSI MS-V151 Schematic

8

+12V_BUS

C1

CAP CER 10UF 20% 16V X5R

10UFC110UF

(1206)1.8MM H MAX

+12V_BUS

+12V_BUS

C3

C3

D D

C C

B B

C2

150nF_16V

150nF_16V

150nF_16VC2150nF_16V

LF CAP CER 150NF 10% 16V X7R (0603)

LF CAP CER 150NF 10% 16V X7R (0603)

+3.3V_BUS

CAP CER 10UF 10% 6.3V X6S
(0805)1.4MM MAX THICK

C5
10uF_X6SC510uF_X6S

+3.3V_BUS

C7

C6

1uF_6.3VC71uF_6.3V

100nF_6.3VC6100nF_6.3V

Place these caps as close to the PCIE
connector as possible

C8
10nFC810nF

7

+3.3V

GPIO_4(7)

GPIO_3(7)

DNIDNI

TEST_EN_J

PETp10_GFXRp10(2)
PETn10_GFXRn10(2)

PETp11_GFXRp11(2)
PETn11_GFXRn11(2)

PETp12_GFXRp12(2)
PETn12_GFXRn12(2)

PETp13_GFXRp13(2)
PETn13_GFXRn13(2)

PETp14_GFXRp14(2)
PETn14_GFXRn14(2)

PETp15_GFXRp15(2)
PETn15_GFXRn15(2)

PETn0_GFXRn0(2)

PETp1_GFXRp1(2)
PETn1_GFXRn1(2)

PETp2_GFXRp2(2)
PETn2_GFXRn2(2)

PETp3_GFXRp3(2)
PETn3_GFXRn3(2)

PETp4_GFXRp4(2)
PETn4_GFXRn4(2)

PETp5_GFXRp5(2)
PETn5_GFXRn5(2)

PETp6_GFXRp6(2)
PETn6_GFXRn6(2)

PETp7_GFXRp7(2)
PETn7_GFXRn7(2)

PETp8_GFXRp8(2)
PETn8_GFXRn8(2)

PETp9_GFXRp9(2)
PETn9_GFXRn9(2)

+3.3V_BUS

R10RR1
0R

6

DNI , To Bypass U12

+3.3V_BUS

JTRST

PRESENCE

5

PCI-EXPRESS EDGE CONNECTOR

+12V_BUS

SMCLK
SMDAT

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11

B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82

+3.3V

+12V#B1
+12V#B2
+12V#B3
GND#B4
SMCLK
SMDAT
GND#B7
+3.3V#B8
JTAG1

3.3Vaux
WAKE#

RSVD#B12
GND#B13
PETp0
PETn0
GND#B16
PRSNT2#B17
GND#B18
PETp1
PETn1
GND#B21
GND#B22
PETp2
PETn2
GND#B25
GND#B26
PETp3
PETn3
GND#B29
RSVD#B30
PRSNT2#B31
GND#B32
PETp4
PETn4
GND#B35
GND#B36
PETp5
PETn5
GND#B39
GND#B40
PETp6
PETn6
GND#B43
GND#B44
PETp7
PETn7
GND#B47
PRSNT2#B48
GND#B49
PETp8
PETn8
GND#B52
GND#B53
PETp9
PETn9
GND#B56
GND#B57
PETp10
PETn10
GND#B60
GND#B61
PETp11
PETn11
GND#B64
GND#B65
PETp12
PETn12
GND#B68
GND#B69
PETp13
PETn13
GND#B72
GND#B73
PETp14
PETn14
GND#B76
GND#B77
PETp15
PETn15
GND#B80
PRSNT2#B81
RSVD#B82

x16 PCIe

x16 PCIe

Mechanical Key

Mechanical Key

MPCIE1

MPCIE1

PRSNT1#A1

+12V#A2
+12V#A3
GND#A4

JTAG2
JTAG3
JTAG4
JTAG5

+3.3V#A9

+3.3V#A10

PERST#

GND#A12
REFCLK+
REFCLK­GND#A15

PERp0
PERn0

GND#A18

RSVD#A19

GND#A20

PERp1

PERn1
GND#A23
GND#A24

PERp2

PERn2
GND#A27
GND#A28

PERp3

PERn3
GND#A31

RSVD#A32
RSVD#A33

GND#A34

PERp4

PERn4
GND#A37
GND#A38

PERp5

PERn5
GND#A41
GND#A42

PERp6

PERn6
GND#A45
GND#A46

PERp7

PERn7
GND#A49

RSVD#A50

GND#A51

PERp8

PERn8
GND#A54
GND#A55

PERp9

PERn9
GND#A58
GND#A59

PERp10

PERn10
GND#A62
GND#A63

PERp11

PERn11
GND#A66
GND#A67

PERp12

PERn12
GND#A70
GND#A71

PERp13

PERn13
GND#A74
GND#A75

PERp14

PERn14
GND#A78
GND#A79

PERp15

PERn15
GND#A82

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11

A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82

4

PRESENCE

+12V_BUS

JTCK
JTDI
JTDO
JTMS

PERp0
PERn0

PERp1
PERn1

PERp2
PERn2

PERp3
PERn3

PERp4
PERn4

PERp5
PERn5

PERp6
PERn6

PERp7
PERn7

PERp8
PERn8

PERp9
PERn9

PERp10
PERn10

PERp11
PERn11

PERp12
PERn12

PERp13
PERn13

PERp14
PERn14

PERp15
PERn15

+3.3V_BUS

TP1

TP1
35mil

35mil

TP2

TP2
35mil

35mil

TP5

TP5
35mil

35mil

TP3

TP3
35mil

35mil

3

No JTAG

R2 0RR2 0R

TEST_EN_J
JTRST

PCIE_REFCLKP (2)
PCIE_REFCLKN (2)PETp0_GFXRp0(2)

PERp0 (2)
PERn0 (2)

PERp1 (2)
PERn1 (2)

PERp2 (2)
PERn2 (2)

PERp3 (2)
PERn3 (2)

PERp4 (2)
PERn4 (2)

PERp5 (2)
PERn5 (2)

PERp6 (2)
PERn6 (2)

PERp7 (2)
PERn7 (2)

PERp8 (2)
PERn8 (2)

PERp9 (2)
PERn9 (2)

PERp10 (2)
PERn10 (2)

PERp11 (2)
PERn11 (2)

PERp12 (2)
PERn12 (2)

PERp13 (2)
PERn13 (2)

PERp14 (2)
PERn14 (2)

PERp15 (2)
PERn15 (2)

JTAG_TRSTB (7)

JTAG_TCK (7)

JTAG_TDI (7)
JTAG_TDO (7)
JTAG_TMS (7)

PERST#

TP4

TP4
35mil

35mil

2

JTAG_MODE

JTAG_MODE (7)

+3.3V_BUS

1
2

53

1

C4
100nF_6.3VC4100nF_6.3V

NC7SZ08P5X_NL

NC7SZ08P5X_NL

4

U11

U11

DNI

PERST#_buf (2,13)

Place R3 in U11

Table 1: Connection for JTAG

Production
(No JTAG)

Internal Use Only

TSW1, R1 & R2 are located on the bottom side of the board close to PCIE connector.

Install R1, R2 & Don't Install TSW1

Install TSW1 & Don't Install R1 & R2

TSW1 Switch #1, 2, 3, 4, 5 and 6 closed (ON)

JTAG

#8 and 7 open

TSW1 Switch #1, 2, 3, 4, 5 and 6 open

NO JTAG

#8 & 7 closed (ON)

SYMBOL LEGEND

DO NOT

DNI

INSTALL

#

ACTIVE
LOW

DIGITAL
GROUND

ANALOG

A A

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

8

7

6

5

4

3

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

121

of

121

of

121

GROUND

BUO BRING UP

ONLY

Doc No.

Doc No.

Doc No.

102-B50102-00

102-B50102-00

102-B50102-00

1

RevDate:

RevDate:

RevDate:

25

25

25

www.vinafix.vn

5

NOTE: some of the PCIE testpoints will
be available trought via on traces.

TP15TP15

TP8TP8

TP9TP9

TP16TP16

TP18TP18

TP12TP12

TP20TP20

TP21TP21

TP25TP25

TP27TP27

TP6TP6

TP13TP13

TP14TP14

TP7TP7

TP17TP17

TP10TP10

TP11TP11

TP19TP19

TP22TP22

TP23TP23

TP24TP24

TP26TP26

D D

PETp0_GFXRp0(1)
PETn0_GFXRn0(1)

PETp1_GFXRp1(1)
PETn1_GFXRn1(1)

PETp2_GFXRp2(1)
PETn2_GFXRn2(1)

PETp3_GFXRp3(1)
PETn3_GFXRn3(1)

PETp4_GFXRp4(1)
PETn4_GFXRn4(1)

PETp5_GFXRp5(1)
PETn5_GFXRn5(1)

PETp6_GFXRp6(1)
PETn6_GFXRn6(1)

PETp7_GFXRp7(1)
PETn7_GFXRn7(1)

PETp8_GFXRp8(1)

PETp9_GFXRp9(1)
PETn9_GFXRn9(1)

PETp10_GFXRp10(1)
PETn10_GFXRn10(1)

PETp11_GFXRp11(1)
PETn11_GFXRn11(1)

PETp12_GFXRp12(1)

C C

PCIE_REFCLKP(1)
PCIE_REFCLKN(1)

PETn12_GFXRn12(1)
PETp13_GFXRp13(1)

PETn13_GFXRn13(1)
PETp14_GFXRp14(1)

PETn14_GFXRn14(1)
PETp15_GFXRp15(1)

PETn15_GFXRn15(1)

+PCIE_VDDC

+1.1V +PCIE_VDDC

B B

26R_600mA

26R_600mA

A A

B21220R_2A B21220R_2A

10uF_X6S

10uF_X6S

+PCIE_VDDR+1.8V

B23

B23

C95

C95

C94

C94

1uF_6.3V

1uF_6.3V

4.7uF_6.3V

4.7uF_6.3V

C88

C88

C51

C51

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C96

C96

C97

C97

1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

5

C89

C89

C98

C98

1uF_6.3V

1uF_6.3V

C90

C90

1uF_6.3V

1uF_6.3V

C99

C99

1uF_6.3V

1uF_6.3V

C91

C91

1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

C100

C100

C92

C92

1uF_6.3V

1uF_6.3V

C101

C101

1uF_6.3V

1uF_6.3V

C93

C93

1uF_6.3V

1uF_6.3V

4

R22 1.27KR22 1.27K

R24

R24

4

3

U1A

U1A

AM48

PCIE_RX0P

AL49

PCIE_RX0N

AL51

PCIE_RX1P

AK52

PCIE_RX1N

AK48

PCIE_RX2P

AJ49

PCIE_RX2N

AJ51

PCIE_RX3P

AH52

PCIE_RX3N

AH48

PCIE_RX4P

AG49

PCIE_RX4N

AG51

PCIE_RX5P

AF52

PCIE_RX5N

AF48

PCIE_RX6P

AE49

PCIE_RX6N

AE51

PCIE_RX7P

AD52

PCIE_RX7N

AD48

PCIE_RX8P

AC49

PCIE_RX8N

AC51

PCIE_RX9P

AB52

PCIE_RX9N

AB48

PCIE_RX10P

AA49

PCIE_RX10N

AA51

PCIE_RX11P

Y52

PCIE_RX11N

Y48

PCIE_RX12P

W49

PCIE_RX12N

W51

PCIE_RX13P

V52

PCIE_RX13N

V48

PCIE_RX14P

U49

PCIE_RX14N

U51

PCIE_RX15P

T52

PCIE_RX15N

AM45

PCIE_REFCLKP

AM44

PCIE_REFCLKN

AF39

PCIE_CALRP

AF38

AF37
AA38
AA39
AB37
AB38
AB39
AD37
AD38
AD39
AE37
AE38
AE39

W38

W39

W40

W41

W42

W43

W44

W45
AM40

AJ38

AJ39
AH37
AK38
AK39

AJ37
AK37
AM37
AM38
AM39
AN37
AN38
AN39
AR39
AR40

AA40
AA43
AA47
AB50
AB40
AB43
AC53
AC47
AD50
AD40
AD43
AE53
AE40
AE43
AE47

AF50

AF40

AF43
AG53
AG47

PCIE_CALRN

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
PCIE_VDDC#13
PCIE_VDDC#14
PCIE_VDDC#15
PCIE_VDDC#16
PCIE_VDDC#17
PCIE_VDDC#18
PCIE_VDDC#19
PCIE_VDDC#20

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDR#9
PCIE_VDDR#10
PCIE_VDDR#11
PCIE_VDDR#12
PCIE_VDDR#13
PCIE_VDDR#14
PCIE_VDDR#15
PCIE_VDDR#16

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20

2.0K

2.0K

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

PERSTB

PCIE_PVDD

PCIE_VSS#21

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35
PCIE_VSS#36
PCIE_VSS#37
PCIE_VSS#38
PCIE_VSS#39
PCIE_VSS#40
PCIE_VSS#41
PCIE_VSS#42
PCIE_VSS#43
PCIE_VSS#44
PCIE_VSS#45
PCIE_VSS#46
PCIE_VSS#47
PCIE_VSS#48
PCIE_VSS#49
PCIE_VSS#50
PCIE_VSS#51
PCIE_VSS#52
PCIE_VSS#53
PCIE_VSS#54
PCIE_VSS#55
PCIE_VSS#56
PCIE_VSS#57
PCIE_VSS#58
PCIE_VSS#59
PCIE_VSS#60
PCIE_VSS#61
PCIE_VSS#62
PCIE_VSS#63
PCIE_VSS#64
PCIE_VSS#65
PCIE_VSS#66
PCIE_VSS#67
PCIE_VSS#68
PCIE_VSS#69
PCIE_VSS#70
PCIE_VSS#71
PCIE_VSS#72
PCIE_VSS#73
PCIE_VSS#74
PCIE_VSS#75
PCIE_VSS#76
PCIE_VSS#77
PCIE_VSS#78
PCIE_VSS#79
PCIE_VSS#80
PCIE_VSS#81
PCIE_VSS#82

AK45
AK44

AK42
AK41

AJ45
AJ44

AJ42
AJ41

AH45
AH44

AH42
AH41

AF45
AF44

AF42
AF41

AE45
AE44

AE42
AE41

AD45
AD44

AD42
AD41

AB45
AB44

AB42
AB41

AA45
AA44

AA42
AA41

AT39
AR37

AH50
AH40
AH43
AJ53
AJ40
AJ43
AJ47
AK50
AK40
AK43
AL53
AL47
AM50
AA53
AM43
AN53
AN40
AN43
AN47
AP50
AR53
Y50
AR43
AR47
AT50
AT40
AT43
AU53
AU40
AU43
AU47
AV50
AW53
AW40
AW43
AW47
AY50
AY40
AY43
BA53
BA47
BB50
BB43
BC53
BB42
BC47
BD50
BD44
BD45
BF53
BE47
BF50
BJ53
BL45
BN46
W47
BN49
T50
U53
U47
V50
W53

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

C57

C57

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C58

C58

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

PERST#_buf (1,13)

C85

C85

C84

C84

100nF_6.3V

100nF_6.3V

10nF

10nF

3

C52

C52

C59

C59
100nF_6.3V

100nF_6.3V

C60

C60

C61

C61
100nF_6.3V

100nF_6.3V

C62

C62

C53

C53
100nF_6.3V

100nF_6.3V

C54

C54

C63

C63
100nF_6.3V

100nF_6.3V

C64

C64

C65

C65
100nF_6.3V

100nF_6.3V

C55

C55

C66

C66
100nF_6.3V

100nF_6.3V

C67

C67

C68

C68
100nF_6.3V

100nF_6.3V

C69

C69

C70

C70
100nF_6.3V

100nF_6.3V

C71

C71

C56

C56
100nF_6.3V

100nF_6.3V

C72

C72

C73

C73
100nF_6.3V

100nF_6.3V

C74

C74

C75

C75
100nF_6.3V

100nF_6.3V

C76

C76

C77

C77
100nF_6.3V

100nF_6.3V

C78

C78

C79

C79
100nF_6.3V

100nF_6.3V

C80

C80

C81

C81
100nF_6.3V

100nF_6.3V

C82

C82

C83

C83
100nF_6.3V

100nF_6.3V

+PCIE_PVDD +1.8V

C86

C86
10uF_X6S

10uF_X6S

C87

C87
1uF_6.3V

1uF_6.3V

PERp0 (1)
PERn0 (1)

PERp1 (1)
PERn1 (1)

PERp2 (1)
PERn2 (1)

PERp3 (1)
PERn3 (1)

PERp4 (1)
PERn4 (1)

PERp5 (1)
PERn5 (1)

PERp6 (1)
PERn6 (1)

PERp7 (1)
PERn7 (1)

PERp8 (1)
PERn8 (1)PETn8_GFXRn8(1)

PERp9 (1)
PERn9 (1)

PERp10 (1)
PERn10 (1)

PERp11 (1)
PERn11 (1)

PERp12 (1)
PERn12 (1)

PERp13 (1)
PERn13 (1)

PERp14 (1)
PERn14 (1)

PERp15 (1)
PERn15 (1)

BLM15BD121SN1

BLM15BD121SN1

B22

B22

2

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

2

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Sheet

Sheet

Sheet

1

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

of

221

of

221

of

221

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

4

Recommended caps:
(see BOM for qualified values/vendors)
10uF , X6S, 0805, 6.3V, 1.4MM MAX THICK

4.7uF , X6S/X5R, 0603, 6.3V/4V
1uF, X6S, 0402, 6.3V
100nF, X7R, 0402
10nF , X7R, 0402

3

2

32

Q102

Q102

SI2304DS

SI2304DS

LVT_EN(13)

1

R183499RR183499R

R184499RR184499R

R185499RR185499R

R186499RR186499R

R187499RR187499R

R188499RR188499R

R189499RR189499R

R190499RR190499R

R191499RR191499R

R192499RR192499R

R193499RR193499R

R194499RR194499R

R195499RR195499R

1

R196499RR196499R

D D

Q101

Q101

+1.8V

SI2304DS

SI2304DS

+DPA_PVDD

MC3

MC3

+T2PVDD

BLM15BD121SN1

BLM15BD121SN1

B123

B123

NS5NS_VIA NS5NS_VIA

10uF_X6S

10uF_X6S

C143

C143

1uF_6.3V

1uF_6.3V

C147

C147

1

OSC_EN(14)

LVT_EN(13)

C C

+1.8V

BLM15BD121SN1

BLM15BD121SN1

B103

B103

NS1

NS1

NS_VIA

NS_VIA

4.7uF_6.3V

4.7uF_6.3V

1 2

BLM15BD121SN1

BLM15BD121SN1

+1.8V

B105

B105

NS3

NS3

NS_VIA

NS_VIA

1 2

GND_T2PVSS

+1.8V

B B

BLM15BD121SN1

BLM15BD121SN1

+1.8V

B108

B108

BLM15BD121SN1

BLM15BD121SN1

+1.1V

B109

B109

BLM15BD121SN1

BLM15BD121SN1

+1.8V

B110

B110

1 2

A A

BLM15BD121SN1

BLM15BD121SN1

+1.8V

+3.3V_BUS

Install B118 & DNI
B111 for 1.8V
Oscillators

B118

B118

1 2

GND_A2VSSQ

+DPLL_PVDD

NS6NS_VIA NS6NS_VIA

GND_DPLL_PVDD

C150

C150
1uF_6.3V

1uF_6.3V

+A2VDDQ

C151

C151
100nF_6.3V

100nF_6.3V

+1.1V

32

10R_1A_0402

10R_1A_0402

Overlap footprints

1uF_6.3V

1uF_6.3V

C132

C132

10uF_X6S

10uF_X6S

+VDD1DI

1 2

+3.3V

100nF_6.3V

100nF_6.3V

C145

C145

1uF_6.3V

1uF_6.3V

C148

C148

1uF_6.3V

1uF_6.3V

OSC_EN

10R_1A_0402

10R_1A_0402

B102

B102

Use 0R

C126

C126

C133

C133
1uF_6.3V

1uF_6.3V

+1.8V

BLM15BD121SN1

BLM15BD121SN1

C144

C144

4
1

B100

B100

Overlap footprints

MC122

MC122

4.7uF_6.3V

4.7uF_6.3V

C127

C127

100nF

100nF

BLM15BD121SN1

BLM15BD121SN1

B115

B115

NS10NS_VIA NS10NS_VIA

1uF_6.3V

1uF_6.3V

GND_VSS1DI

B106

B106

4.7uF_6.3V

4.7uF_6.3V

+1.8V

C146

C146

100nF_6.3V

100nF_6.3V

C149

C149

100nF_6.3V

100nF_6.3V

Y1

Y1

VCC
TRISTATE

100MHZ_1.8V

100MHZ_1.8V

+DPA_VDDR

GND_DPAVSS

C134

C134

100nF_6.3V

100nF_6.3V

+AVDD

NS9NS_VIA NS9NS_VIA

1 2

C371

C371

100nF_6.3V

100nF_6.3V

+A2VDD

C136

C136

BLM15BD121SN1

BLM15BD121SN1

B107

B107

3

OUT

2

GND

Overlap footprints

MC50

MC50

4.7uF_6.3V

4.7uF_6.3V

C111

C111

1uF_6.3V

1uF_6.3V

C369

C369

C368

C368

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

GND_AVSSQ

C372

C372

C373

C373

10nF

10nF

C137

C137

1uF_6.3V

1uF_6.3V

+VDD2DI

100nF_6.3V

100nF_6.3V

1 2

GND_A2VSSQ

C138

C138

NS4NS_VIA NS4NS_VIA

Crystal Option

Place holder only

Install 0R for 1.8V Osillators

R112 0RR112 0R

DNI for

1.8V
Osillators

+T2XVDDC

C140

C140

1uF_6.3V

1uF_6.3V

GND_VSS2DI

1uF_6.3V

1uF_6.3V

C370

C370

10nF

10nF

C139

C139

10nF

10nF

C104

C104

GND_AVSSQ

100nF_6.3V

100nF_6.3V

XTAL1XTAL2

C141

C141

C117

C117

100nF

100nF

R109150R R109150R

R110 499RR110 499R

GND_A2VSSQ

R111715R R111715R

XTALIN

DP_CALR

C142

C142

10nF

10nF

R2SETGND_A2VSSQ

XTALOUT

TP28TP28

Oscillator Option

5

4

U1B

U1B

BD29

DPAVDDR#1

BE29

DPAVDDR#2

BG25

DPAVSSR#1

BN27

DPAVSSR#2

BN25

DPAVSSR#3

BG27

DPAVSSR#4

BK26

DPAVSSR#5

BK28

DPAVSSR#6

BM24

DPAVSSR#7

BD30

DPBVDDR#1

BE30

DPBVDDR#2

BK32

DPBVSSR#1

BG31

DPBVSSR#2

BN29

DPBVSSR#3

BN31

DPBVSSR#4

BH32

DPBVSSR#5

BK30

DPBVSSR#6

BG29

DPBVSSR#7

BG37

T2XVDDC#1

BK38

T2XVDDC#2

BK44

T2VXDDC#3

BM44

T2XVDDC#4

BG35

T2XVSSR#1

BN41

T2XVSSR#2

BM34

T2XVSSR#3

BG39

T2XVSSR#4

BK36

T2XVSSR#5

BJ43

T2XVSSR#6

BN43

T2XVSSR#7

BK40

T2XVSSR#8

BN35

T2XVSSR#9

BN37

T2XVSSR#10

BN39

T2XVSSR#11

BG41

T2XVSSR#12

BH42

T2XVSSR#13

BE26

DPA_PVDD

BD26

DPA_PVSS

BE28

DPB_PVDD

BD28

DPB_PVSS

BC29

DP_CALR

BN33

T2PVDD

BL33

T2PVSS

BC40

AVDD

RV770 PRO A12 HF MVE SLT BIN1

BB40

BG45

BE44

BA40

BD39
BC39

BD43

BE43

BB39
BE39

BD33
BG33

BE33
AV37
BH44

BJ45

RV770 PRO A12 HF MVE SLT BIN1

AVSSQ

VDD1DI

VSS1DI

RSET

A2VDD
A2VSSQ

VDD2DI

VSS2DI

R2SET
A2VDDQ

DPLL_VDDC
DPLL_PVDD

DPLL_PVSS
PLLTEST
XTALIN

XTALOUT

Multi footprint with MY1

TX0P_DPA2P
TX0M_DPA2N

TX1P_DPA1P

TX1M_DPA1N
TX2P_DPA0P

TX2M_DPA0N

TXCAP_DPA3P
TXCAM_DPA3N

TX3P_DPB2P
TX3M_DPB2N

TX4P_DPB1P
TX4M_DPB1N

TX5P_DPB0P
TX5M_DPB0N

TXCBP_DPB3P
TXCBM_DPB3N

DDC3DATA_DP3_AUXN

DDC3CLK_DP3_AUXP
DDC4CLK_DP4_AUXP

DDC4DATA_DP4_AUXN

3

T2X0P
T2X0M

T2X1P
T2X1M

T2X2P
T2X2M

T2X3P
T2X3M

T2XCLKP
T2XCLKM

T2X4P
T2X4M

T2X5P
T2X5M

NC#1
NC#2

NC#3
NC#4

NC#5
NC#6

HPD1

HSYNC
VSYNC

H2SYNC
V2SYNC

COMP

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

TX0P

BM26

TX0M

BL25

TX1P

BJ27

TX1M

BH26

TX2P

BM28

TX2M

BL27

TXCAP

BJ25

TXCAM

BK24

TX3P

BM30

TX3M

BL29

TX4P

BJ31

TX4M

BH30

TX5P

BM32

TX5M

BL31
BJ29

BH28

BJ35
BH34

BM36
BL35

BJ37
BH36

BM38
BL37

BK34
BJ33

BM40
BL39

BJ41
BH40

BM42
BL41

BL43
BK42

BJ39
BH38

AW39
BC42

R

BC43

Rb

BD42

G

BE42

Gb

BE40

B

BD40

Bb

AY39
BA39

BC37

R2

BC36

R2b

BD37

G2

BE37

G2b

BE36

B2

BD36

B2b

AY37
AW37

BB36
BA37

Y

BB37

C

BC32

SCL

BB32

SDA

AU37
AU38

AY36
BA36

BB28
BC28

BB26
BC26

XTAL1XTAL2

T2X0P
T2X0M

T2X1P
T2X1M

T2X2P
T2X2M

T2X3P

T2X3M

T2XCP
T2XCM

T2X4P

T2X4M

T2X5P

T2X5M

HPD1 (16)

Place close to Connector

C115 100nF_6.3VC115 100nF_6.3V

C116 100nF_6.3VC116 100nF_6.3V

C105 100nF_6.3VC105 100nF_6.3V

C121 100nF_6.3VC121 100nF_6.3V

C107 100nF_6.3VC107 100nF_6.3V

C119 100nF_6.3VC119 100nF_6.3V

C109 100nF_6.3VC109 100nF_6.3V

Place close to ASIC (DNI)

SCL (7)
SDA (7)

DDC3DATA (16)
DDC3CLK (16)

DDC4CLK (15)
DDC4DATA (15)

C102 100nF_6.3VC102 100nF_6.3V

C103 100nF_6.3VC103 100nF_6.3V

C106 100nF_6.3VC106 100nF_6.3V

C110 100nF_6.3VC110 100nF_6.3V

C118 100nF_6.3VC118 100nF_6.3V

C108 100nF_6.3VC108 100nF_6.3V

C120 100nF_6.3VC120 100nF_6.3V

A_DAC1_R (15)
A_DAC1_RB (15)

A_DAC1_G (15)
A_DAC1_GB (15)

A_DAC1_B (15)
A_DAC1_BB (15)

HSYNC1 (7,15)
VSYNC1 (7,15)

A_DAC2_R (16)
A_DAC2_RB (16)

A_DAC2_G (16)
A_DAC2_GB (16)

A_DAC2_B (16)
A_DAC2_BB (16)

HSYNC2 (7,16)
VSYNC2 (7,16)

A_DAC2_COMP (17)
A_DAC2_Y (17)
A_DAC2_C (17)

2

T2X0P (15)
T2X0M (15)

T2X1P (15)
T2X1M (15)

T2X2P (15)
T2X2M (15)

T2X3P (15)
T2X3M (15)

T2XCP (15)
T2XCM (15)

T2X4P (15)
T2X4M (15)

T2X5P (15)
T2X5M (15)

+3.3V

R115

R115

R114

R114

4.7K

4.7K

4.7K

4.7K

DDC2CLK (13,18)
DDC2DATA (13,18)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Sheet

Sheet

Sheet

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

of

321

of

321

of

321

1

Doc No.

Doc No.

Doc No.

T1X0P (16)
T1X0M (16)

T1X1P (16)
T1X1M (16)

T1X2P (16)
T1X2M (16)

T1XCP (16)
T1XCM (16)

T1X3P (16)
T1X3M (16)

T1X4P (16)
T1X4M (16)

T1X5P (16)
T1X5M (16)

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8

VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15
VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22
VDDCI#23
VDDCI#24
VDDCI#25
VDDCI#26
VDDCI#27
VDDCI#28
VDDCI#29
VDDCI#30

VDDCT#1
VDDCT#2
VDDCT#3
VDDCT#4

C251

C251
1uF_6.3V

1uF_6.3V

SPVDD
SPVSS

C221

C221
1uF_6.3V

1uF_6.3V

C241

C241
1uF_6.3V

1uF_6.3V

C231

C231
1uF_6.3V

1uF_6.3V

C252

C252
1uF_6.3V

1uF_6.3V

5

AA17
AB17
AD17
AE17
AF17
AH17
AJ17
AK17
AR17
AT17
AU17
AU18
AU19
U17
U19
U21
U22
U24
U25
U26
U28
U29
U30
U35
U36
U37
V37
W37
W17
AA37

AV22
AU21
AV21
AV19

AT37
AT38

C222

C222
1uF_6.3V

1uF_6.3V

C242

C242
1uF_6.3V

1uF_6.3V

C232

C232
1uF_6.3V

1uF_6.3V

C253

C253
1uF_6.3V

1uF_6.3V

C186

C186
100nF_6.3V

100nF_6.3V

GND_SPVDD

C223

C223
1uF_6.3V

1uF_6.3V

C243

C243
1uF_6.3V

1uF_6.3V

C254

C254
1uF_6.3V

1uF_6.3V

C233

C233
1uF_6.3V

1uF_6.3V

C343

C343
1uF_6.3V

1uF_6.3V

C353

C353
1uF_6.3V

1uF_6.3V

C354

C354
1uF_6.3V

1uF_6.3V

C349

C349
1uF_6.3V

1uF_6.3V

C361

C361
1uF_6.3V

1uF_6.3V

C244

C244
1uF_6.3V

1uF_6.3V

C187

C187
100nF_6.3V

100nF_6.3V

C224

C224
1uF_6.3V

1uF_6.3V

C234

C234
1uF_6.3V

1uF_6.3V

C255

C255
1uF_6.3V

1uF_6.3V

C344

C344
1uF_6.3V

1uF_6.3V

C352

C352
1uF_6.3V

1uF_6.3V

C355

C355
1uF_6.3V

1uF_6.3V

C357

C357
1uF_6.3V

1uF_6.3V

C350

C350
1uF_6.3V

1uF_6.3V

C245

C245
1uF_6.3V

1uF_6.3V

C188

C188
1uF_6.3V

1uF_6.3V

C363

C363
1uF_6.3V

1uF_6.3V

C225

C225
1uF_6.3V

1uF_6.3V

C256

C256
1uF_6.3V

1uF_6.3V

C235

C235
1uF_6.3V

1uF_6.3V

C246

C246
1uF_6.3V

1uF_6.3V

C345

C345
1uF_6.3V

1uF_6.3V

C347

C347
1uF_6.3V

1uF_6.3V

C346

C346
1uF_6.3V

1uF_6.3V

C359

C359
1uF_6.3V

1uF_6.3V

C362

C362
1uF_6.3V

1uF_6.3V

C189

C189
1uF_6.3V

1uF_6.3V

C226

C226
1uF_6.3V

1uF_6.3V

C257

C257
1uF_6.3V

1uF_6.3V

C236

C236
1uF_6.3V

1uF_6.3V

C247

C247
1uF_6.3V

1uF_6.3V

B112

B112

BLM15BD121SN1

BLM15BD121SN1

+SPVDD +VDDC

C364

C364
100nF_6.3V

100nF_6.3V

NS_VIA

NS_VIA
NS701

NS701

C227

C227
1uF_6.3V

1uF_6.3V

C237

C237
1uF_6.3V

1uF_6.3V

C248

C248
1uF_6.3V

1uF_6.3V

C258

C258
1uF_6.3V

1uF_6.3V

U1G

U1G

AA12

VDDR1#1

AB9

VDDR1#2

AD12

VDDR1#3

AE9

VDDR1#4

AE15

VDDR1#5

AB15

VDDR1#6

AH9

VDDR1#7

AH15

VDDR1#8

AJ12

VDDR1#9

AK15

VDDR1#10

AK9

VDDR1#11

AM12

VDDR1#12

AN15

VDDR1#13

AN9

VDDR1#14

AR12

VDDR1#15

AT15

D D

C C

B B

AU12

AW9
AW14
BB14
BE18
BC10
AW18
BE11
BE15
BB17

W15

AT9

K11
J14
J17
J30
J33
J36
J19
J22
J25
J28
J39
K43
L45
L10
L15
M18
M21
M24
R22
M29
M32
M35
M37
P14
P17
R19
R25
R28
R30
R33
R36
P39
P42

P9
R11
R45
U14
U42

U9
V12
V39
V45

W9

VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34
VDDR1#35
VDDR1#36
VDDR1#37
VDDR1#38
VDDR1#39
VDDR1#40
VDDR1#41
VDDR1#42
VDDR1#43
VDDR1#44
VDDR1#45
VDDR1#46
VDDR1#47
VDDR1#48
VDDR1#49
VDDR1#50
VDDR1#51
VDDR1#52
VDDR1#53
VDDR1#54
VDDR1#55
VDDR1#56
VDDR1#57
VDDR1#58
VDDR1#59
VDDR1#60
VDDR1#61
VDDR1#62
VDDR1#63
VDDR1#64
VDDR1#65
VDDR1#66
VDDR1#67
VDDR1#68
VDDR1#69
VDDR1#70
VDDR1#71

C219

C219
1uF_6.3V

1uF_6.3V

C229

C229
1uF_6.3V

1uF_6.3V

C239

C239
1uF_6.3V

1uF_6.3V

C250

C250
1uF_6.3V

1uF_6.3V

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

C220

C220
1uF_6.3V

1uF_6.3V

C230

C230
1uF_6.3V

1uF_6.3V

C240

C240
1uF_6.3V

1uF_6.3V

C348

C348
10uF_6.3V

10uF_6.3V

C360

C360
10uF_6.3V

10uF_6.3V

C356

C356
10uF_6.3V

10uF_6.3V

C358

C358
10uF_6.3V

10uF_6.3V

C351

C351
10uF_6.3V

10uF_6.3V

+1.8V+VDD_CT

B122

B122

BLM15BD121SN1

BLM15BD121SN1

12

+MVDD

C228

C228
1uF_6.3V

1uF_6.3V

C238

C238
1uF_6.3V

1uF_6.3V

C259

C259
1uF_6.3V

1uF_6.3V

C249

C249
1uF_6.3V

1uF_6.3V

4

C374

C374
10uF_6.3V

10uF_6.3V

C375

C375
10uF_6.3V

10uF_6.3V

C376

C376
10uF_6.3V

10uF_6.3V

+VDDC

3

U1I

U1I

G39

VSSM#101

G41

VSSM#102

G43

VSSM#103

G45

VSSM#104

G9

VSSM#105

H1

VSSM#106

J47

VSSM#107

H53

VSSM#108

J7

VSSM#109

J11

VSSM#110

K2

VSSM#111

L40

VSSM#112

K14

VSSM#113

K17

VSSM#114

K19

VSSM#115

K22

VSSM#116

K25

VSSM#117

K28

VSSM#118

K30

VSSM#119

K33

VSSM#120

K36

VSSM#121

K39

VSSM#122

L47

VSSM#123

K52

VSSM#124

L7

VSSM#125

P2

VSSM#126

M2

VSSM#127

M43

VSSM#128

M52

VSSM#129

L9

VSSM#130

R15

VSSM#131

N18

VSSM#132

N21

VSSM#133

N24

VSSM#134

N26

VSSM#135

N29

VSSM#136

N32

VSSM#137

N35

VSSM#138

N37

VSSM#139

N40

VSSM#140

N47

VSSM#141

N7

VSSM#142

P10

VSSM#143

P41

VSSM#144

R53

VSSM#145

R12

VSSM#146

M15

VSSM#147

R17

VSSM#148

T19

VSSM#149

T22

VSSM#150

T25

VSSM#151

T28

VSSM#152

T30

VSSM#153

T33

VSSM#154

T36

VSSM#155

R44

VSSM#156

R47

VSSM#157

R7

VSSM#158

T2

VSSM#159

T48

VSSM#160

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

U10

VSSM#161

U15

VSSM#162

U41

VSSM#163

U7

VSSM#164

V13

VSSM#165

V38

VSSM#166

V44

VSSM#167

V2

VSSM#168

W10

VSSM#169

W16

VSSM#170

W7

VSSM#171

Y2

VSSM#172

VSSM#1
VSSM#2
VSSM#3
VSSM#4
VSSM#5
VSSM#6
VSSM#7
VSSM#8

VSSM#9
VSSM#10
VSSM#11
VSSM#12
VSSM#13
VSSM#14
VSSM#15
VSSM#16
VSSM#17
VSSM#18
VSSM#19
VSSM#20
VSSM#21
VSSM#22
VSSM#23
VSSM#24
VSSM#25
VSSM#26
VSSM#27
VSSM#28
VSSM#29
VSSM#30
VSSM#31
VSSM#32
VSSM#33
VSSM#34
VSSM#35
VSSM#36
VSSM#37
VSSM#38
VSSM#39
VSSM#40
VSSM#41
VSSM#42
VSSM#43
VSSM#44
VSSM#45
VSSM#46
VSSM#47
VSSM#48
VSSM#49
VSSM#50
VSSM#51
VSSM#52
VSSM#53
VSSM#54
VSSM#55
VSSM#56
VSSM#57
VSSM#58
VSSM#59
VSSM#60
VSSM#61
VSSM#62
VSSM#63
VSSM#64
VSSM#65
VSSM#66
VSSM#67
VSSM#68
VSSM#69
VSSM#70
VSSM#71
VSSM#72
VSSM#73
VSSM#74
VSSM#75
VSSM#76
VSSM#77
VSSM#78
VSSM#79
VSSM#80
VSSM#81
VSSM#82
VSSM#83
VSSM#84
VSSM#85
VSSM#86
VSSM#87
VSSM#88
VSSM#89
VSSM#90
VSSM#91
VSSM#92
VSSM#93
VSSM#94
VSSM#95
VSSM#96
VSSM#97
VSSM#98
VSSM#99

VSSM#100

B14
B18
B22
A39
A49
A5
AA13
AA7
AB10
AB16
AB2
AC7
AD13
AD2
AE10
AE16
AE7
AF13
AF2
AG7
AH10
AH16
AH2
AJ13
AJ7
AK10
AK16
AK2
AL7
AM13
AM2
AN1
AN10
AN16
AN7
AR13
AR7
AT10
AT16
AT2
AU13
AU7
AW1
AW10
AW7
AY13
AY2
B10
B16
B26
B30
A33
B42
BA14
BA17
BA7
AY11
AV18
BB2
BD15
BD18
BC7
BC12
BD2
BE7
BG11
BG13
BG15
BG9
BJ1
BM12
BN8
BN15
BM10
BN5
B12
B20
B24
B28
B32
B36
B40
B44
A8
E1
E53
G11
G13
G15
G17
G19
G21
G23
G25
G27
G29
G31
G33
G35
G37

AA20
AA23
AA25
AA28
AA30
AA33
AA35
AC19
AC21
AC24
AC26
AC29
AC31
AC34
AD20
AD23
AD25
AD28
AD30
AD33
AD35
AE19
AE21
AE24
AE26
AE29
AE31
AE34
AF20
AF23
AF25
AF28
AF30
AF33
AF35
AH19
AH21
AH24
AH26
AH29
AH31
AH34

AK19
AK21
AK24
AK26
AK29
AK31
AK34

AN19
AN21
AN24
AN26
AN29
AN31
AN34
AP20
AP23
AP25
AP28
AP30
AP33
AR21
AR24
AR26
AR29
AR31
AR34

AP35

AJ20
AJ23
AJ25
AJ28
AJ30
AJ33
AJ35

AL20
AL23
AL25
AL28
AL30
AL33
AL35

VSSC#1
VSSC#2
VSSC#3
VSSC#4
VSSC#5
VSSC#6
VSSC#7
VSSC#8
VSSC#9
VSSC#10
VSSC#11
VSSC#12
VSSC#13
VSSC#14
VSSC#15
VSSC#16
VSSC#17
VSSC#18
VSSC#19
VSSC#20
VSSC#21
VSSC#22
VSSC#23
VSSC#24
VSSC#25
VSSC#26
VSSC#27
VSSC#28
VSSC#29
VSSC#30
VSSC#31
VSSC#32
VSSC#33
VSSC#34
VSSC#35
VSSC#36
VSSC#37
VSSC#38
VSSC#39
VSSC#40
VSSC#41
VSSC#42
VSSC#43
VSSC#44
VSSC#45
VSSC#46
VSSC#47
VSSC#48
VSSC#49
VSSC#50
VSSC#51
VSSC#52
VSSC#53
VSSC#54
VSSC#55
VSSC#56
VSSC#57
VSSC#58
VSSC#59
VSSC#60
VSSC#61
VSSC#62
VSSC#63
VSSC#64
VSSC#65
VSSC#66
VSSC#67
VSSC#68
VSSC#69
VSSC#70
VSSC#71
VSSC#72
VSSC#73
VSSC#74
VSSC#75
VSSC#76
VSSC#77
VSSC#78
VSSC#79
VSSC#80
VSSC#81
VSSC#82

W20

VSSC#83

W23

VSSC#84

W25

VSSC#85

W28

VSSC#86

W30

VSSC#87

W33

VSSC#88

W35

VSSC#89

Y19

VSSC#90

Y21

VSSC#91

Y24

VSSC#92

Y26

VSSC#93

Y29

VSSC#94

Y31

VSSC#95

Y34

VSSC#96
VSSC#97

U1H

U1H

AA19

VDDC#1

AA21

VDDC#2

AA24

VDDC#3

AA26

VDDC#4

AA29

VDDC#5

AA31

VDDC#6

AA34

VDDC#7

AC20

VDDC#8

AC23

VDDC#9

AC25

VDDC#10

AC28

VDDC#11

AC30

VDDC#12

AC33

VDDC#13

AC35

VDDC#14

AD19

VDDC#15

AD21

VDDC#16

AD24

VDDC#17

AD26

VDDC#18

AD29

VDDC#19

AD31

VDDC#20

AD34

VDDC#21

AE20

VDDC#22

AE23

VDDC#23

AE25

VDDC#24

AE28

VDDC#25

AE30

VDDC#26

AE33

VDDC#27

AE35

VDDC#28

AF19

VDDC#29

AF21

VDDC#30

AF24

VDDC#31

AF26

VDDC#32

AF29

VDDC#33

AF31

VDDC#34

AF34

VDDC#35

AH20

VDDC#36

AH23

VDDC#37

AH25

VDDC#38

AH28

VDDC#39

AH30

VDDC#40

AH33

VDDC#41

AH35

VDDC#42

AJ19

VDDC#43

AJ21

VDDC#44

AJ24

VDDC#45

AJ26

VDDC#46

AJ29

VDDC#47

AJ31

VDDC#48

AJ34

VDDC#49

AK20

VDDC#50

AK23

VDDC#51

AK25

VDDC#52

AK28

VDDC#53

AK30

VDDC#54

AK33

VDDC#55

AK35

VDDC#56

AL19

VDDC#57

AL21

VDDC#58

AL24

VDDC#59

AL26

VDDC#60

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

VDDC#61
VDDC#62
VDDC#63
VDDC#64
VDDC#65
VDDC#66
VDDC#67
VDDC#68
VDDC#69
VDDC#70
VDDC#71
VDDC#72
VDDC#73
VDDC#74
VDDC#75
VDDC#76
VDDC#77
VDDC#78
VDDC#79
VDDC#80
VDDC#81
VDDC#82
VDDC#83
VDDC#84
VDDC#85
VDDC#86
VDDC#87
VDDC#88
VDDC#89
VDDC#90
VDDC#91
VDDC#92
VDDC#93
VDDC#94
VDDC#95
VDDC#96
VDDC#97

SP_PVDD

AL29
AL31
AL34
AN20
AN23
AN25
AN28
AN30
AN33
AN35
AP21
AP24
AP26
AP29
AP31
AP34
AR20
AR23
AR25
AR28
AR30
AR33
W19
W21
W24
W26
W29
W31
W34
Y20
Y23
Y25
Y28
Y30
Y33
Y35
AR35
AR38

+PCIE_PVDD

C152

C152
1uF_6.3V

1uF_6.3V

C164

C164
1uF_6.3V

1uF_6.3V

C174

C174
1uF_6.3V

1uF_6.3V

C179

C179
10uF_X6S

10uF_X6S

C377

C377
1uF_6.3V

1uF_6.3V

C190

C190
1uF_6.3V

1uF_6.3V

C200

C200
1uF_6.3V

1uF_6.3V

C153

C153
1uF_6.3V

1uF_6.3V

C165

C165
1uF_6.3V

1uF_6.3V

C180

C180
10uF_X6S

10uF_X6S

C378

C378
1uF_6.3V

1uF_6.3V

C191

C191
1uF_6.3V

1uF_6.3V

C201

C201
1uF_6.3V

1uF_6.3V

C175

C175
1uF_6.3V

1uF_6.3V

2

C154

C154
1uF_6.3V

1uF_6.3V

C166

C166
1uF_6.3V

1uF_6.3V

C379

C379
1uF_6.3V

1uF_6.3V

C192

C192
1uF_6.3V

1uF_6.3V

C202

C202
1uF_6.3V

1uF_6.3V

C155

C155
1uF_6.3V

1uF_6.3V

C167

C167
1uF_6.3V

1uF_6.3V

C176

C176
1uF_6.3V

1uF_6.3V

C182

C182
10uF_X6S

10uF_X6S

Overlapped Footprints

C380

C380
1uF_6.3V

1uF_6.3V

C193

C193
1uF_6.3V

1uF_6.3V

C203

C203
1uF_6.3V

1uF_6.3V

C156

C156
1uF_6.3V

1uF_6.3V

C168

C168
1uF_6.3V

1uF_6.3V

C177

C177
1uF_6.3V

1uF_6.3V

C204

C204
1uF_6.3V

1uF_6.3V

C381

C381
1uF_6.3V

1uF_6.3V

C194

C194
1uF_6.3V

1uF_6.3V

C157

C157
1uF_6.3V

1uF_6.3V

C169

C169
1uF_6.3V

1uF_6.3V

C205

C205
1uF_6.3V

1uF_6.3V

C178

C178
1uF_6.3V

1uF_6.3V

C382

C382
1uF_6.3V

1uF_6.3V

C195

C195
1uF_6.3V

1uF_6.3V

C158

C158
1uF_6.3V

1uF_6.3V

C170

C170
1uF_6.3V

1uF_6.3V

C383

C383
1uF_6.3V

1uF_6.3V

C209

C209
1uF_6.3V

1uF_6.3V

C159

C159
1uF_6.3V

1uF_6.3V

C171

C171
1uF_6.3V

1uF_6.3V

C196

C196
1uF_6.3V

1uF_6.3V

C185

C185
10uF_X6S

10uF_X6S

C160

C160
1uF_6.3V

1uF_6.3V

C384

C384
1uF_6.3V

1uF_6.3V

C206

C206
1uF_6.3V

1uF_6.3V

C172

C172
1uF_6.3V

1uF_6.3V

C197

C197
1uF_6.3V

1uF_6.3V

C161

C161
1uF_6.3V

1uF_6.3V

C385

C385
1uF_6.3V

1uF_6.3V

C207

C207
1uF_6.3V

1uF_6.3V

C173

C173
1uF_6.3V

1uF_6.3V

1

C198

C198
1uF_6.3V

1uF_6.3V

C162

C162
1uF_6.3V

1uF_6.3V

C386

C386
1uF_6.3V

1uF_6.3V

C208

C208
1uF_6.3V

1uF_6.3V

C387

C387
1uF_6.3V

1uF_6.3V

+VDDC

C199

C199
1uF_6.3V

1uF_6.3V

C210

C210
1uF_6.3V

1uF_6.3V

C163

C163
1uF_6.3V

1uF_6.3V

+VDDC

+VDDC

C388

C388
1uF_6.3V

1uF_6.3V

C262

C262

C261

C261

C260

C260

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C271

C271
100nF_6.3V

100nF_6.3V

A A

C286

C286

C285

C285

10uF_X6S

10uF_X6S

10uF_X6S

10uF_X6S

1uF_6.3V

1uF_6.3V

C272

C272
100nF_6.3V

100nF_6.3V

C287

C287
10uF_X6S

10uF_X6S

C263

C263
1uF_6.3V

1uF_6.3V

C273

C273
100nF_6.3V

100nF_6.3V

5

C288

C288
10uF_X6S

10uF_X6S

C264

C264
1uF_6.3V

1uF_6.3V

C274

C274
100nF_6.3V

100nF_6.3V

C289

C289
10uF_X6S

10uF_X6S

C265

C265
1uF_6.3V

1uF_6.3V

C275

C275
100nF_6.3V

100nF_6.3V

C266

C266
1uF_6.3V

1uF_6.3V

C290

C290
10uF_X6S

10uF_X6S

C276

C276
100nF_6.3V

100nF_6.3V

C291

C291
10uF_X6S

10uF_X6S

C267

C267
1uF_6.3V

1uF_6.3V

C277

C277
100nF_6.3V

100nF_6.3V

C269

C269

C268

C268

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

C278

C278
100nF_6.3V

100nF_6.3V

Overlapped Footprints

C292

C292
10uF_X6S

10uF_X6S

C270

C270
1uF_6.3V

1uF_6.3V

C217

C215

C215

C214

C212

C212

C211

C211

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C390

C390

C389

C389

1uF_6.3V

1uF_6.3V

1uF_6.3V

1uF_6.3V

4

3

C391

C391
1uF_6.3V

1uF_6.3V

C392

C392
1uF_6.3V

1uF_6.3V

2

C214

C213

C213
100nF_6.3V

100nF_6.3V

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

100nF_6.3V

100nF_6.3V

100nF_6.3V

100nF_6.3V

C216

C216
100nF_6.3V

100nF_6.3V

C217
100nF_6.3V

100nF_6.3V

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

421

of

421

of

421

1

C218

C218
100nF_6.3V

100nF_6.3V

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

U1C

R102

R102
1uF_6.3V

1uF_6.3V

AW19

V40
R42
V41
R41
V42
V43
U45
P44
M48
M50

L53

L51
P48
P50
P52
N53

L49

J51
K50
K48
G52
H48
F48
C51
C43
F44
E43
D44
A46
D46
F46
B47

L44
M45
P40
M44
R43
P43

J43
K44
M42

K45
R51

R49
E50
D49

U44
N49

J49
C45

U43
N51
H50
E45

U38
R39
R40

J44
P45

L43
U40
U39

U33
U32

T32
P36

U1C

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31

MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA0_8

ADBIA0
WCKA0_0

WCKA0B_0
WCKA0_1
WCKA0B_1

EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3

DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3

WEA0B
CSA0B_0
CSA0B_1
CASA0B
RASA0B

CKEA0
CLKA0
CLKA0B

MVREFAS
MVREFAD

MEM_CALRPA
MEM_CALRNA

DRAM_RST

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

+MVDD

R122

R122

40.2R

40.2R

1%

R125

R125
100R

100R

1%

+MVDD

R126

R126

40.2R

40.2R

1%

R128

R128
100R

100R

1%

DQA_[31..0](8)

D D

MAA_[8..0](8)

DQMAb_0(8)
DQMAb_1(8)
DQMAb_2(8)

C C

B B

A A

DQMAb_3(8)

QSA_0(8)
QSA_1(8)
QSA_2(8)
QSA_3(8)

QSAb_0(8)
QSAb_1(8)
QSAb_2(8)
QSAb_3(8)

WEA0b(8)
CSA0b_0(8)

CASA0b(8)
RASA0b(8)

CKEA0(8)
CLKA0(8)
CLKA0b(8)

DRAM_RST(8,9)

+MVDD

C396

C396
1uF_6.3V

1uF_6.3V

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7

MVREFS_A
MVREFD_A

R120 243RR120 243R
R121 243RR121 243R

DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8

DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MAA1_0

MAA1_1

MAA1_2

MAA1_3

MAA1_4

MAA1_5

MAA1_6

MAA1_7

MAA1_8

ADBIA1

WCKA1_0

WCKA1B_0

WCKA1_1

WCKA1B_1

EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3

DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3

WEA1B
CSA1B_0
CSA1B_1

CASA1B
RASA1B

CKEA1
CLKA1

CLKA1B

MPVDD#0
MPVDD#1
MPVDD#2

C300

C300
1uF_6.3V

1uF_6.3V

C305

C305
1uF_6.3V

1uF_6.3V

4

D30
A31
F30
E29
D32
C33
E33
F32
J35
L32
L35
K35
M30
L33
L30
J29
F34
A35
E35
C35
E37
C37
B38
A37
F42
E41
A43
D42
D40
E39
C39
F40

J42
K40
L37
J40
J37
K37
M39
M40
K42

L42
B34

D34
D38
F38

C31
J32
D36
C41

E31
K32
F36
A41

N36
P37
R37
N39
L39

T37
M36
L36

J10
K10
K9

DNI

MVREFD_A

DNI

MVREFS_A

DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

MAA_8
MAA_9

MAA_10
MAA_11

MAA_BA2
MAA_BA0
MAA_BA1

+MPVDD

C339

C339

1uF_6.3V

1uF_6.3V

100nF_6.3V

100nF_6.3V

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

DQA_[63..32] (8)

DQMAb_4 (8)
DQMAb_5 (8)
DQMAb_6 (8)
DQMAb_7 (8)

QSA_4 (8)
QSA_5 (8)
QSA_6 (8)
QSA_7 (8)

QSAb_4 (8)
QSAb_5 (8)
QSAb_6 (8)
QSAb_7 (8)

WEA1b (8)

CSA1b_0 (8)
CASA1b (8)

RASA1b (8)

CKEA1 (8)

CLKA1 (8)

CLKA1b (8)

C338

C338

C337

C337

1uF_6.3V

1uF_6.3V

MAA_[11..8] (8)

MAA_BA[2..0] (8)

C336

C336

10uF_X6S

10uF_X6S

B114

B114

10R_1A_0402

10R_1A_0402

+1.8V

3

DQB_[63..0](8)

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30

MAB_[7..0](8)

DQMBb_0(8)
DQMBb_1(8)
DQMBb_2(8)
DQMBb_3(8)

QSB_0(8)
QSB_1(8)
QSB_2(8)
QSB_3(8)

QSBb_0(8)
QSBb_1(8)
QSBb_2(8)
QSBb_3(8)

WEB0b(8)
CSB0b_0(8)

CASB0b(8)
RASB0b(8)

CKEB0(8)
CLKB0(8)
CLKB0b(8)

+MVDD

DQB_31

MAB_0
MAB_1 MAB_9
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7

MVREFS_B
MVREFD_B

R118 243RR118 243R
R119 243RR119 243R

P35
P32
T35
P33

N30

P30
R32
R35
M25
M28
N25

T26

K26

J26
R29
N28

A29
C29

F28
D28

A27
D26

E25

F26

E21
D22
C21

A21
C23

E23

F24
D24

J24

L24

L25

P24

L28

P25
N22

P22

L22
M22

K29

L29
C25

A25
N33

L26
E27
F22

M33
M26
C27

A23
T29

P26

R26
R24

K24
T24

P29
P28

T17

U18

T21

R21

U1D

U1D

DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31

MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB0_8

ADBIB0
WCKB0_0

WCKB0B_0
WCKB0_1
WCKB0B_1

EDCB0_0
EDCB0_1
EDCB0_2
EDCB0_3

DDBIB0_0
DDBIB0_1
DDBIB0_2
DDBIB0_3

WEB0B
CSB0B_0
CSB0B_1
CASB0B
RASB0B

CKEB0
CLKB0
CLKB0B

MVREFBS
MVREFBD

MEM_CALRPB
MEM_CALRNB

2

C3

DQB1_0

D5

DQB1_1

B7

DQB1_2

D8

DQB1_3

E9

DQB1_4

F10

DQB1_5

D10

DQB1_6

A11

DQB1_7

K18

DQB1_8

L18

DQB1_9

L17

DQB1_10

M17

DQB1_11

M12

DQB1_12

L12

DQB1_13

K12

DQB1_14

J12

DQB1_15

F12

DQB1_16

D12

DQB1_17

C13

DQB1_18

A13

DQB1_19

F14

DQB1_20

C15

DQB1_21

A15

DQB1_22

E15

DQB1_23

F20

DQB1_24

C17

DQB1_25

D20

DQB1_26

C19

DQB1_27

E19

DQB1_28

D18

DQB1_29

E17

DQB1_30

A17

DQB1_31

J18

MAB1_0

M19

MAB1_1

P18

MAB1_2

T18

MAB1_3

N17

MAB1_4

R18

MAB1_5

N19

MAB1_6

P21

MAB1_7

L19

MAB1_8

J21

ADBIB1

C11

WCKB1_0

E11

WCKB1B_0

D16

WCKB1_1

F16

WCKB1B_1

F8

EDCB1_0

K15

EDCB1_1

E13

EDCB1_2

A19

EDCB1_3

C9

DDBIB1_0

J15

DDBIB1_1

D14

DDBIB1_2

F18

DDBIB1_3

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

+MVDD

+MVDD

R123

R123

40.2R

40.2R

1%

R124

R124
100R

100R

1%

R127

R127

40.2R

40.2R

1%

R129

R129
100R

100R

1%

WEB1B
CSB1B_0
CSB1B_1

CASB1B
RASB1B

CKEB1
CLKB1

CLKB1B

C298

C298
1uF_6.3V

1uF_6.3V

C307

C307
1uF_6.3V

1uF_6.3V

P15
N15
L14
K21
P19

L21
N14
M14

DNI

DNI

DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

MVREFD_B

MVREFS_B

MAB_8
MAB_10

MAB_11
MAB_BA2

MAB_BA0
MAB_BA1

DQMBb_4 (8)
DQMBb_5 (8)
DQMBb_6 (8)
DQMBb_7 (8)

QSB_4 (8)
QSB_5 (8)
QSB_6 (8)
QSB_7 (8)

QSBb_4 (8)
QSBb_5 (8)
QSBb_6 (8)
QSBb_7 (8)

WEB1b (8)

CSB1b_0 (8)
CASB1b (8)

RASB1b (8)

CKEB1 (8)

CLKB1 (8)

CLKB1b (8)

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

1

MAB_[11..8] (8)

MAB_BA[2..0] (8)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

5

4

3

2

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

521

of

521

of

521

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

U1E

AA14

AA10

AA11

AA16
AA15

V10
V11
U11
U12

M11
M10

W12

V14
V16
U13
V15

W13
W11

AA9

R10

R14
R13
P11

W14

P13
P12

U16
V17

E4
H4
G2

F6

J5

K6

K4

L1

L11

M9
M6
M4
N3
N1

P6
R3
R1
R5

Y6

W3

Y4

W5

V4
U3
U5
U1

V9

L3

L5

T4

T6
H6
N5

W1

J3
R9

P4

V6

U1E

DQC0_0
DQC0_1
DQC0_2
DQC0_3
DQC0_4
DQC0_5
DQC0_6
DQC0_7
DQC0_8
DQC0_9
DQC0_10
DQC0_11
DQC0_12
DQC0_13
DQC0_14
DQC0_15
DQC0_16
DQC0_17
DQC0_18
DQC0_19
DQC0_20
DQC0_21
DQC0_22
DQC0_23
DQC0_24
DQC0_25
DQC0_26
DQC0_27
DQC0_28
DQC0_29
DQC0_30
DQC0_31

MAC0_0
MAC0_1
MAC0_2
MAC0_3
MAC0_4
MAC0_5
MAC0_6
MAC0_7
MAC0_8

ADBIC0
WCKC0_0

WCKC0B_0
WCKC0_1
WCKC0B_1

EDCC0_0
EDCC0_1
EDCC0_2
EDCC0_3

DDBIC0_0
DDBIC0_1
DDBIC0_2
DDBIC0_3

WEC0B
CSC0B_0
CSC0B_1
CASC0B
RASC0B

CKEC0
CLKC0
CLKC0B

MVREFCS
MVREFCD

MEM_CALRPC
MEM_CALRNC

WCKC1_0

WCKC1B_0

WCKC1_1

WCKC1B_1

DDBIC1_0
DDBIC1_1
DDBIC1_2
DDBIC1_3

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

DQC_[31..0](9)

D D

MAC_[7..0](9)

DQMCb_0(9)

C C

DQMCb_1(9)
DQMCb_2(9)
DQMCb_3(9)

QSC_0(9)
QSC_1(9)
QSC_2(9)
QSC_3(9)

QSCb_0(9)
QSCb_1(9)
QSCb_2(9)
QSCb_3(9)

WEC0b(9)
CSC0b_0(9)

CASC0b(9)
RASC0b(9)

CKEC0(9)
CLKC0(9)
CLKC0b(9)

+MVDD

DQC_0
DQC_1
DQC_2
DQC_3
DQC_4
DQC_5
DQC_6
DQC_7
DQC_8
DQC_9
DQC_10
DQC_11
DQC_12
DQC_13
DQC_14
DQC_15
DQC_16
DQC_17
DQC_18
DQC_19
DQC_20
DQC_21
DQC_22
DQC_23
DQC_24
DQC_25
DQC_26
DQC_27
DQC_28
DQC_29
DQC_30
DQC_31

MAC_0
MAC_1
MAC_2
MAC_3
MAC_4
MAC_5
MAC_6
MAC_7

MVREFS_C
MVREFD_C

R135 243RR135 243R
R137 243RR137 243R

DQC1_0
DQC1_1
DQC1_2
DQC1_3
DQC1_4
DQC1_5
DQC1_6
DQC1_7
DQC1_8

DQC1_9
DQC1_10
DQC1_11
DQC1_12
DQC1_13
DQC1_14
DQC1_15
DQC1_16
DQC1_17
DQC1_18
DQC1_19
DQC1_20
DQC1_21
DQC1_22
DQC1_23
DQC1_24
DQC1_25
DQC1_26
DQC1_27
DQC1_28
DQC1_29
DQC1_30
DQC1_31

MAC1_0

MAC1_1

MAC1_2

MAC1_3

MAC1_4

MAC1_5

MAC1_6

MAC1_7

MAC1_8

ADBIC1

EDCC1_0
EDCC1_1
EDCC1_2
EDCC1_3

WEC1B
CSC1B_0
CSC1B_1

CASC1B
RASC1B

CKEC1
CLKC1

CLKC1B

AR16
AN14
AR14
AR15
AM15
AM14
AK13
AK14
AJ15
AH12
AH13
AF10
AF9
AF16
AE13
AE12
AJ3
AJ1
AH4
AH6
AG1
AF4
AE5
AF6
AA5
AB4
AA3
AA1
AC5
AD6
AD4
AC3

AD9
AD11
AE11
AD14
AH11
AE14
AB13
AB14
AB11

AB12
AJ10

AJ11
AE3
AE1

AN13
AF11
AG5
AB6

AN12
AF12
AG3
AC1

AJ16
AF14
AF15
AD15
AD10

AD16
AJ14
AH14

4

DQC_32
DQC_33
DQC_34
DQC_35
DQC_36
DQC_37
DQC_38
DQC_39
DQC_40
DQC_41
DQC_42
DQC_43
DQC_44
DQC_45
DQC_46
DQC_47
DQC_48
DQC_49
DQC_50
DQC_51
DQC_52
DQC_53
DQC_54
DQC_55
DQC_56
DQC_57
DQC_58
DQC_59
DQC_60
DQC_61
DQC_62
DQC_63

MAC_8
MAC_9
MAC_10
MAC_11

MAC_BA2
MAC_BA0
MAC_BA1

DQC_[63..32] (9)

MAC_[11..8] (9)

MAC_BA[2..0] (9)

DQMCb_4 (9)
DQMCb_5 (9)
DQMCb_6 (9)
DQMCb_7 (9)

QSC_4 (9)
QSC_5 (9)
QSC_6 (9)
QSC_7 (9)

QSCb_4 (9)
QSCb_5 (9)
QSCb_6 (9)
QSCb_7 (9)

WEC1b (9)
CSC1b_0 (9)

CASC1b (9)

CKEC1 (9)
CLKC1 (9)

CLKC1b (9)

3

U1F

AR11
AK12
AR10

AN11
AK11

AM11

AY10
AU11

AU10
AW12
AY12
BB10

BB11

AM10

AT13
AU14
AU15
AW13
AW11

AU16
AT12
AT11

AM17
AN17

AM16
AT14

AK6
AK4

AM6
AM4
AN5
AN3

AR9

AR3
AR1
AP6
AR5
AU1
AU3
AU5
AV2
BB6
BA5
BC1
BB4
AY6
AW5
AW3
AY4

BB9

AY9
AU9

AP2
AP4
AV4
AV6

AM9
AT4
BA3

AT6
BA1

AJ5

AL1

AJ9

AL3

AL5

U1F

DQD0_0
DQD0_1
DQD0_2
DQD0_3
DQD0_4
DQD0_5
DQD0_6
DQD0_7
DQD0_8
DQD0_9
DQD0_10
DQD0_11
DQD0_12
DQD0_13
DQD0_14
DQD0_15
DQD0_16
DQD0_17
DQD0_18
DQD0_19
DQD0_20
DQD0_21
DQD0_22
DQD0_23
DQD0_24
DQD0_25
DQD0_26
DQD0_27
DQD0_28
DQD0_29
DQD0_30
DQD0_31

MAD0_0
MAD0_1
MAD0_2
MAD0_3
MAD0_4
MAD0_5
MAD0_6
MAD0_7
MAD0_8

ADBID0
WCKD0_0

WCKD0B_0
WCKD0_1
WCKD0B_1

EDCD0_0
EDCD0_1
EDCD0_2
EDCD0_3

DDBID0_0
DDBID0_1
DDBID0_2
DDBID0_3

WED0B
CSD0B_0
CSD0B_1
CASD0B
RASD0B

CKED0
CLKD0
CLKD0B

MVREFDS
MVREFDD

MEM_CALRPD
MEM_CALRND

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

DQD_[31..0](9)

MAD_[7..0](9) MAD_[11..8] (9)

DQMDb_0(9)
DQMDb_1(9)
DQMDb_2(9)
DQMDb_3(9)

QSD_0(9)
QSD_1(9)
QSD_2(9)
QSD_3(9)

QSDb_0(9)
QSDb_1(9)
QSDb_2(9)
QSDb_3(9)

WED0b(9)
CSD0b_0(9)

CASD0b(9)
RASD0b(9)

CKED0(9)
CLKD0(9)
CLKD0b(9)

+MVDD

DQD_0
DQD_1
DQD_2
DQD_3
DQD_4
DQD_5
DQD_6
DQD_7
DQD_8
DQD_9
DQD_10
DQD_11
DQD_12
DQD_13
DQD_14
DQD_15
DQD_16
DQD_17
DQD_18
DQD_19
DQD_20
DQD_21
DQD_22
DQD_23
DQD_24
DQD_25
DQD_26
DQD_27
DQD_28
DQD_29
DQD_30
DQD_31

MAD_0
MAD_1
MAD_2
MAD_3
MAD_4
MAD_5
MAD_6
MAD_7

MVREFS_D
MVREFD_D

R134 243RR134 243R
R136 243RR136 243R

DQD1_0
DQD1_1
DQD1_2
DQD1_3
DQD1_4
DQD1_5
DQD1_6
DQD1_7
DQD1_8

DQD1_9
DQD1_10
DQD1_11
DQD1_12
DQD1_13
DQD1_14
DQD1_15
DQD1_16
DQD1_17
DQD1_18
DQD1_19
DQD1_20
DQD1_21
DQD1_22
DQD1_23
DQD1_24
DQD1_25
DQD1_26
DQD1_27
DQD1_28
DQD1_29
DQD1_30
DQD1_31

MAD1_0

MAD1_1

MAD1_2

MAD1_3

MAD1_4

MAD1_5

MAD1_6

MAD1_7

MAD1_8

ADBID1

WCKD1_0

WCKD1B_0

WCKD1_1

WCKD1B_1

EDCD1_0
EDCD1_1
EDCD1_2
EDCD1_3

DDBID1_0
DDBID1_1
DDBID1_2
DDBID1_3

WED1B
CSD1B_0
CSD1B_1

CASD1B
RASD1B

CKED1
CLKD1

CLKD1B

2

DQD_32

BC18

DQD_33

BB18

DQD_34

BA18

DQD_35

AY18

DQD_36

BE17

DQD_37

BA15

DQD_38

BB15

DQD_39

BD14

DQD_40

BH12

DQD_41

BK12

DQD_42

BN11

DQD_43

BL11

DQD_44

BH14

DQD_45

BK14

DQD_46

BM14

DQD_47

BN13

DQD_48

BJ11

DQD_49

BK10

DQD_50

BM7

DQD_51

BL9

DQD_52

BH10

DQD_53

BH8

DQD_54

BH6

DQD_55

BL3

DQD_56

BC5

DQD_57

BD4

DQD_58

BC3

DQD_59

BF1

DQD_60

BD6

DQD_61

BF6

DQD_62

BF4

DQD_63

BG2

MAD_8

BD11

MAD_9

BE12

MAD_10

AY14

MAD_11

BD12
BC15
BC14
BC9
BD10
BC11

BE10
BL15

BJ15
BK5
BJ4

BD17
BJ13
BJ9
BE3

BC17
BL13
BK8
BE5

AV17
AW15
AY15
BD9
BE14

BB12
AY17
AW17

MAD_BA2
MAD_BA0
MAD_BA1

DQMDb_4 (9)
DQMDb_5 (9)
DQMDb_6 (9)
DQMDb_7 (9)

QSD_4 (9)
QSD_5 (9)
QSD_6 (9)
QSD_7 (9)

QSDb_4 (9)
QSDb_5 (9)
QSDb_6 (9)
QSDb_7 (9)

WED1b (9)
CSD1b_0 (9)

CASD1b (9)

CKED1 (9)
CLKD1 (9)

CLKD1b (9)

MAD_BA[2..0] (9)

RASD1b (9)RASC1b (9)

1

DQD_[63..32] (9)

B B

+MVDD

R139

R139

40.2R

40.2R

1%

R141

R141
100R

100R

1%

+MVDD

R143

R143

40.2R

40.2R

1%

R145

R145
100R

100R

1%

A A

5

C315

C315
1uF_6.3V

1uF_6.3V

C323

C323
1uF_6.3V

1uF_6.3V

MVREFD_C

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

MVREFS_C

4

3

+MVDD

+MVDD

R138

R138

40.2R

40.2R

1%

R140

R140
100R

100R

1%

R142

R142

40.2R

40.2R

1%

R144

R144
100R

100R

1%

C313

C313
1uF_6.3V

1uF_6.3V

C321

C321
1uF_6.3V

1uF_6.3V

MVREFD_D

MVREFD/S =0.7*
VDDR1
(GDDR3/4/5)

MVREFS_D

Title

Title

2

Title

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

621

of

621

of

621

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

www.vinafix.vn

5

U1K

U1K

+1.8V

R147 221RR147 221R

R151 110RR151 110R
C328 100nF_6.3VC328 100nF_6.3V

+3.3V

C333

C333

C332

C332

100nF_6.3V

100nF_6.3V

100nF_6.3V

D D

+1.8V

BLM15BD121SN1

BLM15BD121SN1

C C

B B

100nF_6.3V

B113

B113

C325

C325

C335

C335

10uF_X6S

10uF_X6S

1uF_6.3V

1uF_6.3V

C329

C329
1uF_6.3V

1uF_6.3V

B119

B119

1 2

+TSVDD

C365

C365

NS702NS_VIA NS702NS_VIA

1uF_6.3V

1uF_6.3V

+3.3V

BLM15BD121SN1

BLM15BD121SN1

+1.8V

DNI

JTAG_MODE(1) GPIO_18 (13)

R1701KR170
1K

VREFG

BG21

VREFG

AU29

VDDR3#1

AU30

VDDR3#2

AU32

C334

C334
100nF_6.3V

100nF_6.3V

C326

C326

C327

C327

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

C330

C330

C331

C331

100nF_6.3V

100nF_6.3V

1uF_6.3V

1uF_6.3V

TS_FDO(18)

GPU_DPLUS(18)
GPU_DMINUS(18)

C366

C366

C367

100nF_6.3V

100nF_6.3V

C367
10nF

10nF

GND_TSVSS

JTAG_MODE GPIO_18

TP4008 35milTP4008 35mil
TP4009 35milTP4009 35mil

AU33

BB24
BE24
BC24
BD24

BE25
BD25
BB25
BC25

AV36

AV30
AW30

AU24

AU25

BA30
BB30

AU39

BG19
BA22
AV28
BA29
BA35
AW36
BA26
AY30
BM22
BN19
AU22
BG43
AU28
AU26

AR19
AP19

BA19
AY19

VDDR3#3
VDDR3#4

VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4

TS_FDO

DPLUS
DMINUS

TSVDD

TSVSS

RSVD#1
RSVD#2

JMODE

RV770 PRO A12 HF MVE SLT BIN1

RV770 PRO A12 HF MVE SLT BIN1

VSSD#1
VSSD#2
VSSD#3
VSSD#4
VSSD#5
VSSD#6
VSSD#7
VSSD#8
VSSD#9
VSSD#10
VSSD#11
VSSD#12
VSSD#13
VSSD#14

NC_GPIO_31
NC_GPIO_32

TEST_YCLK
TEST_MCLK

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11

DVPCLK

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2
DVPDATA_12

DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

DVPCNTL_MVP_0
DVPCNTL_MVP_1

GPIO_0
GPIO_1

GPIO_2
GPIO_3_SMBDAT
GPIO_4_SMBCLK

GPIO_5

GPIO_6_TACH

GPIO_7

GPIO_8_ROMSO

GPIO_9_ROMSI

GPIO_10_ROMSCK

GPIO_11
GPIO_12
GPIO_13

GPIO_14_HPD2

GPIO_15_PWRCNTL_0

GPIO_16_SSIN

GPIO_17_THERMAL_INT

GPIO_18_HPD3

GPIO_19_CTF

GPIO_20_PWRCNTL_1

GPIO_21

GPIO_22_ROMCSB

GPIO_23_CLKREQB

GPIO_24_TRSTB

GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO

GENERICA
GENERICB
GENERICC
GENERICD
GENERICE
GENERICF

GENERICG

GENERICH

VPCLK0

DVALID

VHAD_0
VHAD_1

VPHCTL

VIPCLK

VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7

PSYNC

BH20
BK20
BM20
BJ21
BL21
BN21
BH22
BK22
BG23
BJ23
BN23
BL23

BK18
BM18

BJ19
BL19

AW25
AY24
AV25
AY25
AY26
AW26
BA28
AV26
AY28
AW28
AY29
AW29

AW24
AV24

BA24
AV29
BH24
BD22
BA25
BE22
AY22
BC22
BB22
BA21
BB21
AW22
BE21
BD21
BD19
BB19
BC19
BE19
AY21
BH18
BN17
BG17
BC21
AW21
BL17
BM16
BH16
BK16
BJ17

BC35
BE32
BC33
BA33
BC30
BD35
BB29
BD32

AV35
AW35
AY35
AV33
AW33
AY33
AV32
AW32

AY32
BB33
BE35
AU36
AU35

BB35
BA32

4

DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10

DVPDATA_11
DVOCLK
DVPCNTL_0

DVPCNTL_1
DVPCNTL_2

DVPDATA_12

DVPDATA_13

DVPDATA_14

DVPDATA_15

DVPDATA_16

DVPDATA_17

DVPDATA_18

DVPDATA_19

DVPDATA_20

DVPDATA_21

DVPDATA_22

DVPDATA_23

DVP_MVP_CNTL_0
DVP_MVP_CNTL_1

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
HPD2
GPIO_15_PWRCNTL_0
EXT_12V_DETb
GPIO_17_INT

GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21
GPIO_22_ROMCSb
PCIE_CLK_REQb
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO

GENERICA
GENERICB
GENERICC
GENERICD

R197 0RR197 0R

R4037 0RR4037 0R

VID_0
VID_1
VID_2
VID_3

VID_6

DVALID
PSYNC
VHAD_0

3

Place SW1 & SW2 on the bottom side

TP400535mil TP400535mil

CrossFire

TP400335mil TP400335mil
TP400435mil TP400435mil

TP400635mil TP400635mil

DVP_MVP_CNTL_0 : DE for bits D[12..23]

TP400735mil TP400735mil

DVP_MVP_CNTL_1 : CLK for bits D[12..23]

CrossFire

HPD2 (15)

ThermINT (18)

GPIO_19_CTF (13)

EXT_12V_DET (13)

GENERICF (13)

FLOW_CONTROL_1 - Lower Cable
FLOW_CONTROL_2 - Upper Cable
SWAP_LOCK_1 - Lower Cable
SWAP_LOCK_2 - Upper Cable

GPIO_8_R

RP1A33R RP1A33R

81

GPIO_9_R

RP1B33R RP1B33R

72

GPIO_10_R

RP1C33R RP1C33R

63

ROMCSb_R

RP1D33R RP1D33R

54

EXT_12V_DET (13)

GPIO_3 (1)
GPIO_4 (1)
GPIO_5 (13)

TACH (18)

JTAG_TRSTB (1)

JTAG_TDI (1)
JTAG_TCK (1)
JTAG_TMS (1)
JTAG_TDO (1)

TP401135mil TP401135mil
TP401235mil TP401235mil

TP401335mil TP401335mil
TP401435mil TP401435mil

TP401035mil TP401035mil
TP401535mil TP401535mil

TP401635mil TP401635mil

(easily accessible).
Clearly Mark A & B contacts on the
silkscreen.

GPIOs for VDDC Setting

GPIO_15_PWRCNTL_0 (13)

GPIO_20_PWRCNTL_1 (13)
GPIO_21 (13)

GENERICA (17)

+3.3V

DNI

DNI

MR148 10KMR148 10K

DNI

MR153 10KMR153 10K

MR156 10KMR156 10K

MR158 10KMR158 10K
MR159 10KMR159 10K

MR161 10KMR161 10K

TR1

TR1
10K

10K

TP29

TP29

35mil

35mil

MR163 10KMR163 10K

DNI

+3.3V

2

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

DNI

NTSC

R146 10KR146 10K

R150 10KR150 10K

R149 10KR149 10K

R152 10KR152 10K

R157 10KR157 10K

R160 10KR160 10K

R176 10KR176 10K

PIN BASED STRAPS

VSYNC1 (3,15)

VSYNC

VHAD_0

PSYNC

GPIO_0

GPIO_1

GPIO_2

VID_1

GPIO_9_R
GPIO_13
GPIO_12
GPIO_11

GPIO_8

HSYNC1 (3,15)

HSYNC1

DVALID

VID_6

VID_3

VID_2

VID_0

GPIO_21

VSYNC2
HSYNC2

GENERICC

GPIO_7

VSYNC2 (3,16)
HSYNC2 (3,16)

BUO

1

VIP_DEVICE_STRAP_EN
0: Slave VIP host port devices present (use if Theater is populated)
1: No slave VIP host port devices reporting presence during reset (use for
configurations without video-in)

If VIP_DEVICE_STRAP_EN is set to ‘1’, then this pin is
used to sense whether a VIP slave device is connected to
the VIP Host interface. If VIP_DEVICE_STRAP_EN is set
to ‘0’, then this pin is not used as a strap at all

VGA DISABLE : 1 for disable (set to 0 for normal operation)

GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)

GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)
0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)

GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)
1 : Allows either PCIe 2.5 GT/s or 5.0 GT/s operation
0 : Debug use only (disables PCIe 5.0 GT/s negotiation)
MSI_DIS (Default: 0)
Disable Message Signaled Interrupt is both a ROM strap
and a pin strap. The pin strap is only applicable if a BIOS
ROM is not present.

GPIO(9,13, 12,11) - CONFIG[3..0]

CONFIG[3]

0100 - 512Kbit M25P05A (ST)
0101 - 1Mbit M25P10A (ST)

CONFIG[2]

0101 - 2Mbit M25P20 (ST)
0101 - 4Mbit M25P40 (ST)

CONFIG[1]

0101 - 8Mbit M25P80 (ST)
0100 - 512Kbit Pm25LV512 (Chingis)

CONFIG[0]

0101 - 1Mbit Pm25LV010 (Chingis)

AUDIO_EN : Enable HD Audio function in the PCI configuration space.
0 - Disable HD Audio
1 - Enable HD Audio
HD audio must only be enabled on systems that are legally
entitled. It is the responsibility of the system designer to
ensure that the system is entitled to support this feature.

HDMI_EN :
Note: Board manufacturer must not set this strap to 1 unless
there is an onboard HDMI connector. It is the
manufacturers responsibility to pay royalties if this strap is
enabled.
This Board doesn't have HDMI Connector
therefore only pull down option is available

BIF_CLK_PM_EN
0 - Disable CLKREQ# power management capability
1 - Enable CLKREQ# power management capability

RESERVED :Internal use only. Other logic must not affect this signal
during RESET.

1 - NTSC TVO0 - PAL TVO TV OUT STANDARD

Pull-Down Resistors are for BU until built-in pull-downs are verified.

CrossFire Card-Edge

Place it at top edge of the
board on the bottom side.

Lower Cable Card Edge

1

DVOCLK
DVPCNTL_2
DVPDATA_1
DVPDATA_3
DVPDATA_5
DVPDATA_7

A A

DVPDATA_9
DVPDATA_11
DVPCNTL_1
GENERICD

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

J1J1

2
4
6
8

DVPDATA_0

10
12

DVPDATA_2

14
16

DVPDATA_4

18
20

DVPDATA_6

22
24

DVPDATA_8

26
28

DVPDATA_10

32

DVPCNTL_0

34
36

GPIO_2

38
40

Bundle B

5

Upper Cable Card Edge

1

DVP_MVP_CNTL_1
DVP_MVP_CNTL_0
DVPDATA_13
DVPDATA_15
DVPDATA_17
DVPDATA_19
DVPDATA_21
DVPDATA_23
GENERICB_R
GENERICC

3
5
7

9
11
13
15
17
19
21
23
25
27
29 30
31
33
35
37
39

J2J2

2
4
6
8

DVPDATA_12

10
12

DVPDATA_14

14
16

DVPDATA_16

18
20

DVPDATA_18

22
24

DVPDATA_20

26
28

DVPDATA_22

32

DVALID_R

34
36

GPIO_1

38
40

Bundle A (closer to the bracket)

4

+3.3V

In production, this block
will not be populated.

Mating connector: 6010028300G
(HEADER 2X8 1.27MM PITCH, SMD)
When attaching the daughter card (B176) align it by mounting hole.

R181 0RR181 0R
R182 0RR182 0R

GENERICB: Generic I2C_SDA
DVALID: Generic I2C_SCL

DNI

JTAG_MODE

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO

DNI

DVALID

DNI

GENERICB

TP31

TP31

TP30

TP30

35mil

35mil

35mil

35mil

For wire soldering

EXT_ADJ_1.8V

Place TRP1 & TR2 in a way

BUO

GPIO_8_T
ROMCSb_T
GPIO_9_T
GPIO_10_T
SDA
SCL

to minimize the stub when
they are not populated.

GPIO_8_R

TRP1A33R TRP1A33R

81

ROMCSb_R

TRP1B33R TRP1B33R

72

GPIO_9_R

TRP1C33R TRP1C33R

63

GPIO_10_R

TRP1D33R TRP1D33R

54

+3.3V+5V

HOLD#

+3.3V

8

VCC

7

GPIO_10_R

6

SCK

GPIO_9_R

5

C342

C342
100nF_6.3V

100nF_6.3V

BIOS1

BIOS1

BIOS

BIOS

113-B339XX-XXX

113-B339XX-XXX

VIDEO BIOS
FIRMWARE

BUOBUO

R180

SDA (3)
SCL (3)

ROMCSb_R
GPIO_8_R

R180
10K

10K

U2

U2

1

CE#

2

SO

3

WP#
GND4SI

PM25LV512A-100SCE

PM25LV512A-100SCE

PN 2280007900G for 1Mbit (PM25LV010A-100SCE)

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.

CONFIDENTIAL & PROPRIETARY TO ADVANCED MICRO DEVICES INC.
© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices

© 2007 Advanced Micro Devices
This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,

This AMD Board schematic and design is the exclusive property of AMD,
and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement

and is provided only to entities under a non-disclosure agreement
with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure

with AMD for evaluation purposes. Further distribution or disclosure
is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose

is strictly prohibited. Use of this schematic and design for any purpose
other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement

other than evaluation requires a Board Technology License Agreement
with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind

with AMD. AMD makes no representations or warranties of any kind
regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,

regarding this schematic and design, including, not limited to,
any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular

any implied warranty of merchantibility or fitness for a particular
purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting

purpose, and disclaims responsibility forany consequences resulting
from use of the information included herein.

from use of the information included herein.

from use of the information included herein.

Title

Title

Title

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

3

2

RH PCIE RV770 512MB GDDR3 DUAL DL-DVI-I VO FH

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.

Advanced Micro Devices Inc.
1 Commerce Valley Drive East

1 Commerce Valley Drive East

1 Commerce Valley Drive East
Markham, Ontario

Markham, Ontario

Markham, Ontario

Thursday, June 05, 2008

Thursday, June 05, 2008

Thursday, June 05, 2008

Sheet

Sheet

Sheet

of

721

of

721

of

721

1

Doc No.

Doc No.

Doc No.

RevDate:

RevDate:

RevDate:

25

25

25

102-B50102-00

102-B50102-00

102-B50102-00

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